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Top Stories — August 28, 2014
Lithography: What are the alternatives to EUV?
Hopes remain high for EUV, but long delays has caused attention to shift to various alternatives.
Overlay Metrology Suite for Multiple Patterning
KLA-Tencor releases WaferSight PWG, LMS IPRO6, and K-T Analyzer 9.0 to control overlay and critical dimension (CD) in advanced IC fabs.
Atomic Layer Etch now in Fab Evaluations
Lam's CTO talks about the future of etch in beta-site tests.
Chasing IC Yield when Every Atom Counts
At SEMICON West this year in Thursday morning's Yield Breakfast sponsored by Entegris, top executives from Qualcomm, GlobalFoundries, and Applied Materials discussed the challenges to achieving profitable fab yield for atomic-scale devices.
FD-SOI: The Best Enabler for Mobile Growth and Innovation
Handel Jones of IBS provides a study titled "How FD-SOI will Enable Innovation and Growth in Mobile Platform Sales" that concludes that the benefits of FD-SOI are overwhelming for mobile platforms through Q4/2017 based on a number of key metrics.
SoC Reliability Verification Doesn't Just Happen, You Know
How do we verify multi-IP, multiple power domain SoCs? The Unified Power Format (UPF) enables a repeatable, comprehensive, and efficient design verification methodology, using industry standards, at the transistor level. It can help simplify multiple power domain verification by enabling a consistent description of the power intent throughout the design flow.
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News & Features
Research Alert: August 27, 2014
Scientists craft a semiconductor only three atoms thick; A breakthrough in imaging gold nanoparticles to atomic resolution by electron microscopy
Blog review August 18, 2014
New blogs give a deeper look at the ASML/IBM announcement on EUV, Samsung's V-NAND vertical flash, warpage in packaging as discussed at ECTC, embedded software, an IoT infographic and the puzzle of chip design.
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Blogs/Twitter
Insights From Leading Edge
IFTLE 206 COSMOS and DAHI Herald the Era of 3D Heterogeneous Integration
For about a decade now, we have been awaiting the full commercialization of 3DIC. From the beginning most ...
Materials Matters
Sustainability through Materials Recovery
Recovering and reusing materials is becoming an increasingly essential consideration in order to ensure consistent quality, a stable ...
Pete's Posts Blog
Internet-of-Things Infographic
This infographic, courtesy of Jabil, gives an good overview of what will be connected to the internet by ...
Applied Innovation
The Changing Face of Semiconductor Investment
Innovation is alive and well in the semiconductor industry. That was a key takeaway from the strategic investor ...
ASN's All Things SOI
FD-SOI: The Best Enabler for Mobile Growth and Innovation
The following in-depth analysis, an IBS study entitled How FD-SOI will Enable Innovation and Growth in Mobile Platform ...
Chipworks
The Second Shoe Drops - Now We Have the Samsung V-NAND Flash
Two weeks ago, we posted about the TSMC 20nm product that we had in-house; now after waiting for ...
Ed's Threads
Chasing IC Yield when Every Atom Counts
Increasing fab costs coming for inspection and metrology At SEMICON West this year in Thursday morning's Yield Breakfast ...
Viewpoints: SEMI
SEMI Advocates for the Industry in Washington - Science, Innovation, R&D
With changes coming in Washington, SEMI has important work ahead supporting the innovators and job creators of this ...
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Our Sponsors
Videos/Podcasts
David Chu, Applied Materials
Pete Singer interviews David Chu, Strategic Marketing Director, Dielectric Systems and Modules Group, Applied Materials.
Marcy Nanocenter
At The ConFab, Pete Singer talks to Mark Reynolds and LaMar Hill about progress in developing a new green site fab site in upstate New York.
Solid State Watch: August 15-22, 2014
Silicon wafer shipments increase; The growing semiconductor industry in India; Equipment book-to-bill ratio remains steady; Next-generation smart glasses in development
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White Papers
RF-SOI Wafers for Wireless Applications
The increasing demand for wireless data bandwidth and the emergence of LTE and LTE Advanced standards pushes radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance.
DFM: What is it and what will it do?
Everybody's talking about it, but just what is DFM? According to various EDA company websites, design for manufacturing can be: generation of yield optimized cells; layout compaction; wafer mapping optimization; planarity fill; or, statistical timing among other definitions. Obviously, there is very little consensus. For me, DFM is what makes my job hard: Characterizing it, and developing tools for it, is the most important item on my agenda.
Via Doubling to Improve Yield
In nanometer designs, the number of single vias, and the number of via transitions with minimal overlap, can contribute significantly to yield loss. Yet doubling every via leads to other yield-related problems and has a huge impact on design size. While there is still concern over of how many vias can be fixed without rerouting and without creating DRC violations, the Calibre via doubling tool can identify via transitions and recommend areas for second via insertion without increasing area.
The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions
Certain measurement methodologies can be inaccurate even if they're precise, and there are known errors associated with certain system parameters.
A Study Of Model-Based Etch Bias Retarget For OPC
The etch loading effect is the dominant factor that impacts final CD control at advanced nodes with shrinking critical dimension.
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