New Thinking Required for Machine Learning
Speakers argue the semiconductor community thus far has not been doing enough to enable machine intelligence.
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Blogs/Twitter
Pete's Posts Blog
A new report by Forrester Consulting, commissioned by Micron, takes a look at how companies are implementing AI and the …
IC Design
How to Build CMP Models for Hotspot Detection
Over the last two decades, chemical mechanical polishing (CMP) has become a mainstay in the IC manufacturing process. Fo…
Applied Innovation
How New Materials Can Solve Contact Resistance
Most connected computing devices today use 3D FinFET transistors enabled in part by technology innovations from Applied …
Materials Matters
Transition to ISO 9001:2015: Starting the Journey
The revised ISO 9001 quality management system provides guidelines to help materials providers achieve stringent purity …
Insights on Things
Tech Industry security highlighted by the iPhone access controversy
The confrontation between Apple and the FBI over the FBIs request for assistance in hacking a known terrorists iPh…
EUVL Focus
Current Challenges and New Frontiers for EUV Sources: Update from 2018 Source Workshop
The 2018 Source Workshop was held in November in Prague, co-organized with HiLASE. Workshop location was a brand new fac…
Chipworks
Intel announces tweaks to 22FFL process for RF, MRAM at IEDM18
At IEDM last year, Intel gave a half-dozen papers on various topics, including two on their 22FFL SoC process aimed at l…
MEMS Industry Group Blog
Skin-Like Biocompatible Devices Come to Market - and to FLEX/MSTC
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Insights From Leading Edge
IFTLE 395: And Then There Were 3; IC History for the Younger Generation
Last week,GlobalFoundries (GF) CEO TomCaulfield announced that GF is putting its 7nm FinFET program on hold indefini…
Ed's Threads
IFTLE 395: And Then There Were 3; IC History for the Younger Generation
Last week,GlobalFoundries (GF) CEO TomCaulfield announced that GF is putting its 7nm FinFET program on hold indefini…
Viewpoints: SEMI
Korea Strategic Materials Conference a Huge Success
Over 260 people attended the 2nd SEMI Strategic Materials Conference (SMC) on Thursday, May 18 at the COEX Exhibition Ce…
Semico Spotlight
SIA's January Release Corroborates Semico's IPI Prediction
On March 2, 2014 SIA announced that worldwide sales of semiconductors reached $26.3 billion for the month of January 201…
IC Packaging
Take Notes During Your Packaging Design Workflow with the Database Diary
In this blog, we take a look, not at a new command, but instead at a classic command that many of you may not even reali…
The Foundry Files
The latest milestones and future trends for making MEMS a mainstream technology.…
Top Stories
AI Chips: Challenges and Opportunities
The exploding use of Artificial Intelligence (AI) is ushering in a new era for semiconductor devices that will bring many new opportunities but also many challenges.
Emerging Memory Types Headed for Volumes
After decades of R&D, two emerging memory types – the phase change memory-based 3D Xpoint, co-developed by Intel and Micron, and the embedded spin-torque transfer magnetic RAM ...
Applied Materials Fields Cobalt Solution for MOL
Applied Materials has introduced a set of processes that enable cobalt to be used instead of tungsten and copper for contacts and middle-of-line interconnects.
Waddle-room for Black Swans: EUV Stochastics
Industry still has DUV ducks in a row
Companies Ready Cobalt for MOL, Gate Fill
As cobalt begins to replace tungsten at the smaller-dimension interconnect layers, Applied Materials is readying process flows and E-beam inspection solutions.
News Stories
New Thinking Required for Machine Learning
Speakers argue the semiconductor community thus far has not been doing enough to enable machine intelligence.
AI Chips: Challenges and Opportunities
The exploding use of Artificial Intelligence (AI) is ushering in a new era for semiconductor devices that will bring many new opportunities but also many challenges.
Emerging Memory Types Headed for Volumes
After decades of R&D, two emerging memory types – the phase change memory-based 3D Xpoint, co-developed by Intel and Micron, and the embedded spin-torque transfer magnetic RAM ...
Technology Features
Feature Articles
Emerging Memory Types Headed for Volumes
After decades of R&D, two emerging memory types – the phase change memory-based 3D Xpoint, co-developed by Intel and Micron, and the embedded spin-torque transfer magnetic RAM ...
Waddle-room for Black Swans: EUV Stochastics
Industry still has DUV ducks in a row
Deep Learning Joins Process Control Arsenal
Where does the machine win, and where does the brain still win?” Howard Witham, APC keynote speaker.
XPoint NVM Array Process Engineering
PCM materials, not PCM devices
Embedded FPGAs Offer SoC Flexibility
With mask costs rising and the need for flexibility growing, companies are beginning to adopt embedded field programmable gate arrays in their SoC designs.
EUVL Materials Readiness for HVM
Ecosystem stretches for 2018 pilot production.
Mechanistic Modeling of Silicon ALE for FinFETs
U of M and Lam Research show how avoid yield losses.
Lithographic Stochastic Limits on Resolution
Difficult to cheat physics and make a profit.
Deep Learning Could Boost Yields, Increase Revenues
Deep learning is “a shiny new hammer” that chip industry may figure out how to use.
Edge Placement Error Control in Multi-Patterning
SPIE-AL presentations show materials dominate patterning.
Podcasts/Videos/Webcasts
Solid State Watch: August 19-25, 2016
TowerJazz and SMIC’s sales forecast to surge in 2016; Intel to produce 10nm ARM chip designs; GlobalWafers to acquire SunEdison Semiconductor; SEMI posts July 2016 book-to-bill report ...
Edwards Vacuum on Safety Protocols in the Fab Environment
Pete Singer and Geoffrey Stoddart, Global Services Marketing Director, Edwards Vacuum, met up at SEMICON West 2016 to discuss ROI associated with safety investments in a fab setting, ...
Solid State Watch: June 3-9, 2016
Semiconductor Industry Association announced worldwide sales of semiconductors reached $25.8 billion; SEMI announced that 19 new fabs and lines are forecasted to begin construction ...
Solid State Watch: May 27-June 2, 2016
GLOBALFOUNDRIES announced a joint venture with the government of Chongqing; Texas Instruments maintains leadership in analog IC marketshare; Micron releases two new solid state drive ...
Solid State Watch: May 20-26, 2016
SEMI releases new book-to-bill ratio report; Infineon and imec share details of their CMOS-based 79 GHz sensor chip; Synopsys introduces pre-wafer simulation solution; Researchers find ...
Solid State Watch: May 13-19, 2016
IBM scientists achieve storage memory breakthrough; Kateeva closes its Series E funding round with $88 million in new financing; Worldwide silicon wafer area shipments increased during ...
Solid State Watch: May 5-12, 2016
Worldwide semiconductor capital spending projected to decline 2 percent in 2016; Worldwide sales of semiconductors reached twenty six point one billion for the month of March 2016; ...
Behind the Scenes: Presto Engineering
Tim Lillie, General Manager, North America, provides a look at Presto Engineering's operations in this corporate video.
Solid State Watch: December 4-10, 2015
Semiconductor fab equipment spending growth in 2015; NXP and Freescale complete merger; Atomically-flat tunnel transistor overcomes fundamental power challenge of electronics; Imec ...
Solid State Watch: November 27 – December 3, 2015
Researchers discover new phase of carbon; IDMs on track to outpace fabless semiconductor supplier growth; Advanced packaging to reach 44% of packaging services by 2020; European Commission ...
Resource Center
White Papers
The Final Days…Getting to Sign-Off Faster with Calibre
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RF-SOI Wafers for Wireless Applications
The increasing demand for wireless data bandwidth and the emergence of LTE and LTE Advanced standards pushes radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance.
DFM: What is it and what will it do?
Everybody’s talking about it, but just what is DFM? According to various EDA company websites, design for manufacturing can be: generation of yield optimized cells; layout compaction; wafer mapping optimization; planarity fill; or, statistical timing among other definitions. Obviously, there is very little consensus. For me, DFM is what makes my job hard: Characterizing it, and developing tools for it, is the most important item on my agenda.
Via Doubling to Improve Yield
In nanometer designs, the number of single vias, and the number of via transitions with minimal overlap, can contribute significantly to yield loss. Yet doubling every via leads to other yield-related problems and has a huge impact on design size. While there is still concern over of how many vias can be fixed without rerouting and without creating DRC violations, the Calibre via doubling tool can identify via transitions and recommend areas for second via insertion without increasing area.
The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions
Certain measurement methodologies can be inaccurate even if they’re precise, and there are known errors associated with certain system parameters.
A Study Of Model-Based Etch Bias Retarget For OPC
The etch loading effect is the dominant factor that impacts final CD control at advanced nodes with shrinking critical dimension.
Automation of Sample Plan Creation For Process Model Calibration
A look at ways to simplify the optical and resist model calibration and to speed up the entire process.
Extending Copper Interconnect Beyond The 14nm Node
Fabricating interconnects is one of the most process-intensive and cost-sensitive parts of manufacturing.
Events
SPIE Photomask Technology + EUV Lithography
Monterey, CAhttp://SPIE.org/rpuv19sstvw
September 15, 2019 - September 19, 2019