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IEDM: Thanks for MEMS-ories

At the 60th annual International Electron Devices Meeting this week in San Francisco, there was much buzz about the 14-nanometer FinFET papers being presented by IBM and Intel. Those papers were the subject of a press release two months in advance.

3D ASIP: “It’s Complicated”

The presentations at this week’s 3D Architectures in Semiconductor Integration and Packaging conference could be summed up in a famous Facebook status.

Germanium Junctions for CMOS

Enabling NMOS using Ge channels for CMOS finFETs.

Applied Materials Introduces New Hardmask Process, Saphira

A new hardmask material, called Saphira, and accompanying processes was introduced Applied Materials. The material, which is transparent and offers high selectivity and good mechanical strength, could reduce manufacturing costs by 35% per module.

Air-gaps in Copper Interconnects for Logic

Intel’s “14nm-node” process uses air-gaps in dielectrics; direction disclosed four years ago.

RF and MEMS Technologies to Enable the IoT

Communications and energy-harvesting capabilities can be integrated into ubiquitous always-on smart nodes.

Are We At an Inflection Point with Silicon Scaling and Homogeneous ICs?

In the late 1940’s, three physicists (Bardeen, Brattain and Shockley) invented the first transistor and were later awarded the Nobel Prize in 1956.

TSV Market Demand Now for Performance not Size

High-performance applications pull for premium packaging solutions.

ASML on EUV: Available at 10nm

Extreme-ultraviolet lithography systems will be available to pattern critical layers of semiconductors at the 10-nanometer process node, and EUV will completely take over from 193nm immersion lithography equipment at 7nm, according to Martin van den Brink, president and chief technology officer of ASML Holding.

Design and Manufacturing Technology Development in Future IC Foundries

Virtual Roundtable provides perspective on the need for greater integration within the “fabless-foundry” ecosystem.

Process Watch: Sampling matters

Determining an optimum sampling strategy comes down to weighing the cost of process control against the benefit of capturing the defect or other excursion in a timely manner.

Foundry, EDA partnership eases move to advanced process nodes

A leading semiconductor foundry and an EDA vendor with design-for-yield (DFY) solutions have enjoyed a long-term partnership. Recently, they worked together to leverage DFY technologies for process technology development and design flow enhancement.

Sustainability through Materials Recovery

Recovering and reusing materials is becoming an increasingly essential consideration in order to ensure consistent quality, a stable supply of materials, and lower costs. On- and off-site options are reviewed for helium, argon, sulfuric acid and Xenon.

Roll over flat panel displays

Flexible displays is a technological field that has been in R&D and pre-commercial development for several years, but what needs to happen to make volume production a reality, in areas including substrates, materials and production processes? Semiconductor Manufacturing & Design discussed the issues with Mac McDaniel, Director and Chief Marketing Officer, Display Business Group, Applied Materials, Michael Ciesinski, MD of the Flextech Alliance, and Keri Goodwin, Principal Scientist from the Centre for Process Innovation (CPI), in the UK.

Safety critical devices drive fast adoption of advanced DFT

Devices used in safety critical applications such as automobiles need be known to work and have the ability to be regularly verified. Therefore, a very high-quality test is important as well as method to perform a built-in self-test.

Why SOI is the Future Technology of Semiconductors

Zvi Or-Bach, President and CEO of MonolithIC 3D, blogs that this is the “one learning” we can take away from IEDM 2013.

FinFET on SOI: Potential Becomes Reality

We report here empirical results demonstrating the electrical benefits of SOI-based FinFETs. There are benefits inherent in the elimination of dopant as the means to establish the effective device dimensions. However, significant compromise is unavoidable when using doping as a means of isolation, as in bulk-based FinFETs.

Packaging Materials Trends — Mobility is the Key Market Driver

The electronics industry trend towards smaller and thinner form factors has ushered an era of significant changes in packaging materials. As these trends continue, innovative material solutions will be needed to address demanding requirements related to product integration, mobility, and reliability.

Paradigm Changes in 3D-IC Manufacturing

The process flows applied today for real product manufacturing are quite different from the process flows initially proposed for a universal 3D IC.

GLOBALFOUNDRIES, Open-Silicon and Amkor demo 2.5D test vehicle

GLOBALFOUNDRIES, Open-Silicon and Amkor Technology have jointly exhibited a functional system-on-chip (SoC) solution on a 2.5D silicon interposer featuring two 28nm logic chips, with embedded ARM processors.