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79 GHz CMOS RADAR Chips for Cars from Imec and Infineon

Compact, low power, low cost solution to advance vehicle safety and automation.

How to Boost Verification Productivity with SystemVerilog/UVM and Emulation

Use of emulation for hardware-assisted testbench acceleration is growing as design verification teams find that simulation alone cannot deliver the coverage or performance needed to get large, complex designs to market on time. If your design requires millions of clock cycles to fully verify, you need both simulation and emulation.

Rhines Expounds on the Deconsolidation of the Semiconductor Industry

“By 2020, we are all going to work for the same company,” Wally Rhines, chairman and chief executive officer of Mentor Graphics, said Tuesday morning (April 26) in his keynote presentation at Mentor’s U2U user conference in Santa Clara, Calif.

Intel Q1 Revenue, Profit Rise; Chipmaker Will Cut Up to 12,000 Jobs

Intel reported net income of $2.0 billion in the first quarter, up 3 percent from a year earlier, while revenue rose 7 percent to $13.7 billion, compared with $12.8 billion one year ago.

Controlling Variabilities When Integrating IC Fab Materials

The Critical Materials Conference 2016—to be held May 5-6 in Hillsboro, Oregon (cmcfabs.org)—will explore best practices in the integration of novel materials into manufacturing

Mentor Graphics U2U Meeting April 26 in Santa Clara

Mentor Graphics’ User2User meeting will be held in Santa Clara on April 26, 2016. The meeting is a highly interactive, in-depth technical conference focused on real world experiences using Mentor tools to design leading-edge products.

Functional Safety, Security for IoT Stressed at Cadence Event

The “big trends” in the electronics industry are social, mobility, the Internet of Things, and security, Lip-Bu Tan, the president and chief executive officer of Cadence Design Systems, said Tuesday (April 5) in his keynote address at the CDNLive Cadence User Conference in Santa Clara, Calif.

Cadence Adds New Tools for Analog Design, Enhances Layout

Cadence Design Systems today is introducing new tools within its Virtuoso Analog Design Environment (ADE), along with enhancements to the Virtuoso Layout Suite.

Goodbye, EDAC; Hello, ESD Alliance

The Electronic Design Automation Consortium (EDAC) is no more. The industry organization, founded in 1989, is changing its name to the Electronic System Design Alliance, or ESD Alliance.

Molecular Modeling of Materials Defects for Yield Recovery

New materials are being integrated into High Volume Manufacturing (HVM) of semiconductor ICs, while old materials are being extended with more stringent specifications.