How and why substrates will facilitate the introduction of planar and non-planar designs beginning at 28nm.

A look at how to improve simulation consistency and to speed up lithography operations.

How predictive power and runtime performance of patterning models used in full-chip simulation tools is improving, and what factors limit the predictability of those models.

A global survey of how such problems as patent infringement, counterfeiting and cost are affecting the IC industry.

Enabling 12 technology nodes in 12 years.

A look at the process technology that will become the foundation for a new generation of portable electronics.

Designing into a foundry low-power high-k metal gate 28nm solution for high-performance analog mixed signal and mobile applications.

How to maximize the process margin of 2D patterns using simpler processes with lower mask costs than double patterning.

A high-performance electrical driven hotspot detection solution for full-chip design using a novel device parameter matching technique.

A look at the challenges to obtain competitive silicon technology for the upcoming generation of SoCs.