Posts Tagged ‘Nikon’

Next Page »

Optical Lithography, Take Two

Thursday, February 21st, 2013

By Mark LaPedus
It’s the worst-kept secret in the industry. Extreme ultraviolet (EUV) lithography has missed the initial stages of the 10nm logic and 1xnm NAND flash nodes.

Chipmakers hope to insert EUV by the latter stages of 10nm or by 7nm, but vendors are not counting on EUV in the near term and are preparing their back-up plans. Barring a breakthrough with EUV or other technology, IC makers will likely use today’s 193nm immersion with multiple patterning at 14nm, 10nm and perhaps beyond. “10nm will be optical,” said Ajit Manocha, chief executive of GlobalFoundries. “We have evidence that we can do 7nm with immersion.”

GlobalFoundries, for one, is laying the groundwork if EUV is ready by 10nm. “We are keeping our ground rules migrate-able to EUV,” added Subramani Kengeri, vice president of advanced technology architecture at GlobalFoundries.

Chipmakers are keeping their options open for good reason—extending optical comes with a penalty. The shift from single patterning at 28nm to multiple patterning at 20nm is projected to increase lithography costs by up to 56%, according to Barclays Capital. Consequently, the overall cost-per-transistor curve is in danger of slowing or derailing.

Lithographers, who seem to achieve miracles when the chips are down, are determined to stay on Moore’s Law. “The cost of processing might go up with multiple patterning, but cost-per-transistor does not,” said Yan Borodovsky, a senior fellow and director of advanced lithography at Intel.

The ability to stay on the critical cost-per-transistor curve puts enormous pressure on the lithographic supply chain, which includes the EDA houses, materials suppliers, mask shops, and tool vendors. In response, Nikon is quietly shipping a faster scanner for 10nm. Lithographers also may resort to some new patterning tricks. The wild card is directed self-assembly (DSA), an alternative lithography technology that makes use of block copolymers to enable fine pitches.

EUV woes
For years, there have been fears that optical lithography would run out of gas, prompting the need for a new next-generation lithography (NGL). EUV emerged as the leading NGL candidate. The other NGLs, maskless and nanoimprint, are also in the hunt.

EUV, a soft X-ray using 13.5nm technology, is attractive because it keeps the industry on a single-exposure path. But EUV has encountered several delays due to the lack of adequate power sources, defect-free photomasks and photoresists.

The current throughput for ASML’s EUV tools is less than 10 wafers an hour (wph). At one time, ASML hoped to ship an EUV scanner with a 150-watt source by mid-2012. A 150-watt source equates to a more acceptable throughput of 69 wph.

Recently, the 150-watt source was delayed again and pushed out to mid-2014. The source is being developed by Cymer, which itself is being acquired by ASML. Separately, Intel, Samsung and TSMC have recently invested in ASML to help fund ASML’s efforts in EUV and 450mm.

ASML is still targeting EUV for mass production in 2014, but the industry isn’t taking any chances and will extend 193nm immersion—at a price. On average, there are 37 lithography layers processed for 32nm/28nm chips, according to Barclays. Of those, there are 14 critical layers processed using 193nm immersion scanners.

In total, there are 38 lithography exposures at 32nm/28nm, 15 of which are immersion exposures, with only one multiple patterning step in the flow, according to Barclays. In terms of lithography equipment costs at 32nm/28nm, a foundry spends an estimated $17 million per 1,000 wafer starts per month (wspm).

In comparison, there are 40 lithography layers for at 22nm/20nm chips, 19 of which are critical layers. In total, there are 52 lithography exposures at 22nm/20nm, 31 of which are immersion exposures with 11 multiple patterning steps. All told, a foundry is expected to spend $27 million per 1,000 wspm in lithography costs, according to the firm.

Lithography steps and costs will soar at 14nm and beyond. In response, chipmakers already are prepared for the dreaded multiple patterning era. NAND flash vendors, for example, are using a multiple patterning technique called sidewall image transfer (SIT), sometimes called self-aligned double patterning.

In logic, vendors have or will implement one of the various flavors of multiple patterning: SIT, litho-etch-litho-etch (LELE) or self-aligned vias. Intel, for one, is embracing a concept called complementary lithography, which involves an SIT flow. Other logic vendors are following a similar path with various nuances.

Today, Intel is using 193nm immersion with multiple patterning at 22nm, with plans to extend that to 14nm. At 22nm, Intel’s processors are based on finFETs. “For the 22nm node, our fin is finer than what can be done with simple patterning. It’s done with pitch division. We still stay on an historical cost-per-transistor trend,” said Intel’s Borodovsky. “Our 14nm technology is also pitch-divided technology. We project our cost-per-transistor will remain on the trend.”

For 11nm, Intel is looking at quintuple exposure. As part of the process, there are two steps, gratings and line cuts, to pattern designs. Using 193nm immersion, the first exposure is used to make the gratings. The remaining four exposures are used to cut the pitch-divided lines.

To perform the cut step, Intel is evaluating several options: 193nm immersion; DSA, EUV; or direct-write e-beam. So far, there is no clear winner—193nm immersion is challenging, but DSA, EUV and maskless are not ready for mass production.

“I believe we can extend (193nm immersion) for many years,” Borodovsky said. “We also have a dual wave lithography roadmap. It means we will extend existing technology as long as possible. And we will bring in new technology when it is available and affordable.”

Using NGL has some advantages over optical. “If we use EUV, we will use one mask to do the gratings and another mask to break those continuities. If we use direct write, we don’t use any masks,” he said.

Another technology, DSA, potentially could extend 193nm lithography beyond 10nm. As before, the challenges for DSA are defects and the lack of a design infrastructure. The new gap for DSA is non-destructive metrology as a means to inspect the morphologies in the patterns.

DSA materials providers have said DSA would be ready at 10nm, but there are signs the technology may get pushed out. For example, IBM is targeting DSA for 7nm, said Gary Patton, vice president of the Semiconductor Research and Development Center at IBM.

“DSA is making progress,” said Intel’s Borodovsky. “But let’s say we use DSA. If you look at a SEM, you look at the top. Everything may appear perfect. But the cylinders could also change their shapes from top to bottom. You have to have a cross section. So, it’s very difficult to do a cross section of 15nm holes or cylinders. You can do complicated X-ray metrology. For this, you need a synchrotron source, which is not practical.”

Etch is another roadblock. Some of the cylinder morphologies in DSA structures are uniform while others are not. “Some would etch to the bottom. You might also have cylinders that are etched in the wrong place. That’s an edge-placement error,” he added.

The solutions
Until NGL is ready, chipmakers are stuck. “I don’t think the industry has given up on EUV. EUV will be in play, but it will be in limited use,” said Hamid Zarringhalam, executive vice president at Nikon Precision. “But for 10nm, almost all logic vendors are looking at immersion technology. Customers are even looking at extending immersion beyond 10nm.”

To keep up with the increase in multiple patterning steps, ASML and Nikon are shipping faster scanners. Nikon, for one, has begun shipping the NSR-622D, a 193nm immersion scanner for the 10nm node. The tool has a throughput of 200 wph. In addition, Nikon is also developing a separate 193nm immersion tool for the 450mm wafer size.

Besides lithography scanners, there is an urgent need for new and faster e-beams in photomask production. Mask making itself is quickly turning into a fine and precise art. In quadruple patterning, for example, the patterns must be split into four masks.

“One mask has to be perfect in terms of CD uniformity, linearity and defects. The other three masks have to be exactly the same,” said Amitabh Sabharwal, general manager for mask etch products at Applied Materials. “When you start going down to the 16nm node, the CD uniformity targets become very, very tight. We’re talking in the range of 1nm. And on top of that, the defect levels might be very tight. Your systematic uniformity has to be zero. Essentially, everything must be flat.”

Looking into his crystal ball, lithography expert Chris Mack predicts that the industry will embrace new design methodologies such as 1D layouts. “We will see more interaction between lithography and design,” Mack said. “The reality of what we can accomplish lithographically will have more influence on the way designs are implemented. In fact, this might not be a bad thing. The switch from arbitrary designs to more (1D-like layouts) is turning out to have less impact on chip area than many people expected. And they are lithographically friendly.”

The industry also will embrace complementary lithography or hybrid approaches. “There is no doubt in my mind that optical will go forever,” he said. “But I do think there is a possibility of hybrid lithographic approaches that are optimized for specific types of patterns. Complementary lithography is a powerful technique and makes the most sense. All of the (NGLs) have a lot of potential, but they are not being developed in the timeline the industry needs.”

The Week In Review: Dec. 10

Monday, December 10th, 2012

By Mark LaPedus
Get ready for the 2012 IEEE International Electron Devices Meeting (IEDM) in San Francisco. At the event, slated for today through Wednesday, GlobalFoundries CEO Ajit Manocha will give a keynote, entitled: “Is the Fabless/Foundry Model Dead? We Don’t Think So. Long Live Foundry 2.0!”

Here are some of the papers and events at the IEDM event:

*A team led by IBM will report on the world’s first high-performance hybrid-channel ETSOI CMOS device. Researchers have integrated a PFET having a thin, uniform strained SiGe channel, with an NFET having a Si channel, at 22nm.

*IBM will describe a fully-integrated SOI SRAM at 22nm.

*In a separate paper, CEA-LETI, STMicroelectronics, IBM, GlobalFoundries and Renesas will discuss FD-SOI for the 20nm node and beyond.

*STMicroelectronics will describe the performance of ultra-thin box and body technology. The SOI technology will provide a total power reduction of 30% to 40% at identical speed with respect to bulk thanks to back side gate biasing efficiency.

*National Chiao Tung University will discuss a high-performance Ge CMOS finFETs on a thin SOI wafer.

*Imec, GlobalFoundries and Samsung will talk about stress enhanced mobility for n- and p-FinFETs with both Si and Ge channels for the 14nm node and beyond.

*Applied Materials and Synopsys will present a paper entitled, “Is strain engineering scalable in FinFET era?”

*SuVolta, a developer of low-power CMOS technologies, announced the results that demonstrate the performance and power advantages of its Deeply Depleted Channel (DDC) technology.

*The SOI Industry Consortium has organized a symposium that will address the world of fully depleted SOI. The symposium will be held at the San Francisco Hilton Hotel today, concurrent with the IEDM 2012 Conference.

*The 14nm node is expected to be an inflection point for the chip industry, beyond which the resistivity of copper interconnects will increase exponentially and may become a limiting factor in chip design. Tomorrow, Applied Materials will host a forum in San Francisco to explore the subject.

Intel’s push in the foundry business has the industry talking. Can the chip giant give the traditional foundries a run for their money? Some say no. In a report, Hans Mosesmann, an analyst with Raymond James, said: “The chatter that Intel should become a foundry for Apple/Qualcomm as a positive for the company is amusing to us given that foundries are the low-end of the semiconductor manufacturing totem-pole. Does it make sense for Intel to build $10 billion shiny new fabs for foundry work? We think not for 45-50% gross margins, and ask IBM how the foundry investment turned out. Intel’s fabs are not meant for the fragmented nature of foundries and truth be known, Intel is a laggard in SoC manufacturing anyway (at least today). Regardless, a formalized foundry strategy would be an acknowledgment by Intel that its model isn’t working and a negative for gross margins.”

Thanks to investments from Intel, Samsung and TSMC, ASML is developing a 450mm EUV scanner. But EUV remains delayed. So the industry is hedging its bets. In an announcement at Semicon Japan, Kazuo Ushida, president of Nikon, said that the company plans to ship 450mm, 193nm lithography tools in 2017 through a joint development effort with Intel. Nikon plans to have 450mm-enabled ArF immersion prototype tools in 2015-16.

In a video on SEMI’s site, Paul Farrar, general manager of the Global 450mm Consortium (G450C), discussed the progress and impact of the G450C.

AMD has amended its wafer supply agreement with GlobalFoundries. As part of the plan, AMD will reduce its procurement of wafers from GlobalFoundries.

International Rectifier introduced a series of high-current, ultra-low dropout hybrid linear voltage regulators based on SOI.

A team of ST and CEA-LETI received the 2012 Général Ferrié Award. They were honored for their work on FD-SOI technology.

ST has taken the decision to exit ST-Ericsson after a transition period and is currently in negotiations on exit options. This disengagement process has started, with the transition expected to end during the third quarter of 2013.  ST will continue to support ST-Ericsson as its supply-chain partner, advanced process-technology partner (FD-SOI) and application-processor IP provider.

Soitec will hold a grand opening celebration of its North American solar headquarters and manufacturing facility in San Diego on Dec. 19.

The Center for Science Teaching and Learning (CSTL) and Applied Materials announced a new clean tech competition challenge that addresses the global problem of access to clean water. The program, which now includes students from Singapore, as well as Xi’an, China, and California’s San Francisco Bay Area, was created last year to inspire the next generation of leaders and innovators in clean technology.

As a result of an equity investment, Qualcomm will become a minority shareholder in Sharp.

Axcelis will exit the dry-strip business to focus on the ion implanter market. Axcelis will sell its dry-strip business to Lam Research.

CyberOptics announced the completion of a restructuring and staff reduction totaling approximately 10% of its global workforce.

Signetics will double its capacity for flip chip package assembly within its factory in Paju, South Korea.

For most of the last two decades personal computers have accounted for a third or more of annual IC sales, but standard PCs are now on the brink of being replaced as the largest end-use product category for integrated circuits, according to IC Insights.

Amid weak economic conditions, IHS is downgrading its forecast for the global semiconductor market in 2012, with revenue now expected to decline by 2.3% for the year.

Sony next year is expected to purchase $8.4 billion worth of semiconductors, up nearly 5% from $8.0 billion in 2012, according to HIS. Meanwhile, Toshiba’s spending will increase 2.0% to $6.1 billion in 2013, up from $6.0 billion in 2012. In contrast, spending at the other major Japanese consumer electronics OEMs, Panasonic and Sharp, will decline in 2013 and 2014.

The Week In Review: Aug. 13

Monday, August 13th, 2012

By Mark LaPedus
Intel will invest several million dollars in Nikon for the development of 450mm lithography systems, according to Semiconductor Portal, citing Nikkei as its source. Intel also recently invested in ASML.

Soitec says it is well positioned in the selection process for solar projects in France. For some time, the company has been selling a concentrator photovoltaic (CPV) system. /

Mentor Graphics has added support for 42 embedded development boards for its RTOS.

Mobile DRAM is playing a more prominent role in the memory business, according to iSuppli. Mobile DRAM is set to hit a record $6.56 billion in revenue this year, up 10 percent from $5.98 billion in 2011, according to the firm.

But the overall DRAM industry is preparing for another round of capacity cuts, according to DRAMexchange.

The global smartphone applications processor market showed a solid 55% year-over-year growth in Q1 2012, reaching $2.47 billion, according to Strategy Analytics.

TVs based on active-matrix organic light-emitting diodes (AMOLEDs) cost 10 times more than LCD TVs, says DisplaySearch.

A range of applications is driving strong demand for wearable technology, according to IMS. Current wearable devices are concentrated around a few products, mainly in the healthcare and medical, and fitness and wellness application areas.

Firm Raises Lithography Tool Unit Forecast

Tuesday, April 17th, 2012

Barclays Capital has increased its lithography forecast amid growing demand — and shortages — in this fab tool sector.

The investment banking firm is raising its forecast for total lithography units to 251 from 234 and sees potential for as high as 260 in 2012. It sees no change to i-line, of which it has an estimate of 66 units this year.

Barclays sees one fewer 193nm dry tool than previous forecast. But 248nm tools are expected to hit 90 units in 2012, compared to 75 in the previous forecast. And 193nm immersion shipments are expected to hit 85 units this year, compared to 82 in the previous estimate, according to the firm.

“Immersion tool supply is becoming increasingly tight, led by foundry demand. We understand ASML is trying to accommodate the pull-in of three immersion tools to GlobalFoundries’ Dresden fab into the June quarter, but that current demand from Samsung and TSMC is making this difficult,” said C.J. Muse, an analyst with Barclays.

“Samsung’s conversion of an Austin line from NAND to System LSI is requiring a handful of incremental immersion tools, adding to our forecast,” he said. Samsung is converting 10,000 wafers for 28nm devices  based on a polysilicon gate stack for Qualcomm and others, he said.

Analyst: Canon, Nikon Go in Opposite Directions

Monday, April 2nd, 2012

By Mark LaPedus

Japan’s two industrial equipment behemoths — Canon Inc. and Nikon Corp. — are going in opposite directions in fab gear, cameras and other areas, according to a new report.

Canon has not been a factor in the high-end semiconductor lithography market for years, as it exited the 193nm scanner business some time ago. Canon is quietly making a run in the nanoimprint arena. But at the same time, Canon faces a slowdown in the 248nm, i-line and LCD stepper segments, according to David Rubenstein, an analyst with Religare Capital Markets, an investment banking firm.

In contrast, Nikon has moved into the black in its semiconductor equipment business for its most recent fiscal year, which ended March 31, 2012, Rubenstein said in the report. But like Canon, Nikon faces a slowdown in its LCD stepper business, he said. Nikon did not respond to inquiries about the report.

“Canon lost market share in SLR cameras to rival Nikon in 2011, owing to supply constraints following the earthquake,’’ he said. “We estimate that Canon’s share fell to 44 percent from 46 percent in 2011, while Nikon raised its share to 32 percent from 30 percent.”

Nikon’s litho unit moves out of the red

It’s the story of two giants in Japan. Established in 1917, Nikon — known as Nippon Kogaku — started by supplying binoculars, microscopes, telescopes and other products. Today, Nikon is about 20 percent the size of Canon in market capitalization. In contrast to previous years, Nikon’s camera business has become the company’s earnings engine. But unlike Canon, Nikon’s lithography tools still represent a large swing factor in its earnings, according to the analyst.

Nikon’s equipment division, which sells lithography gear for fabs and LCD plants, is projected to be 27 percent of the company’s overall sales and 40 percent of its operating profit in fiscal year 2012, which ended in March 31, according to the report.

Nikon forecasts that it will ship 21 193nm immersion lithography scanners in fiscal year 2012, compared to 22 units in fiscal 2011. It’s the worst kept secret in the industry, but Nikon’s largest lithography customer is Intel Corp. “We estimate that (Nikon’s) IC litho business suffered losses three years in a row (from fiscal year 2009 to 2011), but is in the black this year. However, we project that profits will approximately halve next fiscal year as volumes decline,” Rubenstein said.

“Capex is the key driver for Nikon’s IC steppers. We believe that bookings will decline in 2012, continuing the downturn that began in the summer of 2011. We project that capital spending will fall 12 percent year-over-year in 2012,” he said. “Strategic capex for logic chips in smartphones/tablets and ultrabooks is still firm, but overall the softness in memory appears to be the overriding factor for total equipment spending.”

In total, 193nm immersion shipments are slated to fall to 80-90 units in 2012, from 120 units in 2011, according to the report.

Nikon faces other challenges, namely market share. At one time, the company was the dominant supplier of lithography gear. In 2011, Nikon had a 22 percent share in 193nm immersion tools, meaning that rival ASML Holding NV has a staggering 78 percent share.

“Nikon also faces the threat of extreme ultraviolet (EUV) lithography,” Rubinstein said. Nikon has developed two alpha EUV tools, including one within the company’s headquarters and one at Selete. But unlike rival ASML Holding NV – which has an aggressive EUV roadmap – Nikon shows no signs of developing pre-production or production EUV tools in the near term.

“ASML has taken the lead in EUV, investing over $1 billion in the past several years. Originally the adoption by chipmakers of EUV was projected to be 2013, but this appears to be delayed until 2015 or beyond, which is good news for Nikon. Nikon stands to lose market share in IC litho if EUV is adopted for production,” Rubinstein said.

Both Nikon and Canon face challenges in the LCD stepper market. Overall LCD stepper units were 109 units in 2011, but the market is expected to fall by 40 percent in 2012, the report said. Nikon claims to have 75 percent market share in LCD steppers, with Canon holding the rest.

“LCD panel makers have been in the red since 2010, symbolized by record losses at Panasonic, Sharp, Sony, and others. Thus, capex for large panels for LCD TVs is virtually non-existent. In small panels for mobile applications, capex was robust last year, but has been toned down somewhat in recent months,” he said.

Canon goes nano route

According to the analyst, Canon was established as Precision Optical Instruments in 1933. The company developed a 35mm camera in an apartment room in the Roppongi area of Tokyo in 1934. In 1935, this camera was named the Hansa Canon.Today, Canon is the largest technology company in Japan with a ¥4.7 trillion ($57 billion) market capitalization, according to the analyst.

Canon loses footing in fab tool market

On the other hand, Canon’s lithography equipment business is much smaller than Nikon’s and has little material impact on its total earnings. “Canon does have a decent market share in lower-priced KrF and i-line IC steppers, but typically struggles to stay out of the red in the division,” he said.

But now, Canon is quietly making a run in the nanoimprint lithography business. The company has an agreement with Molecular Imprints Inc. (MII) under which Canon sells MII’s tools in Japan and other markets. MII has sold a nanoimprint tool to Toshiba.

Others, reportedly including Intel and Samsung, have obtained MII’s tools. But to date, nanoimprint remains a niche in lithography. MII would like chip makers to adopt nanoimprint in the next-generation lithography (NGL) race, but the technology still suffers from throughput, defectivity and infrastructure issues.

The key products for Canon are SLR cameras, laser printers, and copiers. “We believe that camera sales and profits will rebound sharply this year as Canon gains back market share lost last year,” he said.

“A threat to Canon’s profitable SLR camera business is new competition from Nikon, Sony, Samsung, Panasonic, Olympus, etc. in the form of mirrorless and other cheap SLR cameras,” he said. “Mirrorless cameras have already gained 30 percent market share in Japan. This increase in mirrorless SLR camera share has been accompanied by a decrease in average selling prices of SLR cameras.”

SLR cameras use a mechanical mirror and prism to direct light to a viewfinder on the back of the camera. Recently, several rivals including Nikon, Sony, Panasonic, Olympus and Samsung have introduced mirrorless SLR cameras, which employ a mirrorless structure that downsizes the camera body, making it lighter.

Source: Religare Capital Markets

ASML Becomes Leading Semi Equipment Vendor

Friday, March 9th, 2012

By David Lammers and Mark LaPedus

VLSI Research Inc said ASML became the leading vendor of semiconductor  production equipment in 2011, buoyed by memory vendors and foundries using lithography upgrades to move to tighter linewidths on existing lines. Applied Materials dropped to the second-ranked spot for the first time since 1992.

ASML’s rise to the top spot is all the more stunning because the Dutch company is basically a single-product company, with scanners and lithographic DFM tools its sole source of revenues. VLSI chairman Dan Hutcheson, in his Chip Insider report, noted that the top two lithography vendors – ASML and Nikon – had a 27 percent growth rate (32 percent for ASML and 8 percent for Nikon), which was double the semiconductor equipment industry’s average of 13 percent.

Applied's revenues include three months of Varian's revenues. (Source: VLSI Research Inc)

The strong growth from lithography masked what Hutcheson said was “a tough year” for process equipment suppliers. The non-lithographic suppliers had a much lower growth rate, only 5 percent, compared with the lithography vendors. Rather than adding capacity with a full line of tools, memory companies bought immersion scanners to move to 2x linewidths on existing lines, in some cases using double-patterning which also drives the need for more litho tools. Process lines at memory and foundry vendors could be upgraded largely by buying new exposure tools, without similarly heavy investments in deposition, etch, implant, and cleaning tools.

The 2011 rankings put Applied Materials − which saw its semiconductor revenues grow 2 percent last year − in the second-ranked slot for the first time since 1992, and it will interesting to see how the current year shakes out. The VLSI Research 2011 ranking included three months of results – from Nov. 1 to Dec. 31 — from Varian Semiconductor, acquired by Applied Materials last year. Varian’s full-year results will be included in the 2012 ranking; if Varian’s full-year 2011 revenues had been added to Applied’s in the 2011 rankings from VLSI Research, then Applied would have easily kept the coveted top spot. Varian had $1.096 billion in revenues from Jan. 1 to Oct. 31.

Another merger – between No. 5 Lam Research and No. 10 Novellus Systems – will shake up the 2012 rankings. With $4.122 in combined 2011 revenues, the expanded Lam Research is likely to fill the No. 4 slot in the 2012 rankings, despite surging revenues from KLA Tencor as companies invest heavily in process monitoring equipment.

Going forward, the introduction of EUV lithography could supercharge ASML’s revenues. With EUV scanner prices said to be in the $100-$125 million-plus range, ASML could retain its No. 1 ranking if EUV adoption moves forward.

In the test arena, the merger of Advantest and Verigy helped propel Advantest past Teradyne into the top spot. Advantest’s results included Verigy’s total from July 1 to the end of the year. Also, Advantest enjoyed strong sales to Intel in 2011. However, Teradyne’s revenues have been strong of late, Hutcheson noted, indicating a tight race between Advantest and Teradyne for the test crown this year.

Source: VLSI Research Inc)

Nikon Pushes 193nm Immersion, Explores 6.7nm EUV

Tuesday, February 14th, 2012

By Mark LaPedus, SemiMD senior editor

Nikon Corp. has outlined its roadmap, saying that it will continue to push 193nm immersion lithography for at least three more tool generations.

As before, the Japanese equipment giant will take a slightly less aggressive stance on extreme ultraviolet (EUV) lithography. However, the company disclosed that it has begun to conduct research on 450mm tools as well as 6.7nm wavelength EUV.

Nikon’s strategy is somewhat different than rival ASML Holding NV, which is aggressively — and simultaneously — pushing both 193nm immersion and EUV. Nikon’s main strategy is to push “immersion extensions,” said Hamid Zarringhalam, executive vice president for Nikon Precision Inc.

“Nikon is also doing a lot of work” in EUV, he said  during the LithoVision 2012 technology conference in San Jose, Calif. on Sunday (Feb. 12). The event is sponsored by Nikon.

Nikon sees 193nm immersion extending to 22nm. Then, EUV may be required for 16nm half-pitch and 11nm half-pitch technologies,  said Masato Hamatani, general manager of the stepper headquarters for Nikon.

The company has recently begun shipping the NSR-S621D 193nm immersion scanner. The S621D makes use of its Streamlign Platform. The combination of Stream Alignment and Five-Eye FIA systems enables a throughput of 200 wafers per hour (125 exposure shots/wafer). In addition, the Bird’s Eye Control system uses interferometers in conjunction with encoders to deliver overlay accuracy ≤ 2 nm with optimal stability.

Following the S621D, Nikon has two more 193nm immersion scanners on the roadmap: the S62XD and S6XX. Nikon did not elaborate on the specifications or delivery timetables.

Hamatani said the company is also exploring 450mm tools. “The Streamlign technology is suitable for 450mm,” he said.

Meanwhile, commenting on the business climate, Zarringhalam sees a mixed picture for fab tool equipment spending. “There are still technology buys out there,” he said, but there is little spending in the DRAM industry. For select logic vendors, there is “both technology and capacity buys,” he said.

Foundry Rivals Say EUV Not Ready for Prime Time

Tuesday, February 14th, 2012

By Mark LaPedus, SemiMD senior editor

Two foundry vendors — GlobalFoundries Inc. and Taiwan Semiconductor Manufacturing Co. Ltd. (TMSC) — are clearly rivals and have different strategies in the market.

But lithography experts from both foundry vendors agree on one thing: The progress for extreme ultraviolet (EUV) lithography is going slower than expected and the technology is not ready for prime time right now.

The question is when will EUV move into mass production? It’s unclear — at least based on the answers from GlobalFoundries and TSMC. As a result, GlobalFoundries may have to change its lithography strategy. And TSMC is proposing to use multi-beam e-beam to expose all layers when the foundry moves to 450mm fabs.

Because of the lack of adequate power sources, EUV throughputs are running about 4 wafers an hour right now, according to GlobalFoundries. The industry requires throughputs of around 100 wafers an hour to make EUV economical viable in production fabs.

EUV “is not ready yet,” said Obert Wood, principal member of the technical staff for strategic lithography technology at GlobalFoundries, during a presentation at the SPIE Advanced Lithography conference on Monday (Feb. 13).

“My company would use it if it was ready,” Wood said. “I can’t do processing at 4 wafers an hour. Gaps between device requirements and the current capabilities of EUV still persist.”

Commenting when EUV will be ready for production fabs, he said: “EUVL will be used when EUVL manufacturing costs are lower or equal to 193nm immersion. When is when it makes economic sense.”

There are several issues with EUV, namely the power source. Asked about the progress with the EUV power source, Burn Lin, vice president of the nano-patterning division at TSMC, said: “I am not happy about it.”

Two litho paths

GlobalFoundries and TSMC have different lithographic roadmaps. At present, GlobalFoundries — the foundry spinoff of Advanced Micro Devices Inc. (AMD) — uses 193nm immersion tools from both ASML Holding NV and Nikon Corp. for the critical layers in various devices.

In the first quarter of 2013, GlobalFoundries is expected to receive ASML’s NXE:3300B, a full-blown production EUV tool. The company took a different approach than other EUV customers. Initially, to get their feet wet for EUV, Intel, Samsung, TSMC and others procured ASML’s NXE:3100, a pre-production EUV tool. GlobalFoundries opted not to procure the NXE:3100, and, instead, decided to obtain the NXE:3300B.

At one time, GlobalFoundries hoped to offer both EUV and 193nm immersion pattering options for chip production at the 20nm node. GlobalFoundries hoped EUV would be ready at least by the tail end of 20nm. The company is expected to move into risk production for the 20nm node in the second half of 2012, followed by volume production in 2013.

Given that EUV is late to the party, GlobalFoundries will likely have to change part of its patterning strategy and extend 193nm immersion. Meanwhile, during the SPIE presentation, Wood said EUV is key to lower mask count and reduce overall chip-manufacturing costs. When EUV goes into production, the technology would initially be used for “contacts and vias,” he said.

The trouble is there are still gaps with the technology. EUV throughput is currently four wafers an hour, he said. The industry requires a 250 Watt power source, enabling 100 wafer an hour throughputs.

EUV overlay accuracy stands at <7nm today, but the industry requires 2.5nm to 5nm, he said. Because there is no pellicle for EUV, the defect handling levels are around 0.04 adder/cycle; the industry requires <0.01 adder/cycle.

TSMC like maskless

For some time, TSMC has not changed its lithography roadmap. The company plans to extend 193nm immersion down to 20nm. Lin said TSMC is still evaluating three lithography options for the critical layers at 14nm: EUV, multi-beam e-beam and 193nm immersion multi-patterning. TSMC has been one of the champions for multi-beam e-beam or maskless lithography, where the silicon foundry giant is evaluating three vendors in the arena: IMS, KLA-Tencor and Mapper.

In a major surprise, Lin said TSMC is even considering inserting multi-beam e-beam lithography exclusively when it moves to 450mm wafers. At 14nm, TSMC would like to put finFET transistors into production. It is also looking at a monumental shift to 450mm wafer fabs at the node.

Maskless would not only handle the critical layers but also the non-critical layers for chips in 450mm fabs, Lin said. This would save time and money, because chip makers would only have to develop “one system for all resolutions,” he said.

“We think e-beam will rule our world and would bury photons,” he said during the presentation. In an interview, Lin was quick to point out that the idea of inserting multi-beam e-beam for all layers within a 450mm fab is only a “proposal” and not a definite strategy within TSMC.

Still, in one scenario, Lin said KLA-Tencor Corp.’s multi-beam concept — dubbed Reflective Electron Beam Lithography (REBL) — could be configured to support 450mm production. KLA-Tencor’s 300mm REBL concept makes use of a rotary stage and 36 separate e-beam columns.

The 450mm concept could support 81 columns to reduce the cost for 450mm fabs. “The columns are small and cheap,” he said. A multi-beam e-beam from Mapper or IMS could also be configured for 450mm fabs, he added.

Still, multi-beam e-beam technology is unproven and suffers from throughput, shot noise and cost issues.

Intel Wants EUV but Keeps Lithography Options Open

Sunday, February 12th, 2012

By Mark LaPedus, SemiMD senior editor

During the LithoVision 2012 technology conference in San Jose, Calif. on Sunday (Feb. 12), Intel Corp. reiterated its plans to insert extreme ultraviolet (EUV) lithography as its first choice for the 10nm node, but the company is keeping its options open.

The chip giant is devising a back-up plan. If EUV remains late to the party, Intel said it could shift gears and implement 193nm immersion — bolstered by complex multi-pattering schemes at its 10nm node. In addition, Intel also disclosed it will install an EUV pilot line by the end of 2012, which was previously announced by the company.

“Right now, we’re proceeding in parallel” with both EUV and multi-patterning, said Sam Sivakumar, director of lithography in Intel’s Portland Technology Development Group in Oregon. “When the time comes, we will make a decision.”

Intel is still counting on inserting EUV at its 10nm node, but there are still several major issues with the power sources, mask infrastructure and other technologies. Other challenges include edge-placement accuracy and control of edge placement error.

“EUV has a lot of promise,” Sivakumar said. But the power sources “have a long ways to go,”  and the EUV mask infrastructure faces “a big challenge.”

“Our focus is to bring EUV into production.  A lot of (the technical issues) are not under Intel’s control,” he told SemiMD after his presentation at the event, which was sponsored by Nikon Corp. The annual event kicks off this week’s SPIE Advanced Lithography conference in San Jose.

Intel’s roadmap

Sivakumar outlined Intel’s lithography roadmap during his presentation, noting that Intel inserted its initial 193nm immersion scanners at its 32nm node. Nikon Corp. was the sole supplier of 193nm immersion scanners for the “critical layers” at Intel’s 32nm node.

At 22nm, Intel rolled out its finFET transistor technology, which has just moved into production. The company is still using 193nm immersion scanners for the “critical layers” at that node. The critical layers are reportedly being split between ASML Holding NV and Nikon.

Then, at 14nm, Intel will continue to use 193nm immersion for the critical layers, Sivakumar said.  And it will implement an undisclosed type of “pitch-halving” — or double patterning — technology at that node, he said.  Intel’s 14nm process is expected to be ready by 2013.

Like 20nm, Intel will use both ASML and Nikon for the critical layers, sources said. Nikon recently announced that its new NSR-S621D 193nm immersion scanner began shipping to IC manufacturers in January “for the most demanding immersion double patterning layers.” Nikon shipped the tools to its largest customer, reportedly for Intel’s 14nm node, sources said. Intel did not comment.

The S621D makes use of Nikon’s Streamlign Platform. The combination of Stream Alignment and Five-Eye FIA systems enables a throughput of 200 wafers per hour (125 exposure shots/wafer). In addition, the Bird’s Eye Control system uses interferometers in conjunction with encoders to deliver overlay accuracy ≤ 2 nm with optimal stability.

Intel does not plan to use EUV for the 14nm node. But to get the ball rolling, the company plans to install an EUV pilot line by the end of 2012 and into 2013, he said. In that line, the company is expected to install ASML’s  NXE:3100, a pre-production, 13.5nm EUV tool.

Then, at 10nm, the company reiterated its previous roadmap. At that node, which is due out in 2015, Intel is looking at two options. The first option is EUV for the critical layers. It is still unclear if EUV will be ready for insertion at that node.  “We are not in a position to make a decision today with great detail,” Sivakumar said. Much of this depends upon the cost, power sources, reticle infrastructure, and other challenges, he said.

Intel has already obtained ASML’s NXE:3100, and is working with the tool in its R&D lab. Intel is also a customer for ASML’s NXE:3300B, its first full-blown, production EUV tool.  ASML is expected to ship the tool to undisclosed customers in the second half of 2012. Asked if EUV will be ready at least by 2013, Sivakumar said: “It’s hard to say. We will have to see.”

If EUV is not ready, the second option is to use 193nm immersion with multi-patterning, which includes double-patterning, quadruple patterning and complementary patterning. No decision has been made.

In one scenario, Intel could use pitch quartering — or quadruple  patterning. In another option, Intel could implement what it calls “complementary patterning.”

IC vendors have traditionally used two-dimensional layouts, but there are scaling and related issues with this technology. Instead, the industry is looking at one-dimensional layouts based on gridded design rules. Intel uses unidirectional, gridded layouts at 45-nm. In this approach, there are two lithography steps — grating and line cut — to pattern designs. At 20nm and above, 193nm immersion tools can handle both steps.

In this approach at 14nm, a 193nm immersion tool can perform the traditional grating step. Then, to perform the next step — the finer-line cut scheme — the industry is looking at EUV, maskless e-beam, and even 193nm immersion.

In one possible scenario, Intel could implement 10nm with an expensive “five mask solution.” In the grating step, one mask would make use of 193nm immersion. For the line cut step, the other four masks would also use 193nm immersion. However, in a less expensive scenario, Intel could implement a two-mask solution. The first mask would implement a grating process using 193nm immersion. The cut step for the second mask would be implemented using EUV.

There is also an option to use multi-beam e-beam tools at the cut process as well. “That is an option,” he said. “As the tools mature, that will be in the mix.”

Cymer’s EUV Power Source Roadmap Slips

Friday, February 3rd, 2012

By Mark LaPedus, SemiMD senior editor

Amid record sales for the fourth quarter, Cymer Inc. disclosed that it has delayed the shipment of its 20 Watt extreme ultraviolet (EUV) power source upgrade unit by nearly a quarter.

The company also remains under pressure to deliver a separate 100 Watt power source for EUV by mid-year. The main EUV tool vendor — ASML Holding NV — expects to ship its NXE:3300B, a full-blown, 13.5nm EUV production tool, in the second half of 2012. Cymer is one of the EUV power source vendors for that tool.

For some time, Cymer has been shipping an EUV power source operating at 8 Watts, which is designed for ASML’s NXE:3100, a pre-production EUV machine. Cymer shipped three 8 Watt EUV power sources in the fourth quarter of 2011, which was ahead of schedule by a quarter.

However, the company was originally supposed to ship a 20 Watt upgrade for the NXE:3100 by the end of 2011 or the beginning of the first quarter of 2012. The unit, dubbed “Upgrade 1,” is said to have less than a 0.5 percent dose stability and a 90 percent duty cycle.

Now, Upgrade 1 will get shipped by the end of the first quarter, which represents a 1-to-2 month delay. “Upgrade 1 is behind schedule relative to our last call,” said Bob Akins, Cymer’s chief executive, during a conference call.

The Upgrade 1 unit was expected to be “accomplished by year end,” he said. Now, the upgrade will be shipped “before the end of the quarter. It won’t run at 20 Watts initially. By (the second quarter, it) will be at full power.”

In reality, the EUV power sources are far behind schedule. ASML says it is one or two years behind in EUV roadmap. “We are significantly behind our roadmap,” Akins said.

“Cymer has proven 20 Watts internally, but is only now in the process of getting qualified at ASML,” said C.J. Muse, an analyst with Barclays Capital, in a report. “Cymer remains confident that it can get it done, but it appears that instead of reaching this milestone by the end of 1Q ‘12, ASML will likely not qualify the laser until the April-May timeframe.

“The laser is at ASML today, and is in the process of getting qualified, and Cymer still expects this light source to be deployed to chipmakers some time in 1H ‘12. Here, the primary technical issue is duty cycle, where the main problems remain the thermal stability of the optics, gas stability of the laser and better control of the firing/timing of the laser/droplets,” Muse said.

In the meantime, Cymer and other EUV source vendors are developing separate power sources for ASML’s NXE:3300B. The tool is expected to have a throughput of 69 wafers an hour, which requires a 100 Watt power source.

Cymer expects to deliver that source on time and “in the summer of this year,” Akins said during the call. “That’s not without some risk. We are trying as hard as we can.”

“Cymer also discussed running parallel work in producing its (high volume manufacturing) source 2 for ASML’s 3300 tools,” Barclay’s Muse said. “On this front, Cymer remains optimistic it can meet the schedule previously discussed. So clearly some disappointment here — but we continue to believe Cymer will prove successful in its EUV light source effort, as we believe many of the challenges are more evolutionary than revolutionary.”

But to hedge its bets in case of EUV delays — and to prepare for the multi-patterning era — ASML has bolstered its 193nm immersion roadmap. As reported, the Dutch-based company is developing at least two more generations of its 193nm immersion tools, including a scanner designed to process 300 wafers an hour.

The semiconductor industry is currently transitioning to development and high-volume manufacturing of 20nm generation process devices, with the most critical layers exposed using 193nm immersion scanners and incorporating double patterning. “Lithography solutions that deliver ultra-high productivity and exceptional overlay accuracy are imperative to making double patterning cost effective,” said Hamid Zarringhalam, executive vice president of Nikon Precision Inc.

This week, Nikon announced that its NSR-S621D 193nm immersion scanner began shipping to IC manufacturers in January “for the most demanding immersion double patterning layers.” Nikon shipped the tools to its largest customer, reportedly Intel Corp.

The S621D makes use of its Streamlign Platform. The combination of Stream Alignment and Five-Eye FIA systems enables a throughput of 200 wafers per hour (125 exposure shots/wafer). In addition, the Bird’s Eye Control system uses interferometers in conjunction with encoders to deliver overlay accuracy ≤ 2 nm with optimal stability.

Meanwhile, for the fourth quarter of 2011, Cymer posted a net income of $12.5 million, equal to $0.40 per share, compared to net income of $32.9 million, equal to $1.08 per share in the fourth quarter of 2010 and net income of $11.3 million, equal to $0.36 per share, in the third quarter of 2011.

Revenue totaled $152.9 million, compared to revenue of $146.9 million in the fourth quarter of 2010, and revenue of $128.7 million in the third quarter of 2011. Cymer beat the consensus forecast for the quarter, which called for sales of $129 million and earnings of $0.23.

For the first quarter of 2012, revenue is expected to be approximately $138 million. Commenting on the outlook for the first quarter of 2012, Akins said: “We expect Installed base products revenue to remain at or above the prior quarter level led by installed base growth, increased ArF pulses and light source product enhancements. We anticipate shipping a similar number of DUV ArF Immersion light sources, as compared to last quarter, but a lower number of KrF. We also anticipate recognizing revenue on our fourth 3100 EUV source and our third TCZ system.”

With EUV orders pulled into 4Q, Cymer guided below analysts’ estimates for the first quarter. The consensus forecast is $0.31 a share on sales of $150 million for the first quarter.

Next Page »