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Posts Tagged ‘Lam Research’

China Bolsters its IC Gear Business with Mattson Acquisition

Thursday, December 10th, 2015

By Jeff Dorsch, Contributing Editor

Mattson Technology agreed this month to be acquired by Beijing E-Town Dragon Semiconductor Industry Investment Center, a limited partnership in China, for about $300 million in cash. The deal marks one of the first signs that the “Made in China 2025” policy will include targeting semiconductor production equipment as an element in bolstering the domestic chip business in the People’s Republic of China.

Brad Mattson, CEO

Mattson supplies dry strip, etch, millisecond anneal, and rapid thermal processing equipment for semiconductor manufacturing. The company was founded in 1988 by Brad Mattson, who earlier established Novellus Systems, acquired by Lam Research in 2012.

Mattson served as the company’s chief executive officer until 2001, and was its vice chairman until 2002. He later became a partner at VantagePoint Capital Partners and now serves as the CEO of Siva Power, a solar startup originally known as Solexant.

In 2014, Mattson Technology posted net income of $9.88 million on revenue of $178.4 million, after being unprofitable for the previous four years. Samsung Electronics accounted for about 61 percent of net revenue last year; Samsung and Taiwan Semiconductor Manufacturing were its leading customers in 2013.

China represented nearly 10 percent of Mattson’s revenue in 2014, a percentage that may rise once the acquisition transaction is completed in early 2016, pending shareholder and regulatory approval.

Mattson Technology has remained profitable this year, reporting net income of more than $2 million on revenue of $38.9 million for the third quarter ending September 27, compared with net income of $2.6 million on revenue of $43.3 million for the same quarter of 2014.

For the first nine months of 2015, the company posted net income of $10.9 million on revenue of $140.5 million, compared with net income of $4.9 million on revenue of $123.7 million in the like period of 2014.

In the dry strip market, Mattson competes with Lam Research and PSK. Its principal competitors in thermal annealing are Applied Materials, Dainippon Screen Manufacturing, and Ultratech. Etch rivals are Applied, Lam, and Tokyo Electron, according to Mattson’s 10-K annual report for 2014.

G. Dan Hutcheson, VLSI Research Inc.

“The Chinese are trying to develop their own semiconductor equipment business,” said G. Dan Hutcheson, chairman and CEO of VLSIresearch. Buying a company like Mattson is “a great way to start,” he added.

Recalling the 1980s, Hutcheson commented, “Mattson was one of the really go-go companies at the time.” There were 10 to 20 vendors in every segment, he recalled. With industry consolidation of equipment suppliers, “it’s become harder for companies like that,” he said. “You almost have to be a billion-dollar company” to stand out in the market these days, Hutcheson added.

Fusen Chen, Mattson’s president and CEO, “has been a shot in the arm, turning it around,” Hutcheson said about the company. “It’s hard to have differentiation from Applied and Lam.”

Noting the dominance of Samsung and TSMC among Mattson’s customer base, Hutcheson said, “There’s only three customers” – those two chipmakers and Intel. “Those guys can develop their own technology,” he added.

Having Mattson as an equipment supplier helps “keep the competition honest,” Hutcheson noted.

The veteran industry observer said such a deal is “good for the Chinese.” The country aspires to become a world leader in computers, networks and telecommunications, without having to import most of the semiconductors it needs. “You can’t do that without semiconductors,” Hutcheson added.

The fabless semiconductor business in China has grown tremendously in this decade. “No one’s graduating designers like China is,” Hutcheson said. “They get their PhDs in the U.S., their visas expire, and we tell them, ‘go back home.’”

China is following the example of South Korea and Taiwan in building up an electronics industry with a comprehensive supply chain, although not all Asian countries have done well in fostering semiconductor equipment vendors, according to Hutcheson.

“It’s a real classical error” to assume that semiconductor production equipment is merely hardware that is easy to design and manufacture, Hutcheson commented. “It’s not just stuff made in a machine shop,” he added, noting the need for extensive software in IC gear.

At its size, “Mattson is one of the last companies you can buy,” Hutcheson concluded.

Lam Research, KLA-Tencor to Combine in $10.6 Billion Deal

Wednesday, October 21st, 2015

By Jeff Dorsch, Contributing Editor

Lam Research has agreed to acquire KLA-Tencor for $10.6 billion in cash and stock. The two giant suppliers of semiconductor capital equipment expect to close the transaction in mid-2016, subject to regulatory and shareholder approval.

The mammoth deal was announced on the same day as Western Digital saying it will purchase SanDisk for about $19 billion in cash and stock, continuing the yearlong trend of consolidation and megamergers in the semiconductor industry, and now in IC equipment, as well.

The news of the proposed tie-up between Lam and KLA-Tencor was greeted enthusiastically by industry analysts and perhaps less so at 3050 Bowers Avenue in Santa Clara, California – the headquarters of Applied Materials.

Srini Sundararajan, an analyst with Summit Research Partners, wrote of the blockbuster deal, “This is just what the doctor ordered. It removes excessive dependence of LRCX on memory and excessive dependence of KLAC on foundry/logic.  We expect minimal opposition to this deal from the various jurisdictions, rather easily handled.  Second, this deal is quite negative for Applied Materials (AMAT) and Hermes Microvision and perhaps for ASML also.  In the case of AMAT, their process diagnostics and control division being based in Israel does not allow of meshing of capabilities, and product synergies really don’t exist.  In the case of Hermes Microvision, since etch is the pre-dominant user of e-beam inspection due to testing of contacts, a combination of KLAC and LRCX with both e-beam and etch capabilities can be lethal.”

Both companies have experience in large mergers, with Lam acquiring Novellus Systems in 2012. KLA Instruments merged with Tencor Instruments in 1997. And both companies are generally active in strategic acquisitions.

The megadeal values KLA-Tencor common stock at roughly $67.02 per share, a premium of about 24 percent to KLAC’s closing price of $53.86 on Tuesday (October 20).

With the closing of the deal, KLA-Tencor shareholders will own around 32 percent of the combined company, which will be called Lam Research Corporation. Martin Anstice, president and chief executive officer of Lam Research, will serve as the combined company’s CEO. Lam Chairman Steve Newberry will continue in that post. Upon closing, two members of the KLA-Tencor board of directors will join the Lam board.

Lam Research also reported net income of $288.7 million on revenue of $1.6 billion for the quarter ended September 27, compared with net income of $141.1 million on revenue of $1.15 billion for the same quarter a year ago.

KLA-Tencor reported results for its fiscal first quarter ended September 30, with net income of $104.9 million on revenue of $642.64 million. That compared with year-ago net income of $72.23 million on revenue of $642.9 million.

Got MEMS? Get In Touch With memsstar For Production Equipment

Friday, July 17th, 2015

By Jeff Dorsch, Contributing Editor

As you might guess from the company’s name, memsstar is involved in microelectromechanical system (MEMS) devices. The company offers manufacturing equipment for “MEMS-specific production,” says CEO Tony McKie.

Based in Livingston, Scotland, memsstar wants to help in making “MEMS on top of silicon,” he adds.

“There are no such things as standard MEMS,” McKie notes. “MEMS are becoming more complicated.”

While most people are familiar with the MEMS devices in smartphones, like accelerometers and pressure sensors, the Internet of Things will call for different kinds of MEMS and other products, according to McKie. “You need hardware to do that,” he says of IoT. “The rest is filled by software.”

McKie estimates the worldwide market for MEMS production equipment is currently worth about $10 million to $15 million a year. “It’s a growing market,” he says. IoT and other new technologies call for “more and more things that are not CMOS-related,” he adds. Producing new types of MEMS will likely see the startup of more 200-millimeter wafer fabrication facilities, according to McKie.

The primary competitor of memsstar is the SPTS Technologies subsidiary of Orbotech, McKie says.

The company is also involved in refurbishing and remanufacturing deposition and etch equipment from such vendors as Applied Materials, Lam Research, and Novellus Systems (now part of Lam), while providing spare parts for those systems.

Founded in 2003 as Point 35 Microstructures, memsstar received an investment from Albion Ventures in 2007, and has since been a self-funded company, McKie says.

Atomic Layer Etch now in Fab Evaluations

Monday, August 4th, 2014

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By Ed Korczynski, Sr. Technical Editor

Atomic-Layer Etch (ALE) technology from Lam Research Corp. is now in beta-site evaluations with IC fabrication (fab) customers pursuing next generation manufacturing capabilities. So said Dr. David Hemker, Lam’s senior vice president and chief technical officer, in an exclusive interview with Solid State Technology and SemiMD during this year’s SEMICON West trade-show in San Francisco. Hemker discussed the reasons why ALE is now under evaluation as a critically enabling technology for next generation IC manufacturing, and forecast widespread adoption in the industry by 2017.

As detailed in the feature article “Moving atomic layer etch from lab to fab” in last December’s issue of Solid State Technology, ALE can be plasma enhanced with minor modifications to a continuous plasma etch chamber. The lab aspects including the science behind the process were discussed in a TechXPOT during SEMICON West this year in a presentation titled “Plasma Etch in the Era of Atomic Scale Fidelity” by Lam’s Thorsten Lill based on work done in collaboration with KU Leuven and imec. In that presentation, Lill reminded the attendees that the process has been explored in labs under a wide variety of names:  ALET, atomistic etching, digital etch, layer-by-layer etch, PALE, PE-ALE, single layer etch, and thin layer etching.

ALE can be seen as a logic counter-part to atomic-layer deposition (ALD), with the commonality that both processes become cost-effective when the amount of material being either added or removed are readily measured in atomic layers. It’s comforting that when the industry needs control to the atomic-level we are dealing with such tiny structures that ALD and ALE can provide acceptable throughputs. “By 2017, we see able 15% of the opportunity for us could be addressed by atomic processing,” projected Hemker.

However, ALE as promoted by Lam differs from ALD, because etch processes generally need directionality. “That’s where it diverges from ALD,” explained Hemker. “Using ions we get all the benefits of directionality and selectivity. Likewise, if we design the process correctly, we could theoretically have infinite selectivity with under layers.” Figure 1 shows a trench formed in single-crystal silicon using ALE, with vertical side-walls and a bottom surface smooth at the atomic scale. Such process capability is based on the pulsing of both energy and chemistry into the reaction chamber.

Fig. 1: (Left) Schematic cross-section of Atomic-Layer Etch (ALE) of silicon using a silicon-oxide top mask, (Middle) SEM cross-section of nominal 40-nm silicon trench, and (Right) TEM close-up of the silicon surface showing atomic-scale smoothness.

“We need to be able to pulse multiple things at the same time,” explained Hemker. “So we can absorb a reactant, and then switch over to a plasma. The breakthrough in this is being able to pulse everything correctly.” Labs have been doing this but on a timescale of minutes per atomic layer removed. Lam productized the principle to run on a time-scale of seconds on the 2300 Kiyo tool, which is the current leading-edge hardware for conductor etch from the company.

Pulsing of energy into a reaction chamber has been used in the company’s high aspect-ratio etch process for 3D NAND which runs on the 2300 Flex tool for dielectrics. In this process flow, vias through alternating layers of oxide and nitride in a stack must be etched at 40:1 aspect-ratio today, with 60:1 and even 100:1 aspect-ratio specifications from Samsung for device evaluations. “You see it coming in with pulsing the plasma, allowing us to get ions in and reactants out,” explained Hemker. So the ALE process can be seen as an extension of this pulsing plasma approach, with the extra sophistication of pulsing the chemical precursors into the chamber. “The trick is how to do it repeatably and reliably so that it’s production worthy,” reminded Hemker.

When the ALE precursor adsorbs as a single-layer on surfaces, the connection to the surface could be merely van der Waals forces, or depending upon the application could include some reaction with underlying atoms. “The process conditions have to tailored for flows and gases, but it does open up the possibility of using less expensive process gases. There’s no new gases needed,” declared Hemker. “The real message is not that this is just a new process, but this shares a common background with ALD in pulsing things and having sophisticated enough control of the process.”

Such commonalities would seemingly extend to some chamber hardware and the vacuum and effluent abatement systems, such that it would be very straightforward to cluster single-wafer processing chambers for ALD with ALE with plasma pre-treat and possibly even with annealing. Such a cluster would allow for sophisticated “dep/etch” recipes to be developed for atomic-scale device fabrication.

Fig. 2: Commonality in the need for ALD and ALE process technologies when IC device dimensions scale to atomic levels.

Figure 2 shows the comparison between ALD and ALE processes for a trench structure, and why both are needed when device geometries reach atomic-scales. When trench aspect ratios (AR) are ~1:1 continuous deposition and etch processes can be fairly easily developed to provide uniform results. However, as the AR increases, reaction byproducts tend to non-uniformly deposit on sidewalls and especially at the corners of structures. Eventually, the top of high AR trenches “pinch-off” to create an open in IC circuitry, even when slowing down continuous processes to allow more time for byproducts to escape reaction areas.

Lam expects ALE to be used on the leading-edge of IC manufacturing within a few years, with increasing applications as more critical layers in a device must be patterned to smaller than 22nm half-pitch. “It’s not that you can’t do some of these processes with continuous etch, but ALE really opens up the process window,” explained Hemker. Now is the time for ALE, since the minimum variability of continuous etching consumes more and more of the critical dimension with ever smaller feature sizes.

“If you look at ALD as the for-runner of this, it was first adopted for capacitor deposition in a batch process, then it migrated to single-wafer for high-k metal-gate formation where greater control was needed,” reminded Hemker. “It was used but somewhat niche, and now we’re seeing traction on ALD for many more applications such as quadruple-patterning. The spacers themselves have to be perfectly conformal, because any thickness variation will be a CD variation and it compounds with quadruple patterning.”

Control of pattern fidelity at the atomic-scale will be needed as the commercial IC fab industry integrates new materials for improved device functionalities. ALE and other technologies that can control processing of individual atomic layers should be used to pattern ICs for the indefinite future.

3D memory for future nanoelectronic systems

Wednesday, June 18th, 2014

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By Ed Korczynski, Sr. Technical Editor

The future of 3D memory will be in application-specific packages and systems. That is how innovation continues when simple 2D scaling reaches atomic-limits, and deep work on applications is now part of what global research and development (R&D) consortium Imec does. Imec is now 30 years old, and the annual Imec Technology Forum held in the first week of June in Brussels, Belgium included fun birthday celebrations and very serious discussions of the detailed R&D needed to push nanoelectronics systems into health-care, energy, and communications markets.

3D memory will generally cost more than 2D memory, so generally a system must demand high speed or small size to mandate 3D. Communications devices and cloud servers need high speed memory. Mobile and portable personalized health monitors need low power memory. In most cases, the optimum solution does not necessarily need more bits, but perhaps faster bits or more reliable bits. This is why the Hybrid Memory Cube (HMC) provides >160Gb/sec data transfer with Through-Silicon Vias (TSV) through 3D stacked DRAM layers.

“We’re not adding 70-80% more bits like we used to per generation, or even the 40% recently,” explained Mark Durcan, chief executive officer of Micron Technology. “DRAM bits will only grow at the low to mid-20%.” With those numbers come hopes of more stability and less volatility in the DRAM business. Likewise, despite the bit growth rates of the recent past, NAND is moving to 30-40%  bit-increase per new ‘generation.’

“Moore’s Law is not over, it’s just slowing,” declared Durcan. “With NAND, we’re moving from planar to 3D, and the innovation is that there are different ways of doing 3D.” Figure 1 shows the six different options that Micron defines for 3D NAND. Micron plans for future success in the memory business to be not just about bit-growth, but about application-specific memory solutions.

Fig. 1: Different options for Vertical NAND (VNAND) Flash memory design, showing cell layouts and key specifications. (Source: Micron Technology)

E. S. Jung, executive vice president Samsung Electronics, presented an overview of how “Samsung’s Breaking the Limits of Semiconductor Technology for the Future” at the Imec forum. Samsung Semiconductor announced it’s first DRAM product in 1984, and has been improving it’s capabilities in design and manufacturing ever since. Samsung also sees the future of memory chips as part of application-specific systems, and suggests that all of the innovation in end-products we envision for the future cannot occur without semiconductor memory.

Samsung’s world leading 3D vertical-NAND (VNAND) chips are based on simultaneous innovation in three different aspects of materials and design:

1)    Material changed from floating-gate,

2)    Rotated structure from horizontal to vertical (and use Gate All Around), and

3)    Stacked layers.

To accomplish these results, partners were needed from OEM and specialty-materials suppliers during the R&D of the special new hard-mask process needed to be able to form 2.5B vias with extremely high aspect-ratios.

Rick Gottscho, executive vice president of the global products group Lam Research Corp., in an exclusive interview with SST/SemiMD, explained that with proper control of hardmask deposition and etch processes the inherent line-edge-roughness (LER) of photoresist (PR) can be reduced. This sort of integrated process module can be developed independently by an OEM like Lam Research, but proving it in a device structure with other complex materials interactions requires collaboration with other leading researchers, and so Lam Research is now part of a new ‘Supplier Hub’ relationship at Imec.

Luc Van den hove, president and chief executive officer of Imec, commented, “we have been working with equipment and materials suppliers form the beginning, but we’re upgrading into this new ‘Supplier Hub.’ In the past most of the development occurred at the suppliers’ facilities and then results moved to Imec. Last year we announced a new joint ‘patterning center’ with ASML, and they’re transferring about one hundred people from Leuven. Today we announced a major collaboration with Lam Research. This is not a new relationship, since we’ve been working with Lam for over 20 years, but we’re stepping it up to a new level.”

Commitment, competence, and compromise are all vital to functional collaboration according to Aart J. de Geus, chairman and co-chief executive officer of Synopsys. Since he has long lead a major electronic design automation (EDA) company, de Geus has seen electronics industry trends over the 30 years that Imec has been running. Today’s advanced systems designs require coordination among many different players within the electronics industry ecosystem (Figure 2), with EDA and manufacturing R&D holding the center of innovation.

Fig. 2: Semiconductor manufacturing and design drive technology innovation throughout the global electronics industry. (Source: Synopsys)

“The complexity of what is being built is so high that the guarantee that what has been built will work is a challenge,” cautioned de Geus. Complexity in systems is a multiplicative function of the number of components, not a simple summation. Consequently, design verification is the greatest challenge for complex System-on-Chips (SoC). Faster simulation has always been the way to speed up verification, and future hardware and software need co-optimization. “How do you debug this, because that is 70% of the design time today when working with SoCs containing re-used IP? This will be one of the limiters in terms of product schedules,” advised de Geus.

Whether HMC stacks of DRAM, VNAND, or newer memory technologies such as spintronics or Resistive RAM (RRAM), nanoscale electronic systems will use 3D memories to reduce volume and signal delays. “Today we’re investigating all of the technologies needed to advance IC manufacturing below 10nm,” said Van den hove. The future of 3D memories will be complex, but industry R&D collaboration is preparing the foundation to be able to build such complex structures.

DISCLAIMER:  Ed Korczynski has or had a consulting relationship with Lam Research.


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