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2D Materials May Be Brittle

Tuesday, November 15th, 2016


By Ed Korczynski, Sr. Technical Editor

International researchers using a novel in situ quantitative tensile testing platform have tested the uniform in-plane loading of freestanding membranes of 2D materials inside a scanning electron microscope (SEM). Led by materials researchers at Rice University, the in situ tensile testing reveals the brittle fracture of large-area molybdenum diselenide (MoSe2) crystals and measures their fracture strength for the first time. Borophene monolayers with a wavy topography are more flexible.

A communication to Advanced Materials online (DOI: 10.1002/adma.201604201) titled “Brittle Fracture of 2D MoSe2” by Yinchao Yang et al. disclosed work by researchers from the USA and China led by Department of Materials Science and NanoEngineering Professor Jun Lou at Rice University, Houston, Texas. His team found that MoSe2 is more brittle than expected, and that flaws as small as one missing atom can initiate catastrophic cracking under strain.

“It turns out not all 2D crystals are equal. Graphene is a lot more robust compared with some of the others we’re dealing with right now, like this molybdenum diselenide,” says Lou. “We think it has something to do with defects inherent to these materials. It’s very hard to detect them. Even if a cluster of vacancies makes a bigger hole, it’s difficult to find using any technique.” The team has posted a short animation online showing crack propagation.

2D Materials in a 3D World -222

While all real physical things in our world are inherently built as three-dimensional (3D) structures, a single layer of flat atoms approximates a two-dimensional (2D) structure. Except for special superconducting crystals frozen below the Curie temperature, when electrons flow through 3D materials there are always collisions which increase resistance and heat. However, certain single layers of crystals have atoms aligned such that electron transport is essentially confined within the 2D plane, and those electrons may move “ballistically” without being slowed by collisions.

MoSe2 is a dichalcogenide, a 2D semiconducting material that appears as a graphene-like hexagonal array from above but is actually a sandwich of Mo atoms between two layers of Se chalcogen atoms. MoSe2 is being considered for use as transistors and in next-generation solar cells, photodetectors, and catalysts as well as electronic and optical devices.

The Figure shows the micron-scale sample holder inside a SEM, where natural van der Waals forces held the sample in place on springy cantilever arms that measured the applied stress. Lead-author Yang is a postdoctoral researcher at Rice who developed a new dry-transfer process to exfoliate MoSe2 from the surface upon which it had been grown by chemical vapor deposition (CVD).

Custom built micron-scale mechanical jig used to test mechanical properties of nano-scale materials. (Source: Lou Group/Rice University)

The team measured the elastic modulus—the amount of stretching a material can handle and still return to its initial state—of MoSe2 at 177.2 (plus or minus 9.3) gigapascals (GPa). Graphene is more than five times as elastic. The fracture strength—amount of stretching a material can handle before breaking—was measured at 4.8 (plus or minus 2.9) GPa. Graphene is nearly 25 times stronger.

“The important message of this work is the brittle nature of these materials,” Lou says. “A lot of people are thinking about using 2D crystals because they’re inherently thin. They’re thinking about flexible electronics because they are semiconductors and their theoretical elastic strength should be very high. According to our calculations, they can be stretched up to 10 percent. The samples we have tested so far broke at 2 to 3 percent (of the theoretical maximum) at most.”


“Wavy” borophene might be better, according to finding of other Rice University scientists. The Rice lab of theoretical physicist Boris Yakobson and experimental collaborators observed examples of naturally undulating metallic borophene—an atom-thick layer of boron—and suggested that transferring it onto an elastic surface would preserve the material’s stretchability along with its useful electronic properties.

Highly conductive graphene has promise for flexible electronics, but it is too stiff for devices that must repeatably bend, stretch, compress, or even twist. The Rice researchers found that borophene deposited on a silver substrate develops nanoscale corrugations, and due to weak binding to the silver can be exfoliated for transfer to a flexible surface. The research appeared recently in the American Chemical Society journal Nano Letters.

Rice University has been one of the world’s leading locations for the exploration of 1D and 2D materials research, ever since it was lucky enough to get a visionary genius like Richard Smalley to show up in 1976, so we should expect excellent work from people in their department of Materials Science and NanoEngineering (CSNE). Still, this ground-breaking work is being done in labs using tools capable of handling micron-scale substrates, so even after a metaphorical “path” has been found it will take a lot of work to build up a manufacturing roadway capable of fabricating meter-scale substrates.


Silicon Technology Extensions shown at MRS Spring 2015

Monday, June 1st, 2015

By Ed Korczynski, Sr. Technical Editor, Solid State Technology/SemiMD

In the spring meeting of the Materials Research Society held recently in San Francisco, Symposium A: Emerging Silicon Science and Technology included presentations on controlling the structure of crystalline spheres and thin-films. Such structures could be used in future complementary metal-oxide semiconductor (CMOS) devices and in photonic circuits built using silicon.

Alexander Gumennik, et al., from the Massachusetts Institute of Technology, presented on “Extraordinary Stress in Silicon Spheres via Anomalous In-Fiber Expansion” as a way to control the bandgap of silicon and thus enable the use of silicon for photodetection at higher wavelengths. A silica fiber with a crystalline silicon core is fed through a flame yielding spherical silicon droplets via capillary instabilities. Upon cooling the spheres solidify and expand against the stiff silica cladding generating high stress conditions. Band gap shifts of 0.05 eV to the red (in Si) are observed, corresponding to internal stress levels. These stress levels exceed the surface stress as measured through birefringence measurements by an order of magnitude, thus hinting at a pressure-focusing mechanism. The effects of the solidification kinetics on the stress levels reached inside the spheres were explored, and the experimental results were found to be in agreement with a pressure-focusing mechanism arising from radial solidification of the spheres from the outer shell to the center. The simplicity of this approach presents compelling opportunities for the achievement of unusual phases and chemical reactions that would occur under high-pressure high-temperature conditions, which therefore opens up a pathway towards the realization of new in-fiber optoelectronic devices.

Fabio  Carta and others from Columbia University working with researchers from IBM showed results on “Excimer Laser Crystallization of Silicon Thin Films on Low-K Dielectrics for Monolithic 3D Integration.” This research supports the “Monolithic 3D” (M3D) approach to 3D CMOS integration as popularized by CEA-LETI, as opposed to the used of Through Silicon Vias (TSV). M3D requires processing temperature below 400°C if copper interconnects and low-k dielectric will be used in the bottom layer. Excimer laser crystallization (ELC) takes advantage of a short laser pulse to fully melt the amorphous silicon layer without allowing excessive time for the heat to spread throughout the structure, achieving large grain polycrystalline layer on top of temperature sensitive substrates. The team crystallized 100nm thick amorphous silicon layers on top of SiO2 and SiCOH (low-k) dielectrics. SEM micrographs show that post-ELC polycrystalline silicon is characterized by micron-long grains with an average width of 543 nm for the SiO2 sample and 570 nm for the low-k samples. A 1D simulation of the crystallization process on a back end of line structure shows that interconnect lines experience a maximum temperature lower than 70°C for the 0.5 μm dielectric, which makes ELC on low-k a viable pathway for achieving monolithic integration.

Seiji  Morisaki, et al., from Hiroshima Univ, showed results for “Micro-Thermal-Plasma-Jet Crystallization of Amorphous Silicon Strips and High-Speed Operation of CMOS Circuit.” The researchers used micro-thermal-plasma-jet (µ-TPJ) for zone melting recrystallization (ZMR) of amorphous silicon (a-Si) films to form lateral grains larger than 60 µm. By applying ZMR on a-Si strip patterns with widths <3 µm, single liquid-solid interfaces move inside the strips and formation of random grain boundaries (GBs) are significantly suppressed. Applying such strip patterns to active channels of thin-film-transistors (TFTs) results in a demonstrated field effect mobility (µFE) higher than 300 cm2/V*s because they contain minimal grain-boundaries. These a-Si strip pattern were then used to characteristic variability of n- and p-channel TFTs and CMOS ring oscillators. The strip patterns showed improved uniformities and defect densities, in general. A 9-stage ring oscillator fabricated with conventional TFTs had a maximum frequency (Fmax) of operation of 58 MHz under supply voltage (Vdd) of 5V which corresponds to a 1-stage delay (τ) of 0.94 ns, while strip channel TFTs demonstrated 108 MHz Fmax and τ decreased to 0.52 ns.

Ebrahim  Najafi, et al., from the California Institute of Technology, showed how “Ultrafast Imaging of Carrier Dynamics at the p-n Junction Interface” based on scanning ultrafast electron microscopy (SUEM) combines the spatial resolution of an electron probe with the temporal resolution of an optical pulse to enable unprecedented studies of carrier dynamics in spatially complex geometries. Observing the behavior of carriers in both space and time provides direct imaging of carrier excitation, transport, and recombination in the silicon p-n junction and the ability to follow their spatiotemporal behavior. Carrier separation on the surface of the p-n junction extends tens of microns beyond the depletion layer, as explained by a model using a ballistic-type transport. With the invention of SUEM, it should now be possible to study density profiles and electric potentials at surfaces and interfaces at the ultrafast time scale with the spatial resolution of the electron probe.

As a reminder, the Call For Paper for the MRS Fall 2015 meeting closes on June 18.