By Mark LaPedus

Taking another shot to displace ARM, Intel recently rolled out its new microarchitecture for its Atom processor line. In a research note, Will Strauss, president of Forward Concepts, said: “How many times have we heard Intel say that its next member of the Atom processor line would finally be competitive with low-power ARM implementations? Every other year, Intel carts out a new variant that will ‘finally’ do the trick.  The next (and fourth?) iteration of the family, code named Merrifield is said to be the ‘turning point’ for the company in mobile phones.  Although the 2012 launch of Medfield-based 3G phones came close, it didn’t put a dent in ARM’s market share. Merrifield will ship in 4Q13 and phones based on the SoC will be announced at MWC in February 2014. But, the application processor is only part of the solution for a successful smartphone chip offering.  Multimode LTE modems and LTE RF transceivers are also necessary.  Yes, the Infineon-heritage RF transceivers have been fielded in Motorola LTE smartphones, but we’re still waiting for Intel’s multimode LTE modem.  It’s our understanding that the Infineon-heritage multimode 2G/3G/HSPA+ (based on CEVA’s DSP cores) will be married to the Blue Wonder-heritage single-mode LTE (based on Tensilica’s DSP cores). Since the software between the two is not compatible, we expect that has led to integration problems and subsequent delays.”

Following a disappointing period in the first quarter of this year, IHS plans to lower its chip forecast to 4.8% for 2013, down from 5.6% in the previous forecast. In 2012, the IC market fell 2.2%, according to the research firm. Mike Splinter, chairman and CEO of Applied Materials, presents his forecast.

In its most recent quarter, Applied Materials generated orders of $2.27 billion, up 7%t from the prior period, with Silicon Systems Group orders up 14% from the first quarter and Display orders up 41% sequentially. Net sales were $1.97 billion, up 25% sequentially.

At SEMI’s recent Silicon Valley Lunch Forum, speakers from Applied Materials, ASML, and Intel discussed the critical challenges of 450mm and EUV.

The infrastructure in Saratoga, N.Y. can’t keep pace with the growth. One local government organization, the Saratoga County Industrial Development Agency, voted to consider issuing GlobalFoundries nearly $70 million in bonds to finance the infrastructure, according to The Saratogian.

Three companies announced RF switches based on SOI or a variant of the technology. Skyworks rolled out some new parts. Peregrine announced a product for harsh environments. And RDA’s RF switches are being used in Samsung’s smartphones.

Mentor Graphics announced that MagnaChip Semiconductor has adopted the Pyxis custom IC design platform and the Mentor process design kit (PDK) automation process.  Mentor Graphics also announced that CNH, a supplier of agricultural and construction equipment, has transitioned to the latest VeSys software platform.

Cadence Design Systems announced that it helped Yamaha reduce power consumption for its mobile consumer chips with characterization tools.

Is TranSwitch on the block? The communications chip maker has retained Needham & Co. as financial advisor to assist the board in evaluating various strategic alternatives available to the company.

Altera has signed a definitive merger agreement to acquire Enpirion, a provider of high-efficiency, integrated power conversion products known as power SoCs (power system-on-chips).

The use of Wi-Fi functionality in small-cell base stations will be a game changer for cellphone service providers, according to IHS.

Android and iOS, the number one and number two ranked smartphone operating systems (OS) worldwide, combined for 92.3% of all smartphone shipments during the first quarter of 2013 (1Q13) as Windows Phone crept past BlackBerry for 3rd place, according to IDC.

By Mark LaPedus
The term carbon footprint seems to be “old hat” and yesterday’s measure of sustainability. “Sustainable development” is the new term. But what is it and can someone please define it? The recent European Coatings Show provided a clue, according to Lux.

For years, smart watches have failed to take off for one reason or another: they looked ugly, had weak functionality, or the battery life was lousy, according to ABI Research. However, a new collection of smart watches have emerged that could change consumers’ perceptions. Market intelligence firm ABI Research projects more than 1.2 million smart watches will be shipped in 2013.

Intel announced its results and cut its CapEx by $1 billion from $13 billion to $12 billion. Hans Mosesmann, an analyst with Raymond James, made the following observations: “With smartphones/tablets not contributing much for Intel in 2013 and the foundry growth vector still 2-3 years from being a real business, Intel is, in our view, quite vulnerable. The hope is for a datacenter recovery as an offset in 2H13 – we’ll see. Interestingly, Intel indicated in relation to its foundry strategy that it would not enable competitors that license ARM processor technology. Outside of programmable logic devices (PLDs), isn’t everybody of significance already using ARM?”

For total fab spending, GlobalFoundries plans to spend $4.4 billion this year to expand production as demand for smartphones and tablets jumps, according to Bloomberg. The spending compares with $3.8 billion last year.

TSMC raised its capital spending. Spending will be $9.5 billion to $10 billion, compared to an earlier forecast of $9 billion, according to Bloomberg. TSMC is accelerating its 20nm and finFET production.

In a blog, Applied Materials said it has recently completed the electrical characterization of through-silicon via (TSV) structures. This development is important because TSVs are the vertical interconnections that carry power and high-bandwidth speed signals between the stacked die of layered logic and memory devices.

Recently, more than 270 students from National Tsing Hua University in Hsinchu, Taiwan, crowded into the campus auditorium to hear Mike Splinter, chairman and CEO, of Applied Materials, to deliver a talk. The Applied Materials CEO told students to follow their passion.

Soitec’s solar unit has completed a debt financing plan for its Touwsrivier project in South Africa.

Soitec announced consolidated sales of 72.7 million euros for the fourth quarter, down 9.3% on a yearly basis. On a sequential basis, Q4 electronic sales were up by 19.1%.

North America-based manufacturers of semiconductor equipment posted a book-to-bill ratio of 1.14 in March, up from 1.10 from April, according to SEMI. id=highlights

Mentor Graphics announced the opening of a new Mentor-sponsored electronics design laboratory at The University of Nottingham Ningbo China (UNNC), based in the Zhejiang province. Mentor has donated more than $10 million in EDA software and support to enable UNNC students to graduate with in-depth knowledge of leading-edge design methodologies.

ASML announced its results and said the contract of Eric Meurice, president and CEO, ends next year. As of July 1, ASML’s leadership will be comprised as follows: Peter Wennink, ASML’s CFO, will be president and CEO; Martin van den Brink, ASML’s executive vice president, will be president and chief technology officer. Meurice will be chairman of ASML and act as adviser to the new leadership and the supervisory board until the end of his contract on March 31, 2014.

Intermolecular has entered into a multi-year technology development and IP licensing agreement with Micron Technology, focused on technology development and related IP for advanced memory technologies. Intermolecular has been working on DRAM technology with Elpida, which is being acquired by Micron. Now, with Micron, Intermolecular is expanding into the nonvolatile memory front with the memory maker, said Dave Lazovsky, president and CEO of Intermolecular. “New materials and device architectures are increasingly needed to meet future embedded and mobile technology requirements, and partnering with Micron in this area is a significant milestone for Intermolecular,” he said.

Tessera has named Richard Hill as interim chief executive and executive chairman of the board. Hill replaces former president and CEO Robert Young, who has decided to step down amid pressure from an investment firm.

Altera has agreed to acquire TPACK, a subsidiary of Applied Micro Circuits Corp. TPACK delivers FPGA-based optical transport network products targeting packet and optical networking equipment suppliers.

”According to Dow Jones VentureWire and other news reports, Avago has reached a deal to acquire Javelin Semiconductor, a manufacturer of CMOS power amplifiers (PAs) which services the mobile market,” said Doug Freedman, an analyst with RBC Capital Markets.

Netronome has raised $19 million in series E and related financing from Sourcefire, Intel Capital and existing investors DFJ Esprit and the Raptor Group. The company is making a next-generation flow processor line, the NFP-6xxx, which is built using Intel’s 22nm tri-gate technology.

Smartphones are forecast to account for 26% of the $30.0 billion NAND flash memory market in 2013. The NAND flash market is forecast to grow 12% in 2013, from $26.8 billion in 2012, according to IC Insights.

By Mark LaPedus
Altera has entered into an agreement for the future manufacturing of its FPGAs based on Intel’s 14nm tri-gate transistor technology. Intel will provide foundry services for the FPGA giant. That puts the processor giant on a collision course in the foundry business against the likes of GlobalFoundries, Samsung, TSMC and UMC

The Altera-Intel deal could change the landscape in the foundry business, in which Intel will likely become a much bigger player in the arena. But does Intel have staying power to remain in the foundry business? Added John Vinh, an analyst from Pacific Crest Securities: Altera’s “foundry agreement with Intel is exclusive for the foreseeable future. We believe Altera will have exclusive access versus Xilinx at 14nm and effectively have the right of first refusal at 10nm. Strategically, we believe this is likely the most significant aspect of this agreement in that it prevents Xilinx from having access.”

At SPIE, ASML Holding disclosed various milestones with its extreme ultraviolet (EUV) lithography technology. ASML’s EUV production tool, dubbed the NXE:3300B, has demonstrated resolutions of 13nm for lines and spaces and 18nm contact holes. In addition, ASML demonstrated a 40-Watt source with dose control and under good collector protection conditions in six 1-hour runs. It also demonstrated a 55-Watt source in a 1 hour run. But that’s a far cry from the eventual goal. By 2015, ASML hopes to deliver a 250-Watt source for the NXE:3300B, thereby enabling a throughput of 126 wafers an hour.

With the help of self-aligned double patterning (SADP), sometimes called spacer, ASML’s NXE:3300B also demonstrated the ability to print lines and spaces down to 9nm. The work was done in conjunction with ASML, Applied Materials and Imec.

At the International Semiconductor Strategy Symposium in Europe (ISS Europe) on Feb. 24-26, the European semiconductor industry discussed 450mm fabs and other chip topics. In addition, European Commissioner Neelie Kroes floated the idea of creating an “Airbus for chips,” a European initiative for the semiconductor industry comparable to the launch of the Airbus in the aviation industry.

Also at ISS Europe, Malcolm Penn, chairman and CEO of Future Horizons, said that the decline of the major European chip makers has been a result of a defeatist attitude, not necessarily fundamental structural issues. He suggests European chip makers should build a 450mm fab jointly and operate it as a foundry.

SEMI has announced the release of “Global Trade War and Peace: Unified Approaches to a Global Solar Energy Solution,” a white paper containing recommendations to move beyond trade litigation and encourage an accelerated path towards dispute resolution.

In case your calendar has turned into a blur, take note: Semicon is near! SEMI, in collaboration with leading investment groups, has announced the Silicon Innovation Forum (SIF). The forum will bridge funding gaps for new and early-stage companies with manufacturing and technology solutions. SIF will be held in conjunction with Semicon West, on July 9 at the Moscone Center in San Francisco.

At the Mobile World Congress in Barcelona, Peregrine Semiconductor rolled out its latest version of its UltraCMOS process technology, dubbed Semiconductor Technology Platform 8 (STeP8). UltraCMOS is a variant of silicon-on-insulator (SOI) technology called silicon-on-sapphire (SoS).

Also in Spain, Skyworks Solutions said it is ramping several antenna-tuning products with leading smartphone manufacturers. The tuning devices are based on SOI technology.

The RATP Group, the fifth-largest urban transport operator worldwide, has awarded Soitec and Philips/Step an LED lighting contract for its metro and network stations.

Soitec and Medina College of Technology have signed a cooperative agreement for concentrating photovoltaic technology in Saudi Arabia.

GT Advanced Technologies has entered into a development and licensing agreement with Soitec to develop and commercialize a hydride vapor phase epitaxy (HVPE) system for producing GaN template substrates.

Mentor Graphics announced record financial results for the company’s fiscal fourth quarter and year ended Jan. 31.

During a conference call, Walden Rhines, chairman and CEO of Mentor, said the quarter was an all-time revenue and EPS record. Rhines also has a mixed forecast for the overall IC industry in 2013. “For next year, the analysts project mid-single-digit growth, but the general attitude is less positive,” he said.

Mentor Graphics rolled out the Kronos Cell Characterization and Analysis platform.

A blogger discusses Applied Materials, saying the company is at the cyclical trough and its prospects should improve with an increase in equipment spending.

Applied Materials announced that Bob Halliday has been named senior vice president and chief financial officer. Halliday previously was executive vice president and chief financial officer of Varian Semiconductor Equipment Associates prior to Applied’s acquisition of the company in November 2011.

Micron Technology announced the Tokyo District Court’s issuance of an order approving Elpida’s plan of reorganization. Elpida’s plan of reorganization calls for Micron to acquire Elpida. In addition, mixed-signal foundry specialist LFoundry has acquired Micron’s fab in Italy.

Whatever happened to Conexant Systems? The chipmaker recently went private to avoid a takeover. Now, the company this week implemented a restructuring agreement. As part of the plan, Conexant voluntarily filed protection under Chapter 11 of the United States Bankruptcy Code.

Photomask maker Photronics has announced its intent to acquire the shares of its majority-owned Taiwan subsidiary, PSMC.

After a loss and a proxy battle, Aetrium is considering options that may include a sale or other disposition of one or both of its reliability test and test handler product groups.

According to IHS, the competitive landscape of the cell-phone integrated circuits business has completely transformed over the past five years, with Qualcomm and Samsung capitalizing on the rise of smartphones and 4G.

By Mark LaPedus

In a major move, Intel is expanding its efforts in the foundry business. Altera has entered into an agreement for the future manufacturing of its FPGAs, based on Intel’s 14nm tri-gate transistor technology. Intel will provide foundry services for the FPGA giant.

Until now, Intel has been a bit player in the foundry business. Now, the chip giant is on a direct collision course in the foundry business against the likes of GlobalFoundries, Samsung, TSMC and UMC.

Intel has been ramping up its 22nm tri-gate technology for some time, with plans to deliver its 14nm process by year’s end. The chip giant has yet to describe the details about its 14nm tri-gate technology.

Altera elected to skip Intel’s existing 22nm process. Instead, the company will move directly to Intel’s 14nm finFET technology, thereby leapfrogging its competition, namely Xilinx.

The move also represents a major switch in strategy at Altera. Prior to today’s agreement, Altera was exclusively procuring foundry wafers from Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC). But TSMC and other foundries are lagging behind Intel in finFET development. In fact, Intel has a two- to three-year lead over its rivals in finFETs, prompting Altera to look at Intel as a foundry partner. Others could also follow suit.

Still, TSMC is Altera’s primary foundry, according to Altera. TSMC will continue to supply a wide array of processes to fulfill Altera’s product portfolio, including the soon-to-be-released 20nm products, existing mainstream products, and long-lived legacy components. Altera is fully engaged with TSMC on developing products based on next-generation process technologies.

But now, Altera is reaching out to Intel to get a jump in the finFET race. “Altera’s FPGAs using Intel 14nm technology will enable customers to design with the most advanced, highest-performing FPGAs in the industry,” said John Daane, president, CEO and chairman of Altera. “In addition, Altera gains a tremendous competitive advantage at the high end in that we are the only major FPGA company with access to this technology.”

Patrick Dorsey, senior director of product marketing for Altera, said the FPGA chip maker decided to skip Intel’s 22nm tri-gate process, because Intel’s 14nm technology represents a “better match” for Altera’s future product roll out. “This represents a giant leap in terms of capabilities,” Dorsey said.

Analysts agreed. “In our view, the move is mutually beneficial to Altera and Intel,” said Doug Freedman, an analyst with RBC Capital Markets.  “On the Altera side, the company is now on-track to reach sub-20nm before competitor Xilinx.”

Freedman added: “On the Intel side, we believe this is the first in what is likely to be more tier-one customer announcements in the future.” Indeed, Intel is talking to Apple about a similar arrangement.

“We look forward to collaborating with Altera on manufacturing leading-edge FPGAs, leveraging Intel’s leadership in process technology,” said Brian Krzanich, chief operating officer at Intel.  “Next-generation products from Altera require the highest performance and most power-efficient technology available, and Intel is well positioned to provide the most advanced offerings.”

Until now, Intel was only working with smaller fabless companies in the foundry business. For example, Achronix Semiconductor last week officially began shipping the first in a family of devices based on Intel’s 22nm finFET technology. Achronix’ FPGAs are built on a foundry basis by Intel, as part of a major agreement announced in 2010. Another company, Tabula, will also have its 22nm FPGAs made on a foundry basis by Intel.  And flow processor vendor, Netronome, is also having its 22nm products built by Intel.

Intel recently announced capital spending of $13 billion in 2013, including $2 billion for 450mm development.

By Mark LaPedus
Is China set to bail out a U.S. government technology darling? Two Chinese automotive companies, Geely and Dongfeng Motor, are reported to have bid between $200 million and $350 million for a majority stake in Fisker, the maker of plug-in hybrid cars. If that happens Fisker—which has $192 million in U.S. federal government loan guarantees—could be headed to China, according to Lux Research.

Over the years, Apple has moved deeper into IC design. In an e-mail newsletter, Will Strauss, president of Forward Concepts, indicated that Apple could be expanding its efforts in wireless ICs, a move that might impact Broadcom, Qualcomm and others. “There is a rumor published in Israel that Apple will be designing its own baseband and Wi-Fi chips,” Strauss said. “When Texas Instruments dropped out of the cell-phone business, within a week about 100 of the former TI engineers in Israel were hired by Apple. Of course, Apple once hired a bunch of former VLSI Technology wireless engineers, but I understand that that operation came to naught. So, maybe Apple just wanted more engineering talent.”

In a separate research note, Doug Freedman, an analyst with RBC Capital Markets, said: “After talks with management dating back from CES to today (Feb. 25), we believe that Intel is becoming increasingly closer to inking a material foundry design win(s).” Intel is in consideration to be a potential foundry partner for Apple. “Intel’s foundry aspirations may come to light soon,” he said. Apple is also supposedly doing a 20nm foundry deal with TSMC.

Taking the process technology lead in the FPGA market, Achronix Semiconductor is shipping the first in a family of devices based on Intel’s 22nm finFET technology. Achronix’ FPGAs are built using Intel’s foundry services. Achronix says that it has a two- to three-year lead over Altera and Xilinx, which are still shipping 28nm planar devices. The event has prompted two questions. First, will Altera and Xilinx turn up the heat on their FPGA foundry partner, TSMC, to accelerate its finFET efforts? Or second, will Altera and Xilinx turn to Intel over time?

CEA-Leti will coordinate a four-year project aimed at building a European-based supply chain in silicon photonics and speeding up the industrialization of the technology. Mentor Graphics, PhoeniX BV and Si2 will work together to develop a common reference platform. STMicroelectronics, Tyndall-UCC, Aifotec and others are also part of the group.

Mentor Graphics has expanded its automotive business unit by purchasing certain assets from MontaVista. This establishes Mentor as a bigger commercial provider of Linux-based automotive in-vehicle infotainment (IVI) solutions.

Mentor announced the 10.2 release of the Questa functional verification platform. In addition, Tesla Motors has standardized on Mentor’s Capital toolset for 12-volt electrical systems design.

With FD-SOI, STMicroelectronics said that application processors manufactured at its fab are capable of operating at 3 GHz.

Soitec and Sumitomo Electric have signed a licensing and technology-transfer agreement. Sumitomo will use Soitec’s Smart Cut technology to manufacture engineered gallium nitride (GaN) substrates. GaN substrates are used in high-performance light-emitting diode (LED) lighting applications.

GlobalFoundries announced enhancements to its 55nm Low-Power Enhanced (LPe) process technology platform. The so-called 55nm LPe 1V has been qualified with next-generation memory and logic IP solutions from ARM.

Are happy days here again for fab tool vendors? The book-to-bill ratio is above parity for the first time in recent memory. North America-based manufacturers of semiconductor equipment posted a book-to-bill ratio of 1.14 in January, according to SEMI. This compares to a ratio of 0.92 in December.

Intersil cut its global work force by approximately 18%. This comes on the heels of the resignation of the company’s CEO.

Sony introduced the PlayStation 4, which is based on AMD’s single-chip, eight-core custom processor. The x86 processor, dubbed Jaguar, is a 28nm device built by TSMC.

Five IC suppliers are expected to hold one-third of 300mm wafer capacity in 2013, according to IC Insights. Samsung was by far the leader in 2012, having about 61% more 300mm capacity than second-place SK Hynix. Intel was the only other company that held a double-digit share of 300mm capacity at the end of 2012.

Qualcomm dominated the LTE cell-phone modem market with a staggering 86% share in 2012, according to Forward Concepts. In total, Qualcomm shipped 47 million FDD-LTE cell-phone modems last year. Samsung followed with 9% of the shipments in 2012, while GCT Semiconductor managed to grab 3% of the market, primarily through LG handsets, according to the firm. Renesas Mobile and Nvidia-Icera each garnered 1% market shares.

The number of China Mobile 4G subscribers is forecast to reach 228.8 million in 2017, representing 52 percent of China’s 439.9 million total 4G users, according to IHS. In comparison, 4G users from China Unicom and China Telecom, the country’s two other major telecommunications operators, will number 114.4 million and 96.8 million, respectively.

By Mark LaPedus
The first wave of 2.5D chips using silicon interposers are trickling out in the marketplace.
FPGA vendor Xilinx was the first chipmaker to ship a 2.5D device, and Altera, Cisco, Huawei and IBM recently have talked about their respective 2.5D chip developments.

Generally, Altera and Xilinx have taken a somewhat identical and straightforward approach. The two companies are separately developing 2.5D FPGAs, initially based more on homogenous devices. Both are also using Taiwan Semiconductor Manufacturing Co. Ltd.’s turnkey solution to integrate all or part of their 2.5D FPGAs.

Huawei is taking a different avenue, which is arguably more representative of the complex approach that many may take in their 2.5D efforts. The Chinese networking equipment giant is developing a heterogeneous 2.5D device that combines an FPGA from Altera and stacked DRAM from Tezzaron. The interposer comes from Singapore’s Institute of Microelectronics (IME). And fabless ASIC vendor eSilicon is handling the supply chain and integration process.

Putting the pieces together is expected to be a herculean effort. But having explored a multitude of options, Huawei decided to move down an arduous path—and for good reason. “The memory wall is a very serious problem,” said Anwar Mohammed, a senior staff scientist at Huawei. “The gap is becoming wider and wider. And all of the solutions we have for solving the problem are not working anymore.”

For the high-end networking space, Huawei sees a clear but challenging path to solve the problem. “We have to punch a tunnel through the memory wall,” Mohammed said. “For networking applications, 2.5D is the preferred solution.”

The roadblocks
The memory bottleneck and resistivity problems in planar devices have fueled the development of stacked 2.5D and 3D chips using through-silicon vias (TSVs), whether those TSVs run through a die or a separate interposer die in 2.5D designs.

Mike Splinter, chairman and chief executive of Applied Materials, said the 2.5D/3D chip market represents a promising segment for the IC industry, but the business will take some time before it reaches mass production. “We’ve always said there will be a slow deployment of 2.5D,” Splinter said.

The 2.5D chip market is progressing somewhat faster than 3D. Several foundries and IC-packaging houses currently provide interposers and workable manufacturing flows to enable 2.5D designs. There are still some gaps in the technology, however.

“2.5D depends on having a stacked memory solution,” said E. Jan Vardaman, president of TechSearch International, a research firm. “The inability to obtain a memory stack is a gating factor. Some people also say the cost for 2.5D is too expensive.”

Test is also an important but sometimes overlooked part of the flow. “The test challenges for 2.5D are very similar to 3D. For die stacking, it is crucial to have each die pre-tested for KGD,” said Bassilios Petrakis, product marketing director at Cadence Design Systems.

“In the case of the interposer, the question often comes up as to whether it needs to be tested for connectivity upfront prior to bonding with other dies. There is also consideration for how to test partially populated interposers as well as multiple die stacks,” Petrakis said. “An example of that would be a logic die that talks to a Wide I/O DRAM and another logic die on top. If the bottom die of the interposer is the most expensive die, you may only want to attach it to an interposer with all other die attached that have been tested good so far. This may be the most economical way to produce good modules. Finally, all dies on interposers must have some form of a wrapper with boundary scan. We prefer the use of IEEE 1500-style wrappers, but we are also able to accommodate the simpler Wide I/O style boundary scan. Special I/O wrap test before die stacking/bounding can detect possible TSV shorts but not opens.”

Another challenge is to find a suitable manufacturing partner. In general, there are two schools of thought—turnkey versus a hybrid approach. TSMC and Samsung provide a turnkey solution, in which the companies provide both the front- and back-end work. In contrast, GlobalFoundries and UMC are sticking with their hybrid approaches. In that model, the foundries handle the front-end steps, but pass on the back-end work to the IC packaging houses.

Both approaches have their advantages and disadvantages. In the turnkey approach, the foundry can assume the responsibility of the supply chain, thereby keeping costs and quality under strict control. The problem with the turnkey method is that some customers are nervous about handing over their sensitive front-end, assembly and test intellectual-property (IP) to a foundry, said Ajit Manocha, chief executive of GlobalFoundries. “We are not a closed fab,” Manocha said. “Customers prefer to take their proprietary information to the OSATS. We are not going to force customers to do the assembly with us.”

Taking the right path
As it turns out, each customer will choose its own path. To simplify its respective supply chains, Altera and Xilinx are working with a limited set of partners. Most others may end up dealing with a more complex supply chain.

Huawei, for example, is working with separate chipmakers, interposer suppliers, foundries, assembly houses and integrators. At present, Huawei is developing its 2.5D ASIC/FPGA device at IME, a Singapore R&D organization. IME has set up a complete front-end production flow using fab gear from Applied Materials. IME also developed its own interposer technology. IME is a research institute of the Science and Engineering Research Council of the Agency for Science, Technology and Research (A*STAR).

Huawei declined to comment on which foundry it will use once it moves into production, but the challenges are obvious. “This could be a logistics nightmare,” said Ron Leckie, president of Infrastructure Advisors, a consulting firm.

Unfazed by the challenges, Huawei believes it must move in a new and radical direction to address the memory bottleneck in the network. “At one time, when you went to a new node, your gains were pretty sharp,” said Huawei’s Mohammed. “Now, every time we go to the next node, the power becomes a challenge and you have to go with larger and larger die sizes.”

The current line of specialized networking memory chips and other components are unable to keep pace. “Commodity memory cannot handle it,” he said. “Serdes was able to help with the bandwidth at one time. But now, the gains are flatter.”

To solve the problem, the company evaluated several options. “A company like Huawei doesn’t jump into a technology. We have to go through many doors before we decide this is a technology we go after,” he said.

Last year, for example, Huawei looked at combining an ASIC and RLDRAMs in a 64mm x 64mm package, he said. After dropping that idea, the company looked at integrating those devices in larger substrates or smaller packages. Those options were scrapped. Then, it looked at combining a bare die FPGA and packaged memory in a $25 module. “It was not leading-edge technology,” he said. “Any one of our competitors could have picked it up.”

Finally, the company decided on 2.5D. 3D is more suited for mobile applications. “The size of our line cards is constant. We want to put more and more items on the line card to make it more functional and effective. 2.5D is a very powerful enabler for that,” he said. “Initially, this is going to be more expensive. But if you combined enough items, there is a strong potential for cost reduction. It also allows us a faster time to market.”

In Huawei’s proposed design, the FPGA from Altera and the memory stack from Tezzaron are situated on a silicon interposer. “Instead of 10 or 20 DDR DRAMs, all of this can be replaced by one Wide IO memory,” he said. “DDR memory performance is so slow. All of this goes away with Wide IO memory, which is only 12mm x 12mm.”

In total, the company’s proposed 2.5D device occupies less space. The bandwidth per watt is at least 30 times better than conventional approaches, he said.

To realize its design, the world’s largest networking equipment company must overcome some major hurdles, namely the KGD issues, the lack of EDA tools and the supply chain. “Hopefully, we can obtain known good dies and bare dies,” he said. “There is good work going on at Cadence, Mentor and others, but this is still an area of concern. There are also some business concerns like who’s responsible and who’s not responsible?”

Ultimately, to make 2.5D/3D a viable solution in the overall market, Huawei advocates another critical piece to the puzzle–collaboration. “We are advocating pre-competitive collaboration. Let’s makes sure the technology succeeds. When the technology can take care of itself, let’s start competing,” he added.

By Mark LaPedus
Apple apparently is switching foundry vendors from Samsung to TSMC. Still, Samsung is moving forward with its U.S. fab plans. The company announced that a $4 billion fab investment at its Austin, Texas, site is on schedule for production of mobile application processors within the second half of 2013. The remodeled fab line will produce mobile application processors on 300mm wafers at the 28nm node. C.J. Muse, an analyst with Barclays, said Samsung will cut its capex by 50% in 2012 over 2011. “The actual range is likely to be down 30%-50% year-over-year, with a bigger cut on the logic side (due to the likely loss of the Apple business) and a more muted cut on the memory side.”

In a decision that will support nearly 10,000 high-tech jobs, the Export-Import Bank of the United States (Ex-Im Bank) has approved a $1.03 billion loan to GlobalFoundries to finance the export of American-made semiconductor manufacturing equipment to Germany. Applied Materials is one of the exporters involved in the transaction. “The ability of our customer GlobalFoundries to access this financing benefits Applied Materials’ manufacturing and R&D in the United States, as well as our supply chain, at a time of tremendous global competition for high-tech jobs,” said Mike Splinter, chairman and CEO of Applied, in a statement.

GlobalFoundries has added a 10nm finFET process to its roadmap and expanded its technology platform offerings. The foundry vendor plans to go from 20nm planar in 2013, to 14nm finFET in 2014, to 10nm finFET in 2015, and 7nm finFET in 2017.

At the SOI Consortium’s event at IEDM, Jeff Watt, a fellow at Altera, presented an evaluation and benchmark of planar fully depleted SOI technology. A simulation showed that 20nm FD-SOI provided a 5X reduction in power over 28nm bulk, Watt said. However, Altera has not made a commitment to SOI for FPGAs and is currently evaluating the technology, he said. “We are looking at all options,” he said. For 20nm, Altera plans to use a bulk technology at TSMC. At 14nm, the FPGA house will likely go with bulk finFETs at TSMC. However, Altera is also exploring SOI.

STMicroelectronics unveiled the results of its 28nm production silicon chips using FD-SOI technology, which it claims offers a 30% improvement in speed over bulk CMOS while using less power.

STMicroelectronics took another step towards the availability of its 28nm FD-SOI technology platform. The technology is now open for pre-production from its Crolles 300mm manufacturing facility.

SEMI praised Congressional leadership as the U.S. Senate passed legislation (92-4 vote) to normalize trade relations with Russia. This allows American companies to receive the full benefits of Russia’s recent accession to the World Trade Organization (WTO) by wavering an outdated, Cold War-era amendment that restricted trade.

SEMI reported that worldwide semiconductor manufacturing equipment billings reached $9.06 billion in the third quarter of 2012. The billings figure is 12% lower than the second quarter of 2012 and 15% lower than the same quarter a year ago.

Mentor Graphics announced the new T3Ster DynTIM tester, a method of measuring thermal characteristics of thermal interface materials.

MIPS determined that a new proposal from CEVA to acquire the company constitutes a “superior proposal” to the merger agreement with Imagination Technologies. MIPS is prepared to continue negotiations with Imagination if it adjusts the terms of the merger agreement.

Rudolph Technologies has acquired Azores. The move will enable Rudolph to enter the back-end advanced packaging lithography market.

Test handler specialist Cohu has agreed to acquire Ismeca Semiconductor from Schweiter Technologies for $54.5 million, plus acquired cash, to be funded out of Cohu’s existing cash reserves.

Worldwide semiconductor revenue is projected to total $311 billion in 2013, a 4.5 percent increase from 2012 revenue, according to Gartner.

The solar industry is reeling from overcapacity and supply outstrips demand by two to one. It needs to drive costs lower in order to overcome diminished subsidies and regain profitability, according to Lux Research. Module prices have fallen precipitously over the past four years to a low of $0.70/W but the cost of goods sold (COGS) for modules has not reached this level, resulting in massive losses for most module manufacturers. Solar modules production costs could fall as low as $0.48/W in 2017, according to the firm.

By Mark LaPedus
Over the last year, leading-edge silicon foundries announced their new and respective strategies in the emerging 2.5D/3D chip arena. The ink is barely dry and now the foundry landscape is changing.

One new vendor, Tezzaron Semiconductor, is entering the market. The 3D DRAM supplier plans to provide select 2.5D/3D foundry services within its recently acquired fab in Austin, Texas.

In addition, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) is tweaking its 2.5D/3D foundry strategy. Last year, TSMC announced a controversial turnkey solution. The company not only provides the front-end steps, but also the back-end work traditionally handled by the IC packaging houses. Now, instead of locking in customers with its front-to-back solution, TSMC is rethinking its position.

“We prefer to do it ourselves,” said Morris Chang, chairman and chief executive of TSMC, in a recent conference call. “We have become more flexible to partner with the OSATs.”

Two other vendors, GlobalFoundries and UMC, are sticking with their collaborative approaches. In that model, the foundries handle the front-end steps, but pass on the back-end work to the IC packaging houses.

Another foundry, IBM, has a slightly different strategy. Still to be seen, however, is what Intel and Samsung will do in the arena. And some of the IC packaging houses have given up the notion of doing fine-pitch interposers and through-silicon vias (TSVs). Instead, the OSATs are looking at doing course-pitch TSVs and interposers.

So, in general, there are two prevailing, leading-edge 2.5D/3D foundry models: TSMC’s turnkey solution and the rival collaborative approach. “I think both models will co-exist,” said David McCann, senior director of technical business operations for packaging and central engineering at GlobalFoundries.

Foundries go 3D
The memory bandwidth gap and resistivity problems in planar devices have fueled the development of 2.5D/3D chips. But advanced chip stacking has several challenges and is still a few years away from mass production. For example, TSMC will not see “significant revenue” in 2.5D/3D until 2015 or 2016, Chang said.

2.5D/3D technology and the associated supply chain are immature. Manufacturing costs are falling, but there is still a perception that the 3D devices will be prohibitively expensive, said Niranjan Kumar, product marketing manager for TSV programs at Applied Materials.

So far, only a few chipmakers have announced 3D chips. In 2010, Samsung rolled out one of the first 3D DRAMs using a 40nm process and TSVs. Then, last year, Samsung and Micron formed a consortium to develop a serial specification for a 3D DRAM technology called the Hybrid Memory Cube (HMC). Micron will sample HMC devices in 2013. Aimed at high-end applications, HMC will stack DRAM arrays on a logic chip. IBM is making the logic chip based on an SOI substrate.

Another 3D DRAM vendor, Tezzaron, recently has begun shipping its initial parts. But other 3D DRAM schemes, such as Wide I/O, have been delayed due to an assortment of technical issues. Still, the industry is making more progress on the 2.5D front. “The 2.5D era has arrived,” said E. Jan Vardaman, president of TechSearch International, a research firm.

To date, Altera, Cisco, IBM, Huawei and Xilinx have talked about or shipped 2.5D devices using interposers. In fact, Xilinx has shipped the Virtex-7 2000T FPGA, a product based on a 28nm process and a 65nm silicon interposer.

The device itself is built and assembled by TSMC, which refers to its 2.5D/3D turnkey solution as “Chip on Wafer on Substrate” (CoWoS). Using CoWoS, TSMC is also building a rival 2.5D FPGA for Altera. In CoWoS, the chip is attached to the substrate to form the final component. TSMC provides front-end manufacturing, TSV formation, interposers, chip-on wafer bonding, backside thinning, dicing and final test.

CoWoS has been given a lukewarm reception by the IC packaging houses, many of which believe that TSMC is taking a chunk of the backend business away from the OSATs. “For some customers, (CoWoS) works well. It doesn’t work for all customers,” Vardaman said.

TSMC has defended CoWoS, saying that the in-house, turnkey solution enables the foundry to ensure the quality of the chips and the production process. TSMC also assumes responsibility for the supply chain. “Technically, it is progressing well,” TSMC’s Chang said. “We are trying to reduce the costs.”

Beyond 2.5D FPGAs, TSMC recently taped out a Wide I/O device. To enable Wide I/O, the company requires DRAM from a third party. Originally, it was working with Elpida, which is being acquired by Micron. Now, TSMC is working with Micron and SK Hynix.

TSMC’s model may fall flat when customers ask for DRAM from Samsung. TSMC and Samsung are foundry competitors. It’s unlikely that Samsung will hand over DRAM wafers, along with its proprietary IP and test data to TSMC.

In some cases, it makes more sense to follow the collaborative model, where there are fewer conflicts. A customer can use its own logic and/or memory or buy it from a third party. The foundries do the front-end processing, while the OSATs collect and assemble the pieces.

With that scenario in mind, TSMC is warming up to the idea of working with OSATs to give customers more flexibility. TSMC also may be fending off its rivals, which are offering a collaborative approach.

More models

Others are moving full speed ahead with their strategies. Earlier this year, GlobalFoundries installed the tools to create 3D TSV devices on its 20nm platform within its fab in New York. It will handle the “via creation” steps. Then, it will hand off the traditional backend steps, such as temporary bonding/debonding, grinding and test, to the OSATs.

The foundry vendor also devised a low-volume, 2.5D line using 65nm interposers within its fab in Singapore. GlobalFoundries’ challenge is to demonstrate a smooth flow and good product yields at a competitive cost. “It’s going well,” said GlobalFoundries’ McCann. “The question is, can we make this collaborative supply chain model a one-to-one solution? We have to prove this to our customers.”

Another vendor, IBM, has been working on 2.5D/3D for years, including a specialized interposer technology. “IBM is working with Sematech to connect analog converter functions in a logic device with an interleaver IC in IBM’s BiCMOS SiGe technology,” said TechSearch’s Vardeman. “Applications are fiber optic telecom, high-performance RF, test equipment and processing for radar systems.”

The new kid on the foundry block is Tezzaron. In October, the company acquired the former SVTC fab in Austin. R&D foundry SVTC, which recently went bankrupt, originally acquired the fab from Sematech. Now, the fab operates under the name of Novati Technologies. Tezzaron is the sole shareholder in Novati. “We are going to become a 3D foundry,” said Robert Patti, chief technology officer at Tezzaron. “What we are trying to do is provide an open platform for 2.5D and 3D integration.”

Asked if Novati will compete against TSMC and GlobalFoundries, Patti said Novati can work with other foundries and will not compete against them. Novati will continue to serve SVTC’s customers. The Austin fab is a 200mm CMOS line, with 200mm/300mm backend capabilities.

As part of the plan, Tezzaron will shut down its current fab in Singapore and transfer the tools to the Austin fab by early 2013. By Q3 of next year, the company hopes to provide 3,000 wafer starts a week in Austin.

In the 2.5D/3D foundry arena, Novati will offer advanced stacking capabilities, TSVs and interposers. It can provide Tezzaron’s 3D DRAMs or procure third-party logic and memory chips. And Novati will offer both a turnkey and collaborative model. “We are willing to do a full turnkey solution,” Patti said. “I am willing to take the pieces and assemble them.”

The company prefers customers to use its so-called FaStack technology, which makes use of a proprietary bonding and tungsten process. Its 2.5D/3D technology is based on a 40nm process. By late 2013, it will offer a 28nm platform.

While the foundry landscape continues to evolve, several IC packaging houses are rethinking their plans. Some time ago, Taiwan’s Advanced Semiconductor Engineering (ASE) was looking at fine-pitch interposers and TSVs in a “via-last” production flow. “We have an interposer technology that we’ve promoted,” said Rich Rice, senior vice president of sales for North America at ASE. “We are not sure about the market acceptance.”

As it turns out, ASE discovered that leading-edge TSV and interposer work belongs in the foundries and not at the OSATs. “I think poking holes in silicon is mostly a foundry business,” he said at a recent event sponsored by the Microelectronics Packaging and Test Engineering Council (MEPTEC).

On the other hand, ASE and STATS are looking at course-pitch interposers and TSVs for niche applications like MEMS and RF. The OSATs will also play a major role in fine-pitch 2.5D/3D by offering the critical backend work.

TSMC and its turnkey model will not take all of the backend business away from the OSATs. TSMC is still going up the learning curve in the backend and may find the work a headache in the long run. “This is something we do day in and day out,” Rice added.

By Mark LaPedus
According to a recent study commissioned by Intel, nearly all countries surveyed say that mobile manners have become worse compared to a year ago.

Spot shortages, and possible price increases, for NAND flash have suddenly surfaced in the market amid recent production cuts by major memory suppliers.

SEMI said total fab spending could increase by 16.7% in 2013 and reach a new record high of $42.7 billion.

Intel said that Q3 revenue is expected to be below the company’s previous outlook due to lackluster PC demand. Full-year capital spending is expected to be below the low-end of Intel’s previous outlook of $12.1 billion to $12.9 billion, as the company accelerates the re-use of existing equipment to the 14nm node. “Intel’s guidance cut seems widely expected given many reports about weak consumer PC demand due to macro weakness in China and Europe and with a production/demand air pocket before Win8 launches in late October,” said Craig Berger, an analyst with FBR.

The Semiconductor Industry Association (SIA) said that worldwide sales of semiconductors reached $24.4 billion for the month of July 2012, a slight increase of 0.2% from the previous month. C.J. Muse, an analyst with Barclays Capital, sees a downturn coming based on the SIA figures. “As expected SIA data released saw semi revenues post modest growth and confirms our outlook for semis to track down -2% to -8% year-over-year, depending on demand in the month of September,” he said.

For months, there have been rumors that Fujitsu will sell its chip unit to Renesas. In the meantime, Fujitsu Semiconductor has unloaded and sold its LSI assembly and test facilities to J-Devices.

Integrated Silicon Solution has completed an equity investment in Nanya. ISSI will have access to leading-edge process technologies with certain volume guarantees from Nanya for specialty DRAM production. Taiwan DRAM maker Nanya will also provide foundry support capabilities for the continued development of ISSI’s NOR flash and analog products.

Altera unveiled several key technologies planned for its next-generation of 20nm products, including stacked 3D chips.

Cree rolled out 100mm epitaxial wafers based on silicon carbide (SiC). The wafers enable high-voltage bipolar devices such as IGBTs.

Semiconductor R&D spending is projected to hit a record-high of $53.4 billion in 2012, according to IC Insights.

The Microsoft/Intel cartel, known as Wintel, now finds itself playing catch-up in the new era of smartphones and media tablets, according to IHS iSuppli.

Global smart meter shipments grew 33.6% in Q2 over the previous quarter, and were up nearly 51.3% year over year, according to IDC.

Despite a fuzzy economic outlook and concerns regarding the decline in sales of consumer LCD products, TFT LCD panel suppliers are still expecting 2012 shipments to grow 8% to 757 million and revenue to increase 13% to $85.3 billion, according to NPD DisplaySearch.

By Mark LaPedus
As chipmakers move toward 20nm designs, finFETs and 3D stacked devices, the industry is beginning to re-think the fabless-foundry model.

Leading-edge foundries are finally getting serious about the “virtual IDM” model, in which vendors will act more like integrated device manufacturers (IDMs), as opposed to being mere production partners. In this model, the foundries are not only manufacturing partners, but there is a deeper collaboration within a customer’s design team.

In fact, given the variability challenges with finFETs, there is a school of thought that chipmakers must reside at the same physical location as their foundry partners’ fabs to ensure that design and manufacturing are on the same page. Otherwise, according to some experts, the chances for first-silicon success are shaky.

For this reason and others, Taiwan Semiconductor Manufacturing Co. (TSMC) may take the “virtual IDM” model a step further. TSMC is considering a plan to build separate fabs for individual companies. And as part of its strategy, TSMC has accelerated its finFET roadmap.

Rival GlobalFoundries is considering a plan to offer dedicated modules within a fab for customers. And taking another approach, United Microelectronics Corp. has floated an equity placement under which companies can buy a 10% stake in UMC. UMC also has licensed IBM’s 20nm and finFET technologies.

Another foundry vendor, Samsung Electronics Co, has perhaps set the tone for the industry: It has already built a dedicated fab for Apple. And separately, in a surprise move, fabless chipmaker Qualcomm is considering the idea of building its own fab to gain better control of the manufacturing process.

Qualcomm CEO “Paul Jacobs has discussed it openly of late,” said G. Dan Hutcheson, president of VLSI Research. “Qualcomm certainly has the revenues to build its own fab and start making its own wafers. The chance of success is still low. It would cost at least three times, and possibly as much as five times, to successfully get your first fab to viable production, or approximately $15 billion to $25 billion. In other words, it would be an out-of-body experience for the management team that tries it.”

Sea of change
In any case, there could be a sea of change taking place in the traditional fabless-foundry model. “The traditional foundry model, where you throw a GDS2 file over the wall, no longer works,” said Mojy Chian, senior vice president of design enablement at GlobalFoundries. “We have to work closer with the fabless guys. New challenges at 20nm and beyond will require deep, IDM-like collaboration to accelerate the time-to-market. In fact, the collaboration should start two to two-and-a-half years ahead of tape out.”

In the late 1980s, the pure-play foundries emerged, which spawned a plethora of fabless companies. One of the drawbacks with the fabless-foundry model is that the design houses and foundries sometimes work in silos and do not cooperate. In some cases, fabless vendors will throw a clunky design “over the wall” to the foundries, which are still expected to make the chip on time. This brute-force methodology has experienced mixed success.

The fabless and foundry firms began to change their ways at the 130nm node amid soaring IC design and manufacturing costs. “130nm is when process and design began to be recoupled. The result was the rise of DFM, which didn’t exist before then,” said VLSI’s Hutcheson.

Then, starting in the early part of this decade, several foundries billed themselves as “virtual IDMs,” claiming they would work more closely with customers. But some of those efforts have fallen short of expectations. “The leading fabless suppliers got hurt badly when the leading foundries hadn’t dealt well with variability at 40nm, and more recently, with design-manufacturing interactive yield losses at 28nm,” Hutcheson said.

Now, as the IC industry moves toward the 20nm node and beyond, the foundries have become more serious about embracing the “virtual IDM” model and for good reason: The stakes are higher. At 130nm, a fab was $1.45 billion, process R&D costs were $250 million, and design costs were $15 million. But at 22nm, a fab runs $6.7 billion, process R&D is $1.3 billion, and design costs are $150 million.

Simply put, the traditional foundry model must evolve. “You can’t do it in silos,” said Subramani Kengeri, head of advanced technology architecture at GlobalFoundries. “The key is to have a tighter integration between product design and manufacturing.”

This is especially true in the finFET era. Intel has moved finFETs into production at 22nm. Given the variability issues, the foundries face challenges to put finFETs into production at 14nm.

Intel and the foundries are in the bulk finFET camp. But to make the finFET transition easier, the foundries should look at silicon-on-insulator (SOI) technology, said Chenming Calvin Hu, professor of electrical engineering at the University of California at Berkeley. “We are going to see (both bulk and SOI finFETs) in volume manufacturing,” Hu said. “[SOI] is easier. The supply chain is the one thing that manufacturers need to be assured of.”

New business models
On the business side, the industry could take one of two routes: Maintain the fabless-foundry status quo or move toward a “virtual IDM” model. Morris Chang, chairman and chief executive of TSMC, sees yet another model: Build dedicated fabs or joint-venture fabs for larger customers.

“We made our mark serving many customers (in multiple fabs). We will retain that capability,” Chang said during a recent conference call. “There are going to be larger customers. So it makes complete sense to have one dedicated fab, or more than one fab, for one customer.”

GlobalFoundries, meanwhile, is considering a slightly different model. “This is hypothetical,” said GlobalFoundries’ Kengeri. “Within a fab, we have modules. If one of our customers wants a dedicated module, it’s open for discussion.”

In that arrangement, a chipmaker may have to share the risk and cost. And it must make economic sense. Clearly, though, Apple is one candidate for a dedicated fab. In fact, Samsung already has built a dedicated fab for Apple in Austin, Texas.

Altera, Broadcom, Nvidia, Qualcomm and Xilinx are also possible candidates to occupy part or all of a fab. Qualcomm, for one, has the volumes and already is sourcing parts from all of the leading-edge foundries to keep up with 28nm demand.

Qualcomm’s multi-foundry sourcing strategy “is a very expensive approach today, as designs don’t port to multiple foundries like they used to,” said VLSI’s Hutcheson. “Yields are far more difficult to obtain at these advanced nodes, and splitting production across multiple fabs means either less relevant data per learning cycle or longer learning cycle times. That results in longer time-to-money and higher costs, making going the IDM route seem more attractive.”

It’s unlikely that Qualcomm will build its own fab, but it is possible it will end up with a joint venture fab with a foundry. In addition, Qualcomm and others would like the foundries to speed up their process roadmaps. The foundries are falling behind Intel, which also offers foundry services on a limited basis.

TSMC, for one, plans to accelerate its finFET efforts. Originally, TSMC planned to introduce finFETs at 14nm by late 2014. Now, the company has no plans to brand its finFETs at 14nm, but rather it will introduce the technology at 16nm. TSMC’s finFET “risk production” is slated for the end of 2013 or early 2014, with production scheduled for the second half of 2015, Chang said.

TSMC is not banking on extreme ultraviolet (EUV) lithography for 16nm. “We are very confident we can make 16nm finFETs without EUV,” he said. “I think EUV will come in at 10nm.”

To accelerate 450mm fabs and EUV in the market, Intel recently inked a deal with ASML. ASML has also enabled customers to take a 25% stake in the company. Intel plans to acquire up to a 15% stake in ASML.

TSMC and Samsung are also negotiating with ASML to take separate stakes in ASML. Taking a page from the ASML-Intel deal, UMC separately floated private equity shares under which strategic partners can take up to a 10% stake in UMC.

This represents a change for UMC. The company has developed its own processes and has shied away from forming strategic alliances. UMC has controlled its own destiny, but it also has fallen behind its rivals.

To jumpstart its process roadmap, UMC recently licensed 20nm and finFET technology from IBM. UMC’s finFET technology is reportedly a 14nm or 16nm front-end, with 20nm backend. “For UMC to do a finFET from scratch is very challenging,” said Shih-Wei Sun, chief executive of UMC, in a recent conference call. “This will kick start our finFET efforts.”

GlobalFoundries and Samsung have yet to change their finFET strategies. GlobalFoundries still plans to roll out a finFET at the 14nm node in the fourth quarter of 2014 or first quarter of 2015, according to Kengeri.