To help the semiconductor industry efficiently transition to 450mm-ready solutions and keep the industry informed of important news and perspectives on 450mm wafer processing, SEMI launched 450 Central, a web-based information service.

The site will contain new product announcements, industry news, technology information, SEMI Standards updates, presentations, and other relevant information on 450mm wafer processing in one comprehensive website that is easily searchable.

Since the transition to 450mm wafer processing will be one of the most challenging and complex issues facing the semiconductor industry, leading IDMs, foundries, equipment and materials suppliers, and research consortia are beginning to invest in the transition to 450mm wafer processing.

With spending on 450mm R&D alone estimated to range between $8 and $40 billion, capital expenses for the first generation of high-volume manufacturing will probably exceed $25 billion as soon as 2016-2017, SEMI reported.

SEMI expects 450 Central to be the necessary link for accurate information for buyers, planners, suppliers, investors, and other key stakeholders in next generation wafer processing.

SEMI said it will work with all IDMs, industry consortia and suppliers to ensure accurate and timely information on 450mm developments. To provide new product, perspective or other information for consideration for inclusion on the 450 Central website, please send an email to 450editor@semi.org with Word doc and graphic attached.

By David Lammers

Applied Materials executives said they will focus on operational execution, reducing the break-even points for the display and solar divisions, shifting more of the company’s supply chain to Asia, and fully integrating the Varian acquisition. And the executives said Applied’s technical and services focus will be on solving customers’ high-value problems, or HVPs, a phrase that CFO George Davis said has become “a regular part of the company’s internal dialogue.”

At the Applied Materials analyst event, held in New York City Wednesday (March 28), Applied CEO Mike Splinter acknowledged that Applied has faced a “challenging environment in (market) share” as companies spent more on lithography and as DRAM spending – a sector where Applied historically has excelled – sank to record lows. Splinter said Applied lost 3 percentage points of share in semiconductor equipment, while gaining share in the display and solar segments, where demand has been exceptionally weak.

Applied is taking steps to reduce the break-even point in its Environmental and Energy Systems (EES) unit to $400 million. The display operation’s break-even mark will be reduced from $800 million to $500 million by 2013, exiting this year with a $600 million break-even point, while maintaining an ability to quickly ramp capacity as the market springs back later this year.

In semiconductors, Applied does well among the major foundries, accounting for about 20 percent of foundry equipment spending. Foundries will spend about 24 percent of their equipment capex with Applied as they gear up leading-edge capacity to meet demand for smartphone processors and other mobile ICs, the executives said. Foundries will spend more with Applied to build advanced logic transistors, to ready production of 3D NAND in 2013 and 2014, and to enable the 3D TSVs and other forms of advanced packaging required to enable new capabilities in mobile systems.

Randhir Thakur

Finding defects is becoming increasingly important, and several major customers will spend more on Applied’s non-optical inspection tools, said Randhir Thakur, executive vice president of the Silicon Systems Group (SSG).

Joe Flanagan, the senior vice president of operations, said Applied has largely completed its move of equipment production factories to Asia, and now plans to source more parts from lower-cost Asian suppliers. At the end of the 2008 fiscal year, Applied had only 5 percent of its manufacturing in Asia and about 20 percent of its parts procurement. By the end of fiscal 2011 year, following a “significant transfer” of Applied’s manufacturing capacity from Austin to Singapore, Applied had 50 percent of its manufacturing outside of the United States and roughly 40 percent of its supply chain.

Joe Flanagan

“Between now and 2014 we want to see an acceleration of our plan to move more of the supply base into Asia,” Flanagan said, adding that he is comfortable with the balance of the major equipment production facilities between Asia and North America. In response to a challenger’s question about supporting manufacturing and jobs in the United States, Splinter noted that Asian customers account for 80 percent of Applied’s sales in semiconductors, 100 percent in displays, and 90 percent in solar.

Flanagan said lower costs of materials, factory labor, and shipping continue to drive Applied to source more from Asian suppliers. CFO Davis said Applied’s shift to Asia may reduce its tax rate by 4 percent, due to lower taxes in the Asian countries where it does manufacturing: largely Singapore and Taiwan.

Another method of cutting costs is in design cost reduction: for example figuring out how to make a sub-component with less material. As much as a 15 percent savings is possible through more efficient design, Flanagan said.

Mobile Systems Boom

The executives estimated that worldwide shipments of mobile systems – including smartphones, tablets, and notebook computers – will reach a billion units this year for the first time.

“We live in an age of mobility,” Splinter said, in which “people want to do everything from anywhere.” Much of the new spending will be in emerging countries, with 800 million purchasers of new mobile systems in China and India alone. “People there will give much of their salary to have available these new capabilities, which allow them to participate in the world economy,” he said.

Many of the smartphone processors have die sizes which are nearly twice as large as the previous generation, Splinter said, with the prime example being the Apple iPhone 4S processor, which is much larger than the iPhone 4’s applications processor. “These mobile die sizes will continue to increase as long as they fit into the power and cost footprint,” Splinter said.

In addition, many of the mobile systems use touch-enabled displays built with equipment supplied by Applied Materials.

Splinter said the smartphone compound annual growth rate (CAGR) will be more than 30 percent, and even higher for tablets, over the next few years. With ultra-thin notebooks gaining in popularity, notebook shipments could exceed 100 million units. A surge in notebooks may start in the second half, putting stronger underpinnings in the DRAM sector, where investments have shrunk markedly from record levels five years ago.

Semiconductor Inflection Points

Semiconductor technology will see more inflection points in the next few years than in the last 15, Splinter said. Widespread use of high-k/metal gate technology will drive growth in production and inspection equipment, among other factors, Thakur said. And vertical finFET transistors will drive new forms of implant doping, for which the Varian operation is well-prepared.

To regain market share in etch, Thakur said Applied will shift its focus from the historically strong area of conductor etch to more of an emphasis on patterning etch applications.

“The basic engine for growth in SSG is accelerated cycles of learning. Our customers want to go the next node faster, and we are set up now so that we can solve their problems faster,” Thakur said. Between the 65nm and 14nm nodes – four technology generations – the semiconductor industry will increase the number of process steps by 45 percent. That will add to the served available market (SAM) of Applied and provide an opportunity for an estimated 7 percent market share gain in semiconductor equipment, with epitaxial growth, implants, and thermal processing leading the way.

Thakur said Applied is increasing its investments in 450mm production equipment, even though he sees at least three more technology nodes on 300mm tools.

Solving Hard Problems

Charlie Pappis, general manager of Applied Global Services (AGS), said the services operation enjoyed a 29 percent increase in revenues last year, representing $500 million in additional revenues. That came after a 2010 which Davis described as a “tepid” for services, however. About three-fourths of AGS revenues come from supplying parts to the installed base of 32,000 Applied tools, which now includes the 2,500 Varian implanters out in the field.

“Many of our customers run their machines for 20 to 25 years, and there are service opportunities on every machine,” Pappis said. In some cases, Applied is working with its customers to upgrade the capabilities of 200mm “legacy” tools, supporting technology upgrades or throughput improvements. Applied also has a fast-growing business in maintenance contracts, with some contracts configured on driving down unscheduled down times and improving mean time between failures (MTBF).

“The parts business is an ongoing engineering challenge. And we are doing more of that in-country, solving problems for our customers where they are located so we can avoid shipping back and forth to the United States, which is cost prohibitive,” Pappis said.

Applied is beefing up its fab consulting operation, with about 20 veterans of fab management hired into AGS to provide benchmarking of customer fabs against known best practices and suggestions for means of improvement, among other consulting services.

By David Lammers

The late September news of the G450C collaborative effort swept over the Atlantic like a tsunami, starting in Albany, N.Y., and washing up on the Semicon Europa conference, where speakers questioned how European suppliers would be linked in to the Albany-based effort. With a vibrant equipment and materials industry, Europe seeks to play an active role in a transition being managed far from its shores. The issue is complicated by the lack of a single Europe-based IC vendor ready to embrace the larger wafers.

The Global 450 Consortium based in Albany, N.Y. (G450C) plans to have 50 tool types installed at its pilot line in the next few years, said Tom Jefferson, in charge of the ISMI 450 program which is being rolled into the G450C consortium. The G450C pilot line will swing into action in the second half of 2013 and 2014, with demonstrations targeted at “the 1X node.”

(Source: ISMI presentation at 2011 Semicon Europa)

At Semicon Europa, held in mid-October in Dresden, Germany, Jefferson said G450C  will provide “centrally aligned requirements” to suppliers, including a “well-defined method of testing tools and data sharing with the device makers which avoids duplication of data generation.”  (The following week, during ISMI Manufacturing Week in Austin, Texas, the 450mm equipment testing parameters were described at an all-day seminar.) The initial patterning will be performed by an EV Group 770 nanoimprint tool, now being modified at the EVG engineering center in Austria to handle the larger wafers.

Tom Jefferson

While stopping short of saying suppliers would be shut out from purchase orders if they fail to participate in the G450C effort, he said those vendors would receive “a lower priority.” With Jefferson holding out several carrots to the equipment and materials providers to participate, the equipment makers are still looking for assurances on timing as well as financial support.

Asked whether EUV would be a gating factor for 450mm development, Kirk Hasserjian, vice president of strategic programs at Applied Materials, said a successful transition to 450mm “has more to do with the sharing of risk” than whether 450-capable EUV tools are available. “The seeds are in place in New York for better collaboration. Hopefully, there will be some sort of cost sharing and risk sharing going forward.”

He said wafer fab equipment sales are “whiplashed by GDP fluctuations,” and called for “a synchronized transition to 450mm in terms of high-volume manufacturing,” and “a clear, published strategy by the litho suppliers.”

The 450mm progress review sessions at Semicon Europa, organized by Lothar Pfitzner of the Fraunhofer IISB, included 21 presentations over two full days. Jefferson kicked things off by telling the largely European audience that G450C welcomes participation by the European equipment and materials (E&M) industry, which accounts for a surprising 20-25 percent of the worldwide market (led by ASML). “I want to encourage equipment suppliers to participate,” Jefferson told the Semicon Europa audience, adding that they would have access to patterned and unpatterned wafers, shared metrology tools, shipping containers called MACs, and access to the engineers assigned to the G450C by the five device makers – IBM, Intel, GlobalFoundries, Samsung, and TSMC. For European equipment makers not able to ship a tool to Albany, Jefferson said that “participation does not necessarily mean that a tool must be on-site. We need to work out the details” on remote links.

Georg Kelm

Georg Kelm, head of the nanoelectronics sector at the European Commission, summed up the bifurcated European attitude to the 450mm transition: “The (European) materials suppliers are ready to join. The equipment suppliers are equally active, with a proactive attitude. But the IC manufacturers have made no commitments – not yet.”

While much of the EU’s research has gone towards the “More Than Moore” sectors of MEMS, LEDs, photonics, and related subjects, Kelm warned that a successful More Than Moore strategy depends on leading-edge fabs being started for “More Moore” device scaling.

“It would be a mistake to separate More Than Moore and More Moore,” Kelm said, adding that More Than Moore “will not provide a long holiday” for the European semiconductor industry. Much of the effort to link devices with 3D interconnects will end up being done on 450mm wafers, for example.

Kelm said that tool vendors at some point will stop developing new technologies on 300mm platforms. “The 8nm node likely will be for 450mm equipment the equivalent of 65nm for the 300mm equipment. That is when new technologies were 300mm only,” he said. And he predicted that all “post CMOS” manufacturing will be on 450mm tools.

“In 15 to 20 years even the mature technologies will be on 450mm,” Kelm said, adding that “it is possible that some product categories may never be produced in 450mm; however, provided volumes are there, even MEMS, specialized technologies and power could be made on 450mm wafers.”

However, public funding from the European Union cannot be divided long between 300mm and 450mm platforms – there is not sufficient money for that. And he noted that the European equipment and materials vendors – eager to remain competitive with 450mm offerings – employ more people in Europe than the European device makers, including STMicroelectronics, Infineon, and NXP Semiconductors.

“One of the three indigenous IC vendors definitely has to go to 450. The other possibility is that one of the inward investors – Intel or GlobalFoundries — will go to 450 millimeters,” Kelm said.

Hans Lebon, Imec’s vice president in charge of fab and process step development, said “all innovation will move to 450mm, though not in the next two nodes. Ten nanometer technology and beyond will largely be developed on 450, and 300mm will no longer be cost effective.”

Imec will develop the main 450mm process modules at an expanded cleanroom in Leuven, Belgium. Epitaxial deposition, atomic layer deposition, front-end-of-the line critical cleaning, lithography, and dry etching steps all will be developed on 450mm equipment at Imec, Lebon said. “We have a tremendous amount of work to do in a reasonable time frame to keep costs under control,” he told the Semicon Europa audience.

Michel Brillouet, senior advisor at CEA-Leti, predicted that by the 8nm node that some logic vendors will adopt a heterogeneous CMOS technology, in which a III-V material is used in the NFET channel and perhaps germanium in the PFET channel. By the 8nm node the MPU makers, for example, will not be using the same toolset employed today, he said.

Predicting that 450mm would reach volumes in 2018, Brillouet said it is likely that the semiconductor industry will be spread out over various technology generations then. One possible scenario, he said, is that MPU makers would be at the 8nm generation, foundries at 14nm, flash at 11nm and DRAM at 16nm. Leti will continue to work closely with Soitec, Mapper, and other vendors, cooperating closely with Imec on 450mm modules not available at the Leti research facilities in Grenoble.

Heinz Kundert, president of SEMI Europe, said about 40 European suppliers have participated in the EU-based EEMI 450 Initiative. A March 2011 SEMI Europe survey showed that half of the equipment and materials respondents said 450mm was “very important to my company.”

By Mark Lapedus and David Lammers

The State of New York is hoping that the Global 450 Consortium (G450C) announced last week will result in 450mm fabs being built in New York and more equipment purchased from vendors operating in the Empire State.

A 2010 “450.doc” proposal that circulated among New York’s politicians was designed to gain their support for the G450C effort, including additional state funding for the SUNY University of Albany College of Nanoscale Science and Engineering (CNSE), where the G450 consortium will build a 450mm demonstration line expected to go into operation in early 2013.

The 2010 proposal outlines a second phase, to be negotiated in 2013, in which the five members of the consortium – IBM, Intel, GlobalFoundries, TSMC and Samsung – would be encouraged to build a 450mm fab in New York at some point in the future.

“The Phase II agreement will contain provisions that if any Consortium member determines, directly or indirectly, to build a 450 plant anywhere in the world that at least one such 450 facility would be built at an appropriate site in NYS (New York State) reasonably acceptable to NYS and such consortium partner,” according to the proposal.

“The commitment of the consortium partners in Phase II would be subject to NYS continued investment but the consortium agrees that in light of the cluster value provided by NYS that the amount of such support as a percentage of the total project cost would be lower than that provided by NYS in prior transactions,’’ according to the document.

It is not known how much of the language in the “450.doc” proposal ended up in the final agreement. CNSE, Sematech, and the five chip makers will form the board of directors for the G450C effort.

The proposed Phase II part of the plan also includes a “Made in New York” initiative, which would call for the procurement of fab tools exclusively from “manufacturers located’’ in New York and “existing New York State vendors,” according to the proposal. Phase II would result in additional funding for the 450mm consortium and “the creation of a significant number of additional jobs’’ in New York, according to the document, a copy of which was obtained by SemiMD.

Of the five members — Intel, IBM, GlobalFoundries, TSMC and Samsung – only Intel and TSMC have separately announced “450mm-ready” fabs in various other locations. Intel has announced two 450mm-ready plants, including D1X in Oregon and Fab 42 in Arizona. TSMC plans to build a 450mm pilot line in Fab 12 in Hsinchu, Taiwan by 2013 or 2014. By 2015 or 2016 TSMC hopes to ramp a 450-mm production plant: Fab 15 in Taichung, Taiwan. The foundry’s management has recently expressed doubts that it can stay on that schedule.

IBM, GlobalFoundries and Samsung have not disclosed any 450mm fab plans.

Bob Bruck, vice president of Intel’s technology and manufacturing group, said Intel is not under any obligation to build a 450mm fab in New York or anywhere else. He praised New York’s effort to develop a chip manufacturing infrastructure in the state, including the CNSE Albany Nanotech Center, mentioning the names of the governor and others as active supporters of New York’s technology infrastructure.

However, Bruck said that Intel would follow its normal site selection process for any decision on a new fab site, 450mm or otherwise. “Whenever we plan to build a new fab we look on a global basis, and have a well-defined site selection process. That process has not changed” following announcement of the 450mm consortium, he said.

The five chip makers are expected to contribute at least $75 million each in the project over the next five years, according to the Business Review news site based in New York. Bruck called that level of investment a “starting point.”

In addition, IBM plans to invest $3.6 billion in its ongoing transistor development alliance and related packaging R&D, which will be directed to Albany Nanotech and other state facilities, according to a report from Albany-based Times Tribune newspaper. Much of that investment is already committed by the companies to support the ongoing efforts by IBM, GlobalFoundries, and Samsung Electronics (not including Intel or TSMC) to develop 22nm and 14nm technology, independent of the work on the 450mm wafer transition.

CSNE in Albany, N.Y. will serve as the headquarters for the 450mm consortium, and a spokesman for CSNE said each consortium member will provide employees and assignees to the group.

Fab construction firm M+W has been building a $300 million research center at the CNSE at the University at Albany, which will be the centerpiece of the Global 450 Consortium, according to the CNSE spokesman. That center, called the NanoFab West or NanoFab X building, is designed to handle 450-mm equipment, including the heavy EUV lithography tools.

Some $250 million for the center will come from the Empire State Development Corp., $100 million from the New York Power Authority, and $50 million from capital projects fund, according to the Times Tribune, citing Josh Vlasto, a spokesman for Gov. Andrew Cuomo, as its source.

Alain Kaloyeros

According to the report, CNSE President Alain Kaloyeros said the center would install between $2 billion and $2.5 billion worth of fab tools. The first tools will be installed by September 2012. The facility will be completed by the first quarter of 2013, according to the report, citing  Kaloyeros as its source.

By David Lammers and Mark LaPedus

The Global 450 Consortium, or G450C, will provide equipment suppliers with access to a test wafer bank on a “first-come, first-served basis,” depending on their in-kind investments and other contributions to the consortium, said Bob Bruck, vice president of Intel’s technology and manufacturing group (TMG).

The G450C announced this week includes five IC manufacturers – with IBM and GlobalFoundries joining the original “IST” members, Intel, Samsung, and TSMC. Those companies, along with Sematech and the SUNY-Albany College of Nanoscale Science and Engineering (CNSE), will sit on a board of directors that will govern the consortium.

The G450C demonstration line in Albany is targeted for 14nm design rules early 2013 with imprint technology used for test wafer patterning of over the first year. The first 450mm 193i optical litho tool for Albany is expected to arrive in late 2013, an Intel spokesman said. After that, each of the consortium’s members can determine their own schedule for 450mm development fabs, with 2015 remaining as the group’s overall target. Intel has not decided which node capability it will want for its own development line, because that will depend upon manufacturability progress of the 450  tool set, the Intel spokesman added.

Bob Bruck

While Bruck said early analyst estimates of a $5B total cost of the 450mm test wafers needed for the transition were too high, he agreed that test wafer costs will be a “substantial portion” of the cost of the 450mm wafer development program. “That in itself is an attractive element to pull the collaborators (suppliers) in. To the degree that they participate in the consortium, they will have access to the output, to the test wafers themselves. It will be first come, first served, and the allocation schemes have to be tied to the funding of it.”

CNSE is building a new fab for the G450C effort, named Nanofab West or Nanofab X, which looms over the highway that cuts through the Albany Nanotech campus. Construction is expected to be completed next year.

Bruck said while $75 million is roughly accurate for the five IC companies contribution “as a starting point,” the overall budget will go up over time, bolstered by investments from the suppliers and a $200 million contribution over five years from the Empire State Development organization, among other sources.

Bruck said the supplier contributions “are really going to evolve and be substantial as people see the structure take place.” Suppliers will support G450C because they will be able to interface with five customers in the same place, all seeking to develop standards and product requirements. That will provide the entire industry – including the tool suppliers – with a “huge amount of cost savings.”

The 300mm wafer transition did not go well because there were 17 different semiconductor manufacturing companies interfacing with the suppliers. While common 450mm development work will be done in Albany, tool suppliers with their own development centers will continue to do their own work at home. Bruck said he envisions Intel, for example, running a “virtual fab” that would involve Albany. Intel could run test 450mm wafers through the line at Albany, then air freight those wafers to a supplier which would run them through its proprietary tool, and then back to Albany for completion and testing.

“Suppliers can say, ‘I can do this work on my own and have five customers asking for five different things. Or I can do some of this work in one location with five customers working with me on requirements, standards and product definitions. That is a big change from previous wafer transitions, and substantially increases the value of investment in this facility, in lieu of doing investments elsewhere,” he said.

The ISMI 450 program has refined a request for proposal (RFP) process that will transfer over to the G450C effort, which will take over the ISMI 450 program. Bruck lauded the assignees to the ISMI 450 program and said the five member companies will add more “high quality” people to G450C going forward.

The G450C partners have engaged in “pretty substantial dialogue” with equipment and wafer suppliers, and Bruck said he expects a “very high degree of participation in their own centers and in the development line in Albany. Some suppliers may want to do some things in front of five customers, while for other things they may prefer to do those in a more proprietary manner in their own facility.”

At a Semicon West panel discussion on the 450mm wafer transition, tool suppliers said they were vexed by the mixed messages coming from the IST companies, with different schedules and technology targets for the transition.

Bruck said the G450C is targeting 14nm capability for the Albany 2013 development line tools. Compared with the 300mm transition, he said the 450mm transition will be “much more tightly coordinated,” both because of the consortial approach to development and because of industry consolidation among the IC manufacturers.

“From a process technology node point of view, we think the suppliers will be capable of dealing with both the wafer size and the node progression in this time frame. As for when the individual companies build their own fabs, it is like the question of when EUV comes in. It depends on when it is manufacturable. We had a false start on 300mm partly because the 17 announced customers were not aligned,” he said.

Bruck added that “lithography is its own animal. We prefer to have EUV healthy before we go to 450. Either way, there will also be a need for 193i at 450, and we need EUV at 300. As we continue to gain efficiencies in our 300mm fabs, that lays the groundwork for 450. We will figure out how many layers use EUV and immersion (on 300mm wafers), and we have got to do a lot of this work in parallel” with the 450mm transition, he said.

Bruck said he will moderate a panel of suppliers that will discuss the supplier’s role in the 450mm wafer transition at the SEMI International Trade Partners Conference in Hawaii, scheduled for Nov. 3-5. While some have expected that the device makers would set up a common pool of money for equipment development, Bruck said, “It is not about who we are going to hand money out to. We can’t just throw money at the problem,” he said.

By David Lammers and Mark LaPedus

In a major shift, the Sematech ISMI 450 program will become part of the Global 450 Consortium announced yesterday by New York governor Andrew Cuomo, Sematech officials said Wednesday (Sept. 29).

(Source: Sematech ISMI 450 program presentation)

Since 2006, the Sematech ISMI organization has been in charge of the early stages of the 450mm transition, including developing standards for the wafers, automation, and getting the ball rolling for development of the 450mm processing tools. Last year, the entire ISMI organization moved to Albany, N.Y., from Austin, Texas, and the state of New York invested an estimated $300 million in the 450mm program at ISMI. Intel assignee Tom Jefferson headed up the ISMI 450 program, with another Intel assignee, Tom Abell, serving as the point man for many of the negotiations with the tool suppliers.

In a parallel track, Intel, Samsung and TSMC – the so-called IST group of device makers supporting the 450mm transition – began plotting a timeline for 450mm-capable pilot and production lines.

The announcement of the Global 450 Consortium consolidates the 450 effort into one consortium, with access to the new CNSE Fab West building now under construction at the CNSE campus.

Fab construction firm M+W is building a $300 million research center at the University at Albany’s College of Nanoscale Science and Engineering (CNSE) at the University at Albany, which will be part of the Global 450 Consortium, according to a spokesman for the CNSE.

The building will be ready to install the fab equipment by July 2012, according a report from The Business Review, an Albany-based  news Web site, citing Alain Kaloyeros, senior vice president and CEO of the Albany Nanotech complex, as its source. The new building, according to the report,  will include a 50,000 square ft. cleanroom and have room for 800 employees.

A Sematech spokeswoman sent out a statement, which indicated the Sematech ISMI 450 program “has built the foundation for where the industry is today in the transition to 450mm, and our program is now a part of the new initiative, which will build on and expand our efforts.”

Bob Johnson, a Gartner analyst, said the transition from a Sematech-led 450 program to a separate consortium using the CNSE facility makes good sense. The overall 450 program is moving into a more expensive phase, where beta tools must be developed and tested, and a comprehensive process flow must be proved out. That will take many billions of dollars, and duplicating efforts is not an option.

“This is an example of where the four big companies – Intel, GlobalFoundries, TSMC, and Samsung – decided to step up to the plate and get this going in ways the 450 program couldn’t do,” Johnson said, adding that Toshiba remains the only large chip manufacturer outside of the new consortium. Micron Technology and Elpida also are mulling their 450 options, he noted.

The CNSE Nanotech operation has proven its ability thus far to protect IP, even where competing firms are operating side-by-side, he noted.

Gartner’s team of analysts has created a timeline which foresees a 450mm volume fab going into operation in 2018-2019. The major equipment companies, such as Applied Materials and Novellus Systems, may have beta tools ready next year, Johnson said. The new Global 450 Consortium may support some of the beta tool development efforts, he added.

The pilot line at Albany Nanotech will move into operation in 2013, with the participating companies working out the bugs from the process. The major device makers will set up their own pilot lines around 2016-2017, he said.

“The companies have to make sure that their processes yield chips at the same rate on 450 wafers as they do on 300 millimeter wafers,” he said.

One important question is how the lithography tool vendors will handle the 450 transition. Any 450 line will need both EUV and 193nm tools. And the throughputs must improve so that the device makers will see the cost savings which drive the move to the larger wafer size.

The Global 450 Consortium is “an efficient way to do the R of the 450 R and D. It is a way to go from concept to a feasible set of tools and processes,” he said.