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Waddle-room for Black Swans: EUV Stochastics

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By Ed Korczynski, Sr. Technical Editor

Long-delayed and extremely complex, extreme ultra-violet (EUV) lithography technology is now being readied for the high-volume manufacturing (HVM) of commercial semiconductor integrated circuits (IC). The International Society for Optics and Photonics (SPIE) Advanced Lithography conferences held yearly in San Jose, California gather the world’s top lithographers focused on patterning of ICs, and the 2018 gathering included several days of in-depth presentations on the progress of EUV sources, steppers, masks, and photoresists.

With a nod to Taleb’s “black swan theory” (https://en.wikipedia.org/wiki/Black_swan_theory) stochastic defects in advanced lithography have been called the “black swans” of yield loss. They hide in the long-tail on the short side of the seven-sigma distribution of a billion contact-holes. They cause missing contacts and cannot be controlled with source-mask optimization (SMO). They breed in etch chambers.

Many yield losses in lithography are classified as “systematic” due to predicable interactions of photons and masks and photoresists, and modeling can show how to constrain them. White swan “random” defects—such as those caused by particles or molecular contaminants—can be penned up and controlled with proper materials-engineering and filtration of photoresist blends. In contrast, “stochastic” black swans appear due to atomic-scale inhomogeneities in resists and the wiggliness of atoms.

The wavelength of EUV is ~13.5nm, which the IC fab industry would like to use to pattern half-pitches (HP) in the range of 16-20nm in a single-exposure. At these dimensions, we find black swans hiding in lithography and in etch results.

An ongoing issue is lack of ability to model the multi-dimensional complexity of plasma etching multi-layer resist stacks. In Moshe Preil’s 2016 SPIE keynote titled “Patterning Challenges in the sub-10 nm Era,” he wrote:

It is certainly not surprising that etch simulation is not as predictive as lithography. The plasma environment is significantly more chaotic than the relatively well behaved world of photons and photosensitive molecules. Even the evolving need for stochastic simulation in the lithography domain is significantly simpler than the three dimensional controlled chaos of an etch chamber. The number of different chemical pathways available for reaction within an etcher can also present a daunting challenge. The etch process actually needs these multiple pathways to passivate sidewalls while etching vertically in order to carefully balance lateral vs. vertical etch rates and provide the desired material selectivity.

Etch faces additional challenges due to the resist pattern itself. Over the years, resist films have been reduced in thickness to such an extent that the resist itself is no longer adequate to act as the transfer mask for the entire etch process. Etch stacks are now a complex layer cake of optical materials (anti-reflection coatings) and multiple hard masks. While this simplifies the resist patterning process, it has shifted the burden to etch, making the stack more complex and difficult to model. Etch recipe optimization remains largely the domain of highly talented and diligent engineers whose work is often more an art than a science.

Today’s Tri-Layer-Resist (TLR) stacks of photoresist over silicon-based hard-mask over carbon-based anti-reflective coating continue to evolve in complexity. Quadruple-Layer Resist (QLR) stacks add an adhesion/buffer layer of material between the photoresist and the hard-mask. Even without considering multi-patterning process integration, just transferring the pattern from a single-exposure now entails extreme etch complexity.

Figure 1 from “Line-edge roughness performance targets of EUV lithography” presented at 2017 SPIE by Brunner et al. (Proc. of SPIE Vol. 10143, 10143E-2) shows simulated stochastic variation in 18nm HP line grids. The authors explain why such black swan events cannot be ignored.

Fig. 1: Stochastic image simulation in PROLITH™ software of a single exposure of EUV to form long trenches at 36nm pitch: (LEFT) aerial image first calculated as a smooth profile, (CENTER) stochastic calculation of photo-acid concentration before post-exposure bake (PEB) as “latent image”, and (RIGHT) final calculated image after development, based on stochastic de-blocking reactions during PEB. (Source: Brunner et al., Proc. of SPIE Vol. 10143, 10143E-2)

Such stochastic noise is present for all lithographic processes but is more worrisome for EUV lithography for several reasons:

  • fewer photons per unit dose, since each EUV photon carries 14X more energy than a 193nm photon,
  • limited EUV power – only a fraction (~1%) of the source power at intermediate focus makes it to the wafer,
  • only a fraction of EUV photons are actually absorbed within the resist, typically <20% for polymer materials, and
  • smaller features as we progress to more advanced nodes, and so less area to collect EUV photons. Ideally, as the lithographic pixel size shrinks, the number of photons per pixel would stay the same.

Stochastic phenomena – photon shot noise, resist molecular inhomogeneities, electron scattering events, etc. – now contribute to dimensional variation in EUV resist patterns at levels comparable to or greater than customary sources of variation, such as defocus. These stochastic effects help to limit k1 to higher values (worse resolution) than traditional optical lithography, and will counteract the benefits of high NA EUV optics. The quest to improve EUV lithography pattern quality will increasingly focus on overcoming stochastic barriers. Higher power EUV light sources are urgently needed as features shrink. Photoresist materials with higher EUV absorption will also help with stochastic issues. Alternative non-polymeric resist materials and post-develop smoothing processes may also play a future role.

In “Stochastic effects in EUV lithography: random, local CD variability, and printing failures” by Peter De Bisschop of IMEC (J. Micro/Nanolith. MEMS MOEMS, Oct-Dec 2017, Vol. 16/4) data are shown in support of the need for new stochastic control metrics in addition to the established “process window” metrics. A dose experiment using a family of chemically-amplified resists (CAR) to produce 18nm HP line/space (L/S) grids showed that increasing dose in the range from 30 to 60 mJ/cm2 reduced line-width roughness (LWR) from 4.6 to 3.9nm, with no further improvement when increasing dose to 70 and 80 mJ/cm2. However, micro-bridging across spaces continued to drop by orders of magnitude over the entire range of doses, proving that stochastic defects are different “animals.”

In general, we can categorize sources of stochastic variation in advanced lithography as follows:

1)    Number and spacial-distribution of photons absorbed (a.k.a. “shot noise”),

2)    Quantum efficiency of photo-acid generation(PAG)/diffusion along with quencher distribution,

3)    Develop and rinse solution inhomogeneities,

4)    Underlayer (hardmask/anti-reflective coating/adhesion layer) optical and chemical interactions,

5)    Smoothing techniques including deposition, etch, and infusion, and

6)    Design layout and OPC and SMO.

While we cannot eliminate stochastics by design, we can start to design around them using sophisticated process simulation models. At 2018 SPIE, Ping-Jui Wu et al. from National Taiwan University and TSMC used sophisticated molecular dynamics simulations to model “Nanoscale inhomogeneity and photoacid generation dynamics in extreme ultraviolet resist materials.” Figure 2 shows that ion-pair interactions in CAR create different nano-scale domains of poly(4-hydroxystyrene) (PHS) base polymers and triphenylsulfonium (TPS) based PAGs, depending upon the concentration of tert-butyl acrylate (TBA) copolymers in the blend.

Fig. 2: Molecular dynamics simulation of nano-scale domain separation within 8nm edge-length cubes of CAR composed of phenol groups (grey), TBA (red), and TPS (yellow) for (a) phenol-rich blend, and (b) TBA-rich blend. (Source: Wu et al., Proc. of SPIE Vol. 10586, 10586-10)

Table 1 shows modeled (Brainard, Trefonas & Gallatin, Proc. of SPIE Vol. 10583/10583-40) contributions to stochastic LWR from PS-CAR exposed with 0.33NA EUV to form 16nm HP L/S grids. For this PS-CAR blend the quencher variability contributes nearly as much LWR as the photon shot-noise, indicating room for improvement by fine-tuning the PS-CAR formulation.

One way to scare away black swans hiding in the resist is with bright light, as shown at 2018 SPIE by a team led by researchers from TEL in “EUV resist sensitization and roughness improvement by PSCAR™ with in-line UV flood exposure system.” Photo-Sensitized (PS) CAR contains a precursor molecule that converts to PS when exposed to EUV light, in addition to PS-PAG and “photo decomposable base (quencher) which can be photosensitized” (PS-PDB) molecules. UV flood exposure after EUV pattern exposure but before development generates extra acid, allowing for higher quencher loading, such that higher image contrast with reduced LWR can be obtained. By increasing the concentrations of PAG and quencher in the resist blend there is a reduction in the stochastic at any target dose.

DUV Ducks:  ArFi multi-patterning

As shown by Nikon Precision at the company’s 2018 workshop in San Jose pre-SPIE, deep ultra-violet (DUV) steppers using 248nm KrF or 193 ArF sources continue to improve in IC fabrication capability. ASML also continues to improve its DUV steppers, including integrating the advanced metrology technology acquired from Hermes Microvision as part of the company’s Holistic Lithography offering.

“The Challenge of Multi-Patterning Lithography for Contact Layer in 7nm and Beyond” by Wan-Hsiang Liang et al. of GlobalFoundries at 2018 SPIE showed how multiple ArF-immersion (ArFi) exposures can replace one EUV step. They characterized the process window (PW) for patterning as limited by two types of defects:  1) single-layer bridging or missing contacts driven by lithography, and 2) multi-layer bridging or unlanded contacts or extra patterns driven by both lithography and hard-mask open (HMO) etch. They found that a patterning PW can only be obtained by co-optimizing lithography and etch.

DUV versus EUV cost estimates

The target metal HP for IMEC node 7nm (iN7) on-chip IC interconnects is 16nm, dropping to 10nm for the next iN5. A single-exposure of 0.33NA EUV can create the former half-pitch, but 10nm will require double-exposure of EUV.

The capital expenditure (CapEx) for 8 EUV or 16 ArFi steppers is ~US$1B. We know that EUV could improve fab yields, but we also know that black swans will cause new yield losses. The least risk for first use of EUV is for blocks/cuts to ArFi SAQP lines, so that multi-color ArFi masks could be substituted in an EUV yield-loss emergency without having to change the design.

In my ongoing role as an analyst with TECHCET, at 2018 SPIE I presented a poster on “Cost modeling 22nm pitch patterning approaches” in HVM using either EUV or ArFi DUV steppers in complex multi-patterning process flows. In this model, all yield losses including those from stochastic black swans are assumed as zero to create a Cost Per Wafer Pass (CPWP) metric. Real Cost of Ownership (CoO) calculations can start with these relative CPWP numbers and then factor in systematic yield losses dependent upon design, as well as random yield losses dependent upon particles and wafer-breakage. CPWP includes only fab costs, not including EDA nor masks nor final test.

Figure 3 shows that EUV-based process flows could save money over strict use of ArFi in multi-patterning, assuming 1 EUV exposure can replace 3 ArFi exposures with similar yield. EDA for EUV should cost less than doing multi-color ArFi layouts, and design:process-induced systematic yield losses should be reduced. By reducing the number of deposition and etch steps needed in the full flow, use of EUV should significantly reduce the turn-around-time (TAT) through the fab. GlobalFoundries’ Gary Patton has said that such TAT savings for advanced logic chips could be a month or more.

Fig. 3: Cost Per Wafer Pass (CPWP)—with all yield losses including those from stochastics set to zero—modeled for different process flows to achieve 22nm pitch patterns, showing that flows using EUV could reduce HVM costs if yields can be managed. (Source: Korczynski, Proc. of SPIE Vol. 10589, 10589-25)

EUV resist materials have additional stochastic constraints compared to ArFi resists, and as more highly engineered materials are expected to cost more. Nonetheless, the cost of stepper CapEx depreciation per wafer is ~10x the cost of all lithography materials for both ArFi and EUV in this model. More details of the CPWP model including materials assumptions will be presented at the 2018 Critical Materials Council (CMC) Conference, April 26-27 in Chandler, Arizona [DISCLOSURE: Ed Korczynski is co-chair of this public conference].

Conclusions

As the commercial IC fab industry begins ramping EUV lithography into HVM, engineers now must anticipate new stochastic failures. Perfect dose and focus cannot prevent them. A new constraint is added to the myriad challenges of engineering photoresist blends.

At the level of atoms we find plenty of kinetic energy to make things wiggle…or waddle. Waddling black swans have always been with us, but we used to be able to ignore them. While we can control random white swans, these black swans cannot be controlled but we can give them room to waddle around.

—E.K.



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