TSMC Accelerates finFET Efforts

By Mark LaPedus

In response to its foundry rivals, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) has updated and accelerated its process roadmap. The world’s largest silicon foundry has accelerated its 16nm finFET efforts by one quarter and added a 10nm finFET technology to the roadmap.

TSMC also plans to take the “modular fin” approach for its 16nm finFET. It is also looking at 450mm fabs at the 10nm node, according to a TSMC executive, who also stressed that collaboration is a key to success. Customers must collaborate earlier in the design cycle and “at a new level,” said Mark Liu, executive vice president and co-chief operating officer at TSMC, during a keynote at the company’s Open Innovation Platform Ecosystem Forum in San Jose, Calif. on Tuesday (Oct. 16). “We need to align strategically.”

At present, TSMC is ramping up its 28nm process technology. The next process on the roadmap, dubbed CLN20, is a 20nm planar technology. The reference flow for CLN20 is ready and the process is due out in 2013.

Then, as previously announced, TSMC will enter the finFET transistor era. The company’s initial finFET process, dubbed CLN16FF, is being targeted and branded for the 16nm node. TSMC’s 16nm finFET process is slated for risk production in November of 2013, Liu said. Risk production has been accelerated from February of 2014 to November of 2013.

In an interview after the keynote, Liu said TSMC will take a “modular fin” approach in finFETs. TSMC will marry a 16nm fin with a 20nm backend. “It has 20nm design rules,” he said.

TSMC will also implement a triple-patterning strategy for 16nm finFETs. The company is also keeping its options open. It is exploring 193nm immersion extensions, extreme ultraviolet (EUV) lithography and multi-beam. “At this point, we have both (193nm extensions and EUV) under development,” he said. “Maybe multi-beam will save the day.”

TSMC’s 16nm finFET design solutions, including the EDA tools and IP, will be ready by the first quarter of 2013.  “We have pulled in our design enablement solutions,” said Cliff Hou, senior vice president of TSMC, during a separate keynote at the event. The first version of the design solutions, dubbed V0.1, is slated for introduction in January. The second version, V1.0, is due out in October of 2013.

Meanwhile, during his keynote, Liu presented a slide that denoted CLN10FF, which is a second-generation finFET for the 10nm node.  TSMC’s 10nm finFET process is expected to move into risk production “close to the end of 2015,” he said.

Also at 10nm, TSMC is looking to enter the 450mm fab era. It is likely TSMC will have a 450mm fab or pilot line in the second phase of 10nm. “There are no show stoppers,” he said. “All of the equipment companies are developing 450mm.”

Other foundries have also accelerated their finFET roadmaps. For example, GlobalFoundries Inc. recently rolled out its finFET technology for the 14nm node. GlobalFoundries is taking a “modular fin” approach with its bulk finFET offering, dubbed 14nm-XM. The 14nm-XM combines a 14nm-class fin with its 20nm back-end-of-line (BEOL) interconnect flow.

By taking the modular approach, the company has accelerated its process roadmap by a year. Early process design kits (PDKs) are available, with customer product tape-outs expected in 2013. Production, which is slated for 2014, will take place within GlobalFoundries’ new 300mm fab in New York.

Another foundry vendor, United Microelectronics Corp. (UMC), is taking a similar modular finFET approach. UMC licensed finFET technology from IBM. Samsung Electronics Co. Ltd. has yet to elaborate on its finFET strategy.  Meanwhile, Intel Corp. is already ramping up its 22nm process, which is based on finFET transistors. Intel is providing foundry services for select customers, who plan to ship products based on finFETs.

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