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Archive for May, 2014

GLOBALFOUNDRIES’ Kengeri to speak at The ConFab

Monday, May 12th, 2014

Subramani Kengeri, Vice President, Advanced Technology Architecture at GLOBALFOUNDRIES will speak at The ConFab 2014 on the “techno-economics” of how the relatively small semiconductor industry ($350 billion or $0.35 trillion) is driving the $85 trillion gross world product (GWP). He notes that semiconductors are only a fraction of GWP, but a critical enabler of global economic growth and productivity. Cost effective technology innovations have kept Moore’s law alive, although techno-economic challenges are mounting on each successive node. The cost of building a new advanced fab has reached $6B. Process development and chip design costs are going up astronomically, while next generation SoCs in the IoT era are pushing cost-per-function to unprecedented levels, he says. His talk will review advanced design and silicon technology challenges posing threats to cost effective scaling, potentially impacting global GWP and productivity. 

Subramani (“Subi”) is responsible for defining competitive process architecture on advanced nodes in support of “first time right” technology development. He is responsible for determining the technology feasibility, competitiveness and manufacturability of all elements of technology platform and to establish the advanced technology roadmap for GLOBALFOUNDRIES.

Subramani joined GLOBALFOUNDRIES in 2009 as the Vice President of Design Solutions. He implemented strategic Design enablement initiatives and established a strong foundation for collaboration with Design eco-system, before moving to focus on R&D. He started his Semiconductor career at Texas Instruments and prior to joining GLOBALFOUNDRIES, he was the Senior Director of Design and Technology Platform at TSMC.

 

What’s new in the latest ITRS

Monday, May 5th, 2014

The newly revamped International Technology Roadmap for Semiconductors was released in early April. It’s actually called the 2013 ITRS, which makes it seem already out of date, but that’s the way the numbering has always been.

It’s a big undertaking, with input from the U.S., Europe, Japan, Korea and Taiwan. Through the cooperative efforts of the global chip manufacturers and equipment suppliers, research communities and consortia, the ITRS identifies critical gaps, technical needs, and potential solutions related to semiconductor technology. Some key findings and predictions of the 2013 ITRS include the following:

• The combination of 3D device architecture and low power devices will usher in a new era of scaling identified in short as “3D Power Scaling.” The increase in the number of transistors per unit area will eventually be accomplished by stacking multiple layers of transistors.

• Progress in manipulation of edgeless wrapped materials (e.g., carbon nanotubes, graphene combinations, etc.) offer the promise of ballistic conductors (as shown on this month’s cover), which may emerge in the next decade.

• There will be two additional ways of providing novel opportunities for future semiconductor products. The first consists of extending the functionality of the CMOS platform via heterogeneous integration of new technologies, and the second consists of stimulating invention of devices that support new information-processing paradigms.

The ITRS also covers system level integration, including the integration of multiple technologies in a limited space (e.g., GPS, phone, tablet, mobile phones, etc.).  

Looking at Long Term Devices and Systems (7-15 years horizon, beyond 2020) the 2013 ITRS reports on completely new devices operating on completely new principles and amenable to support completely new architectures. For instance, spin wave device (SWD) is a type of magnetic logic device exploiting collective spin oscillation (spin waves) for information transmission and processing. No surprise, the manufacturing of integrated circuits, driven by dimensional scaling, will reach the few nanometers range well within the 15-year horizon of the 2013 ITRS.

An addition to the 2013 ITRS edition is a new sub-chapter on big data (BD). The fab is continually becoming more data driven and requirements for data volumes, communication speeds, quality, merging, and usability need to be understood and quantified.