Qualcomm reported net income of $1.5 billion for the fiscal first quarter ended December 27, down 24 percent from $2.0 billion a year ago. Revenue fell 19 percent to $5.8 billion, from $7.1 billion in the first quarter of fiscal 2015.
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Advanced Micro Devices on Tuesday reported a net loss of $660 million on revenue of $3.99 billion for 2015, compared with a net loss of $403 million on revenue of $5.51 billion in 2014.
ASML Holding today reported net income of about $1.5 billion on revenue of $6.855 billion for 2015. That compared with 2014’s net income of $1.3 billion on revenue of $6.385 billion.
Intel reported net income of $11.4 billion on revenue of $55.4 billion for the year ended December 26, compared with net of $11.7 billion on revenue of $55.9 billion in 2014.
The very last presentation at the 12th annual 3D Advanced Semiconductor Integration and Packaging conference was given by Hash Pakbaz, president and chief executive officer of SBA Materials, a developer of nanoporous and mesoporous materials for semiconductor manufacturing and other applications.
John Ferguson of Mentor Graphics provided the electronic design automation perspective on packaging technology at the 12th annual 3D ASIP conference in Redwood City, Calif.
On the second day of the 12th annual 3D ASIP conference, the heavy hitters came out to talk. Attendees heard presentations from executives of Amkor Technology, the Defense Advanced Research Projects Agency (DARPA), Northrop Grumman, Taiwan Semiconductor Manufacturing, Teledyne Scientific & Imaging, and Xilinx, among other companies.
The theme of this year’s 3D Architectures for Semiconductor Integration and Packading (3D ASIP) conference is “The Year of Stacked Memory,” noting how memory die stacked in one package are becoming more commonplace in 2015.
In a deal with significant implications for high-tech chemicals and materials, The Dow Chemical Company and E. I. du Pont de Nemours and Company (DuPont) have agreed to merge, forming the second largest chemical company in the world, behind BASF SE.
Mattson Technology agreed this month to be acquired by Beijing E-Town Dragon Semiconductor Industry Investment Center, a limited partnership in China, for about $300 million in cash.
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The increasing demand for wireless data bandwidth and the emergence of LTE and LTE Advanced standards pushes radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance.
Everybody’s talking about it, but just what is DFM? According to various EDA company websites, design for manufacturing can be: generation of yield optimized cells; layout compaction; wafer mapping optimization; planarity fill; or, statistical timing among other definitions. Obviously, there is very little consensus. For me, DFM is what makes my job hard: Characterizing it, and developing tools for it, is the most important item on my agenda.
In nanometer designs, the number of single vias, and the number of via transitions with minimal overlap, can contribute significantly to yield loss. Yet doubling every via leads to other yield-related problems and has a huge impact on design size. While there is still concern over of how many vias can be fixed without rerouting and without creating DRC violations, the Calibre via doubling tool can identify via transitions and recommend areas for second via insertion without increasing area.
Certain measurement methodologies can be inaccurate even if they’re precise, and there are known errors associated with certain system parameters.
The etch loading effect is the dominant factor that impacts final CD control at advanced nodes with shrinking critical dimension.
A look at ways to simplify the optical and resist model calibration and to speed up the entire process.
Fabricating interconnects is one of the most process-intensive and cost-sensitive parts of manufacturing.
Testing interposer-based versions of stacked die and future versions using through-silicon vias.
EUV will introduce unwanted patterning distortions that must be accurately modeled and corrected.
How to tame data file sizes, address fractured data files creation and streamline data review techniques.