Bionic Ears
Using a 3D printer, Princeton University has devised a bionic ear. The fully functional ear is said to hear radio frequencies far beyond the range of normal human capability.

The idea behind the research is to merge electronics with tissue. The ability to devise 3D biological tissue with functional electronics could enable the creation of bionic organs, according to researchers. But current electronics are limited to 2D structures, preventing the integration of biological systems and conventional chips.

Researchers have devised a novel strategy to overcome these difficulties. In a proof of concept, Princeton used a 3D printer to devise a cell-seeded hydrogel matrix in the precise anatomic geometry of a human ear. Researchers also intertwined a conducting polymer consisting of silver nanoparticles. “This allowed for the in vitro culturing of cartilage tissue around an inductive coil antenna in the ear, which subsequently connects to cochlear-like electrodes,” according to researchers.

The printed ear exhibits enhanced auditory sensing for RF reception. “In general, there are mechanical and thermal challenges with interfacing electronic materials with biological materials,” said Michael McAlpine, an assistant professor of mechanical and aerospace engineering at Princeton, on the university’s Web site. “Previously, researchers have suggested some strategies to tailor the electronics so that this merger is less awkward. That typically happens between a 2D sheet of electronics and a surface of the tissue. However, our work suggests a new approach—to build and grow the biology up with the electronics synergistically and in a 3D interwoven format.”

Super Microscopes
Purdue University has devised a new super-resolution optical microscopy technology, thereby paving the way to view structures on the nanoscopic scale.

The imaging system, called saturated transient absorption microscopy, (STAM), is designed for use in biomedical and nanotechnology research. Researchers have taken images of graphite nanoplatelets at about 100nm wide. Researchers hope to improve the imaging system to see objects at about 10nm in diameter. This is about 30 times smaller than possible using conventional optical microscopes.

Current far-field, super-resolution techniques rely on fluorescence as the readout. However, Purdue has demonstrated a scheme for breaking the diffraction limit in far-field imaging of non-fluorescent species. Researchers accomplished this by using spatially controlled saturation of electronic absorption.

The method is based on a pump–probe process, where a modulated pump field perturbs the charge carrier density in a sample, according to Purdue. This, in turn, modulates the transmission of a probe field, according to researchers.

A doughnut-shaped laser beam is then added to transiently saturate the electronic transition in the periphery of the focal volume. The induced modulation in the sequential probe pulse only occurs at the focal center. By raster-scanning the three collinearly aligned beams, high-speed subdiffraction-limited imaging of graphite nanoplatelets is performed.

Diamonds Are Forever
Element Six and Delft University of Technology have demonstrated the entanglement of an electron spin effect of quantum bits in two synthetic diamonds separated in space. This is a step toward achieving a diamond-based quantum network, quantum repeaters and long-distance teleportation, thereby changing the way information is processed in networks and computers.

The collaboration used two synthetic diamonds of millimeter-size that were grown by Element Six through a proprietary chemical vapor deposition (CVD) technology. The synthetic diamonds were engineered to contain a particular defect that can be manipulated using light and microwaves. The defect consists of a single nitrogen atom adjacent to a missing carbon atom—known as a nitrogen vacancy (NV) defect.

The entanglement process is what Albert Einstein called “spooky action at a distance.” This is a process where the two NV defects become strongly connected such that they are always correlated irrespective of the distance between them.

Researchers were able to make the two NV defects emit indistinguishable particles of light or photons. These photons contained the quantum information of the NV defect and further manipulation allowed the quantum mechanically entanglement of the two defects.

“By applying the invaluable knowledge gained in our research, we’re able to successfully develop and advance extreme performance solutions for our customers that capitalize on synthetic diamond’s unique combination of properties, which can subsequently be leveraged across a range of industries,” said Adrian Wilson, head of Element Six, a developer of synthetic diamonds and a member of the De Beers Group.

—Mark LaPedus

Wise Old (Owl) Chips
Graphene is a promising material for use in future transistors. It consists of one-atom-thick planar sheets, which are packed in honeycomb crystal lattice structures. The problem is that graphene doesn’t have a band gap, meaning it can’t be turned off in a system.

Rice University, Cornell University and others have devised a new, and wise, way to turn graphene into working circuits. Researchers have developed 100nm, 2D circuits using these materials. And they have also used the technology to pattern a structure in the shape of Rice’s mascot, the owl.

Researchers have combined graphene and hexagonal boron nitride (h-BN) as an insulator to make 2D circuits. With proper control, the band gap and magnetic properties of these materials can be controlled. These materials have fundamental limitations, however. And they cannot be easily integrated with conventional lithography, according to researchers.

To enable the technology, researchers have devised a “patterned regrowth” process. This enables the spatially controlled synthesis of lateral junctions between electrically conductive graphene and insulating h-BN, as well as between intrinsic and doped graphene, according to researchers.

Using chemical vapor deposition (CVD), researchers first deposited a sheet of h-BN. A mask was placed over the h-BN. The exposed material was etched away with argon gas. Then, graphene was grown via CVD in the open spaces. The hybrid layer could then be picked up and placed on any substrate.

The resulting films form continuous sheets across these hetero-junctions. At present, researchers have demonstrated 100nm technology. “It should be possible to make fully functional devices with circuits at 30, even 20 nanometers wide, all in two dimensions,” said Rice researcher Jun Lou, on the university’s Web site.

Researchers Dive Into Nano Tunnels
The Karlsruhe Institute of Technology (KIT) and Rice University claim to have dug the world’s smallest nano tunnels.

Researchers have devised metal particles, which can bore or form tunnels into graphite materials. Engineered nanoporous tunnel networks in graphite may find applications in medicine and battery technology. They also could pave the way toward nanopatterning of graphene to enable graphene nanoribbons.

In the lab, researchers devised layered carbon atoms to form graphite. The tunnels are made applying nickel nanoparticles to the graphite. These materials are heated in hydrogen gas. The surface of the metal particles serves as a catalyst removing the carbon atoms of the graphite.

Through capillary forces, the nickel particle is drawn into the hole that forms and bores through the material. The size of the tunnels obtained in the experiments was in the range of 1nm to 50nm.

On its Web site, Maya Lukas and Velimir Meded from KIT said: “The tunnels below these upper layers, however, leave atomic structures on the surface whose courses can be traced and which can be assigned to the nanotunnels by means of the very detailed scanning tunneling microscopy images and based on computerized simulations.”

Good Genes Enable Storage
The EMBL-European Bioinformatics Institute (EMBL-EBI) has devised a DNA storage technology. The technology could make it possible to store at least 100 million hours of high-definition video in a cup of DNA.

DNA is generating interest as a storage technology because of its ability to handle high-density information encoding. But previous DNA-based information storage efforts have only encoded small amounts of information.

Researchers have devised a scalable DNA storage technology. They encoded computer files totaling 739 kilobytes of hard-disk storage, with an estimated 5.2 × 106 bits into a DNA code. Researchers synthesized, sequenced and reconstructed the DNA to its original files with 100% accuracy.

“We knew we needed to make a code using only short strings of DNA, and to do it in such a way that creating a run of the same letter would be impossible. So we figured, let’s break up the code into lots of overlapping fragments going in both directions, with indexing information showing where each fragment belongs in the overall code, and make a coding scheme that doesn’t allow repeats. That way, you would have to have the same error on four different fragments for it to fail—and that would be very rare,” said Ewan Birney, associate director of EMBL-EBI, on the research group’s Web site.

In one experiment, the group sent various encoded information to Agilent Technologies. “We downloaded the files from the Web and used them to synthesize hundreds of thousands of pieces of DNA – the result looks like a tiny piece of dust,” said Emily Leproust of Agilent. In turn, Agilent mailed the sample to EMBL-EBI, where the researchers were able to sequence the DNA and decode the files without errors.

—Mark LaPedus

New Breakthroughs In Robotics
For years, the IC industry has been looking at robotics as a big driver for chips. Robotics is still in its infancy and the technology remains a tiny part of the semiconductor industry.

One company, iRobot, has garnered attention with its vacuum cleaning robots. In fact, the company recently launched the Looj gutter cleaning robot and new Roomba 600 Series vacuum cleaning robots.

The Defense Advanced Research Projects Agency (DARPA) also is developing robots for military applications, including robotic “pack mule” prototypes, a Cheetah robot and silicone robots.

To help in emergency responses, humanitarian assistance and defense missions, robots need to negotiate over difficult terrain at suitable speeds. DARPA has just demonstrated two “pack mule” robot prototypes, dubbed the Legged Squad Support System (LS3). LS3 is a program that hopes to devise mobile, semi-autonomous legged robots that can carry 400 pounds and follow soldiers through rugged terrain.

A two-year, platform-refinement test cycle began in 2012, with Marine and Army involvement. The recent LS3 demonstration included trotting, jogging, mobility runs and perception visualization. The LS3 is devised by Boston Dynamics of Waltham, Mass.

“We’ve refined the LS3 platform and have begun field testing against requirements of the Marine Corps,” said Army Lt. Col. Joe Hitt, DARPA program manager, on the DARPA site. “The vision for LS3 is to combine the capabilities of a pack mule with the intelligence of a trained animal.”

The demo also exhibited reduced noise levels for the robots. “LS3 is now roughly 10 times quieter than when the platform first came online, so squad members can carry on a conversation right next to it, which was difficult before,” Hitt said.

“Other improvements include the ability to go from a 1- to 3-mph walk and trot over rough, rocky terrain, easily transition to a 5-mph jog and, eventually, a 7-mph run over flat surfaces, showing the versatility needed to accompany dismounted units in various terrains,” Hitt said. “The LS3 has demonstrated it is very stable on its legs, but if it should tip over for some reason, it can automatically right itself, stand up and carry on. LS3 also has the ability to follow a human leader and track members of a squad in forested terrain and high brush.”

In another development, DARPA recently updated its so-called Cheetah robot. Cheetah recently broke its own land speed record of 18 miles per hour and was clocked at 28.3 mph for a 20-meter split. This makes the robot faster than Jamaican sprinter Usain Bolt. According to the International Association of Athletics Federations, Bolt set the world speed record for a human in 2009 when he reached a peak speed of 27.78 mph for a 20-meter split during the 100-meter sprint.

Cheetah is being developed and tested under DARPA’s Maximum Mobility and Manipulation (M3) program by Boston Dynamics. DARPA intends to test a prototype on natural terrain next year. Cheetah currently runs on a treadmill in a lab.

The current version of the Cheetah robot is powered by an off-board hydraulic pump. “What DARPA is doing with its robotics programs is attempting to understand and engineer into robots certain core capabilities that living organisms have refined over a millennia of evolution: efficient locomotion, manipulation of objects and adaptability to environments,” said Gill Pratt, DARPA program manager, on DARPA’s site. “What we gain through Cheetah and related research efforts are technological building blocks that create possibilities for a whole range of robots suited to future Department of Defense missions.”

DARPA also foresees robots of many shapes and sizes contributing to a wide range of future defense missions. Not to be outdone, researchers have devised a robot made of silicone. It can walk, change color and light up in the dark at less than $100.

Harvard University and the Wyss Institute for Biologically Inspired Engineering have demonstrated soft robots with microfluidic channels. Soft robots can perform several functions, such as actuation, camouflage, display, fluid transport and temperature regulation. The work is being performed under DARPA’s M3 program.

Researchers used tethers to attach the control system and pump pressurized gases and liquids into the robot. At a pumping rate of 2.25 milliliters per minute, color change in the robot required 30 seconds. Once filled, the color layers require no power to sustain the color.

Glass-Blown 3D Sensors
The military relies on global positioning system (GPS) technology and sensors for navigation. Sensors, namely gyroscopes, are bulky and expensive to make. A gyroscope designed as an inertial sensor accurate enough for a missile can take up to one month to assemble and cost up to $1 million, according to DARPA.

In a phase 1 portion of a project, DARPA is developing new 3D fabrication techniques for devising microscale inertial sensors, based on traditional glass blowing and atomic layering of diamond. The final goal of the phase 2 portion is to demonstrate an integrating gyroscope. “These new fabrication methods were thought to be unrealistic just a few years ago,” said Andrei Shkel, DARPA program manager, on DARPA’s site. “Phase 2 has kicked off, in which DARPA seeks to hone these methods to create and demonstrate operational devices.”

The idea is to replace expensive gyroscopes with devices that resemble Foucault pendulums. These types of devices consist of a tall pendulum, which swings in any vertical plane. But instead of a swinging pendulum, microscale inertial sensors send out vibrations across the surface of a 3D structure. The waves are measured and any changes reflect a change in orientation, according to DARPA.

To make microscale inertial sensors, DARPA is looking at three fabrication methods: traditional glass blowing, quartz blowing and atomic layering of diamond. Traditional glass-blowing techniques resulted in the development of tiny 3D wineglass-shaped inertial sensors, which have a frequency split approaching 10Hz. Frequency split is a measure to predict the symmetry and accuracy of a device.

DARPA also developed quartz blowing fabrication techniques needed to heat quartz to 1,700 degrees Celsius and to then cool it rapidly. The fabrication technique is used to make symmetric structures. Finally, layering diamond over a blown structure or depositing CVD diamond in a micro-well on the substrate enables symmetric, accurate 3D inertial-sensor structures.

The phase 2 process hopes to make these devices more accurate and reliable by reducing frequency split from 10 Hz to 5 Hz, increasing decay times from 10 seconds to 100 seconds, and decreasing volume from 20mm3 to 10mm3. “As work continues, DARPA hopes these new technologies will enable large-scale production of navigation-grade microscale inertial sensors,” added Shkel. “Production of 3D inertial sensors with these new techniques would cost about the same as today’s integrated circuit, making them orders of magnitude smaller, cheaper and more capable than current microgyroscopes.”

Chemical Lift-Off Lithography To Pattern Molecules
UCLA has developed a new process called chemical lift-off lithography (CLL), which is said to pattern biomolecules at high resolutions.

The technology solves a major problem. Traditionally, the way to pattern biomolecules has been a method that resembles nanoimprint lithography. Tiny stamps are devised and covered with molecular “inks,” thereby creating molecular patterns. But this technique tends to diffuse on the surface both during and after stamping, which blurs the patterns.

To address this problem, UCLA has devised a “soft lithography” process called CLL. CLL also resembles nanoimprint lithography. In CLL, UCLA uses chemically treated stamps to remove molecules already in place on gold substrates. This, in turn, peels away select molecules through chemical bonds to create patterns.

UCLA has developed a “subtractive” stamping process in which silicone rubber stamps, activated by oxygen plasma, selectively remove hydroxyl-terminated alkanethiols from self-assembled monolayers (SAMs) on gold surfaces with high pattern fidelity. Monolayer backfilling into the lift-off areas enabled patterned protein capture, and 40nm chemical patterns were achieved, according to UCLA.

New Epitaxial Materials
Epitaxial thin films are created by growing a crystal layer of one material on another. The goal is to get the structures to align. But the issue is to grow the film coherently with minimal defects.

Oak Ridge National Laboratory has discovered a path toward defect-free thin films. It discovered a strain relaxation phenomenon in cobaltites. Cobaltite is a sulfosalt mineral composed of cobalt, arsenic and sulfur.

Researchers were able to devise cobaltite with structurally atomic patterns. The material can change its magnetic properties and minimize the size mismatch with a crystalline substrate. It also could lead to new advances in fuel cells, magnetic sensors and other materials.

The finding changes the conventional wisdom that accommodating the strain inherent during the formation of epitaxial thin films necessarily involves structural defects. Using scanning transmission electron microscopy complemented by X-ray and optical spectroscopy, researchers could see unconventional strain relaxation behavior that produced stripe-like lattice patterns.

“We discovered properties that were not readily apparent in crystal, or bulk form, but in thin-film form we were able to clearly see the atomically ordered lattice structure of lanthanum cobaltite,” said Ho Nyung Lee, a member of the Department of Energy lab’s Materials Science and Technology Division. “With this knowledge, we hope to be able to tailor the physical properties of a material for many information and energy technologies.”

—Mark LaPedus

by Ed Korczynski

After years of debate and development, air gaps are finally seeing commercial introduction in Flash interconnects. An IEDM 2010 paper presented by Kirk Prall of Micron Technology and Krishna Parat of Intel described the interconnect technology used for the companies’ 25nm multi-level-cell 64 Gbit NAND, which includes air-gaps in low-k dielectric materials (figure).

The disclosure follows details first shown by Intel at the International Interconnect Technology Conference (IITC 2010) on the reliability of air-gaps for electrical insulation in nano-scale devices. While other companies have shown tests of air-gaps, this is the first time that a commercial chip has been designed using air-gaps. Prior Flash chips from many manufacturers have had air-gaps, but seemingly only as anticipated accidents. Philips (now NXP) and IBM have reported on air-gaps for logic chips, but thus far without product commitments.

To reduce the dielectric constant (k) in shrinking integrated circuits (IC), there once was a roadmap for new materials to be deployed with ever lower k at each node. However, integration challenges in practice limited new materials to essentially two moves over the last 15 years: from SiO2 (k~4) to SiOF (k~3.5) and then to SiOCH (k~3). Because solid materials with k<3 have generally not met integration requirements for mechanical stability, much effort was expended to try to add pores (with k~1) to SiOCH to make a porous-low-k (PLK) dielectric with bulk k value proportional to the percent of air incorporated. PLK with porosity up to ~10% allows for k~2.7, and such a film can be integrated with minimal extra work (perhaps just a UV stabilization anneal step) compared to pure SiOCH. However, adding porosity >10% mandates the use of extra barrier/cap layers that almost always combine to produce new failure mechanisms, and the extra layers add capacitance to the whole dielectric stack such that the “effective-k” (keff) tends to end up back at ~2.7 after integration.

At an abstract conceptual level, an air-gap in a dielectric may be considered as a limiting case of PLK, where there is merely one large pore designed into the center of the structure. This is different from “air-bridges” where all solid and liquid dielectric is removed from interconnect structures. Some solid SiOCH dielectric remains around the air-gaps to provide mechanical strength and chemical barrier.

At IEDM 2010, Hynix R&D Division researcher Sungjoo Hong discussed the challenges of continued scaling of NAND Flash technology based on the floating gate (FG) architecture. Scaling has created word-line (WL) to WL spacings such that cross-coupling effects now decrease programming speed. Hong stated that air-gap technology can minimize cross-coupling, but it is necessary to control the integrated process for precise uniformity.

In 2006, researchers from Philips (working with ST, Leti, and IMEC) presented an outstanding paper at the Materials Research Society (MRS) spring meeting on “Benefits and Trade-offs in Multi-Level Air Gap Integration” (Ref: MRS Symp. F Proc. Vol.914). The paper provides a thorough overview of the possible variations on the air-gap theme: generally either additive using CVD or subtractive using a plasma/furnace/vacuum chamber.

One year later, IBM showed subtractive air-gaps integrated into an interconnect stack as proof of concept, using either lithography or self-assembled monolayers to mask off areas around the gaps. At IITC2010, Intel researchers reported that their air gap integration tests have so far resulted in no new failure modes observed. This is highly significant since almost any material change results in new ways for things to fail.

Additive air-gaps: pinching off bread loaves free

For over twenty years, air-gaps have been seen as defects in dielectrics deposited between metal lines. This editor once ran the application lab for Watkins-Johnson (W-J) atmospheric pressure chemical-vapor deposition (APCVD) systems, and learned that any CVD tool can be tuned to produce air-gaps in between lines of equal spacing. As the line sidewalls get coated the cross-section of the coating starts to look like a “bread-loaf” on each side until the top sides “pinch-off” to form an “air-gap” (figure). If you are working with subtractive metal patterning like that for aluminum or tungsten then additive air-gaps can come free with the dielectric deposition.

If you are working with additive metal like copper then additive air-gaps cost an extra etch and deposition step. Of course in either case, the “gap” is really an elongated bubble, and the “air” inside is a combination of the ambient inside the CVD chamber along with trace vapors from the dielectric material.

ChipWorks (the IC reverse-engineering experts in Ottawa) have cross-sectioned commercial memory chips for many years, and often observed dielectric voids in NAND Flash structures. “We have seen voids in between the wordlines of NAND Flash chips, in structures that appear to be not too different from what have been regular in memory,” said ChipWorks’ senior technology advisor Dick James. “We’ve seen voids at ~50nm half-poly-pitch in NAND chips. Even at ~90nm there have been variable voids.”

However, the voids seen so far in commercially available NAND chips appear to be incidental, since they vary in size from gate to gate and sometime disappear entirely (figure). Since ChipWorks has SEM cross-sections of chips from Micron, Samsung, and Toshiba all showing sporadic air-gaps, and since none of these companies had declared air-gaps as intentional design elements, it appears likely they truly were anticipated accidents. Anticipated since the design and manufacturing must allow for air-gaps to be present, yet accidental since the air-gaps may not appear in any one place. Generally speaking, the repeating structures of memory chips makes such anticipated accidental integration possible, while random logic structures don’t allow for such accidents.

Subtractive air-gaps: staying between the lines

To control where air-gaps form outside of periodically structured arrays, another lithography step may be needed to align an etch mask, as shown by Philips and IBM. During their IEDM presentation, Micron and Intel did not detail the air-gap integration processes used for the WL and bitline (BL) dielectrics. However, since the two cross-sections appear differently in the IEDM paper, they probably used different processes. The WL direction looks similar to the WL seen by ChipWorks in previous NAND structures, so was probably formed additively. Presuming the designers are given forbidden pitches to avoid in a layer, the air-gaps could truly come free without even the need for a “non-critical” mask to block out inconvenient areas.

Air-gaps may soon appear in logic structures as well. Since it appears likely that the 22/20nm node of logic will rely upon 1D grid layouts, such severely restricted-design-rules (RDR) will already include forbidden pitches. Consequently, pinch-off additive air-gaps could easily be tuned into CVD processes for dielectrics. If subtractive air-gap flows are needed, then array patterns still allow for relatively easier patterning. Both Intel and IBM are now in top-secret pilot production with this node, but within the year we should learn whether air-gaps are only for memory or whether they will be the mainstream low-k dielectric solution for all future ICs.