TSMC to Increase Capex for 20nm Pilot Line
By David Lammers
TSMC chairman and CEO Morris Chang said the early demand for mobile ICs at the 28nm node is behind a decision to increase capital expenditures for this year, including a pull in of construction of a 20nm R&D process line.
The $700 million pull-in plan for the 20nm R&D line will raise TSMC’s capital expenditure plan to the $8-8.5 billion range for this year, the beginning of what Chang said is likely to be several years of stronger investments. The new capex plan is a strong upward revision from the earlier plan to spend $6 billion for this year on capacity expansions.
On a conference call following release of the foundry’s first-quarter results, Chang was asked about the motivation for the earlier-than-expected construction of the 20nm R&D line. The 28nm node is the first technology generation in which mobile ICs played such a large role in the beginning phase of a process node, Chang said.
(Source: TSMC, April 26, 2012)
“The very big users (in the mobile space) have played a very big role in the 28nm ramp, and we have had to ramp 28nm production very fast, faster than ever before. In past nodes we did not have such big users pushing us to add capacity at the initial stages of a technology generation.”
Chang said the 20nm node may ramp “even faster than the 28nm node.” The early capex in the 20nm pilot line will allow TSMC to “shorten the learning cycle. We feel it is to our advantage to learn faster, sooner, and that is why we are pulling in the $700 million in capex,” Chang said.
Dotted Line Roadmap
While the TSMC executives said they are confident about strong demand, they acknowledged that the company’s technology roadmap remains in flux.
Chang was asked if TSMC will switch from a planar to a finFET technology at the 14nm node, or at a “later version” of the 20nm node. Chang said “at this point I am not going to commit or predict,” acknowledging that TSMC is considering pulling in finFETs prior to the 14nm node. Fabless companies have been pressuring their foundries to move quickly to the vertical transistors.
Another analyst asked if the foundry’s costs would increase sharply, with EUV, finFETs, and 450mm wafers all on the horizon, requiring a “sustained capital intensity” higher than in recent years. Chang said growth prospects for this year and the next few years are strong enough to bear the higher investments.
“I can’t answer you in a few sentences. We are having to integrate all of the financial factors into a business equation. Before we commit the kind of capital required, we must have the potential to get a good return on our investment. We must have a pretty good grasp on that before we commit the capital.”
But Chang said a capital intensity of 40-50 percent “doesn’t bother me,” noting that there have been previous periods of such strong investments when demand was strong, as it is now. “The years of 20-25 percent capital intensity have been low growth years,” he wryly added, saying that “it is a question of seizing a growth opportunity when it presents itself.”
The lithography conundrum needs to be resolved by the middle of 2013, he said. TSMC’s lithography supplier has been working “very actively” on both immersion 193nm and EUV technology, with plans to “increase immersion throughputs pretty dramatically.” While improvements to EUV throughputs have been notable over the last six months, EUV remains “pretty far” from the kind of throughputs that will make it production-worthy.
“Over the next 12-14 months, by the middle of 2013, we need to make quite a critical decision about which way to go: faster immersion, or faster EUV,” Chang said.
The TSMC founder said the 28nm node promises to be the strongest technology generation in the company’s history, surpassing the 65nm node, which had “mountain top” output of 120,000 to 130,000 wafers per month. “I expect the 28nm generation will top that,” Chang said, with the peak reached in 2014.
Asked about TSMC’s expectation for this year in the total number of 28nm processed wafers, chief financial officer Lora Ho said about 350,000 to 400,000 28nm wafers will be produced this year. Fab 15 will begin 28-nm volume production this month, and then ramp “at a fastest speed in our history” to reach ~50,000 wpm by year-end.
At the company’s Austin technology symposium, executives said TSMC is adding 28nm capacity at its gigafabs in Hsinchu (Fab 12) and Taichung, in central Taiwan (Fab 15). Rick Cassidy, president of TSMC North America, said demand for 28nm ICs includes smartphone processors, graphics, and FPGAs, among others. Cassidy said the 28nm capacity expansion at Fab 15 was pulled in by three months, and the capacity ramp is gated by how fast the company can install scanners and other key pieces of equipment.
“We are tapped out at all of our equipment suppliers,” Cassidy told the Austin audience.
Len Jelenik, a semiconductor manufacturing analyst at IHS, said he expects most of the major foundries to increase their capital expenditures this year.
UMC had a strategy of being a “fast follower” to TSMC, but then found that a major customer, Altera Corp., switched much of its production to TSMC in order to stay at the leading edge. That caused UMC to return to a strong focus on staying at the leading edge, Jelenik said.
SMIC also is likely to boost its capital expenditures this year, filling out empty shells in its China fabs.
GlobalFoundries will begin producing 28nm products late this year, starting with game ICs made for IBM on a foundry basis. Jelenik said GlobalFoundries also has room at its Malta shell to sharply increase production after the fab is up-and-running.
Tags: 20nm, capital expenditures, TSMC