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Top Stories — December 01, 2014
Germanium Junctions for CMOS
Enabling NMOS using Ge channels for CMOS finFETs.
Applied Materials Introduces New Hardmask Process, Saphira
A new hardmask material, called Saphira, and accompanying processes was introduced Applied Materials. The material, which is transparent and offers high selectivity and good mechanical strength, could reduce manufacturing costs by 35% per module.
Air-gaps in Copper Interconnects for Logic
Intel's "14nm-node" process uses air-gaps in dielectrics; direction disclosed four years ago.
Emerging Requirements for Electronic Materials Product Quality and Metrology
In order to keep pace with Moore's Law, semiconductor market leaders have had to adopt increasingly challenging technology roadmaps, which are leading to new demands on electronic materials (EM) product quality for leading-edge chip manufacturing.
Experts at the Table: Focus on Semiconductor Materials
The cutting edge in semiconductor manufacturing has meant not only big changes in IC design and process technology, but also in semiconductor materials. What follows are responses from Linde Electronics; Kate Wilson of Edwards Vacuum; David Thompson, Technology Director, Process Chemistries, Silicon Systems Group, Applied Materials; and Ed Shober, General Manager, Advanced Materials, Air Products and Chemicals.
NFC IGZO TFT for Game Cards
Thin-film transistors (TFT) made with indium-gallium-zinc-oxide (IGZO) can perform significantly better than TFTs made with low-temperature-poly-silicon (LTPS), and can be made ultra-thin and flexible for integration into a wide variety of devices.
Applied Materials Q4 Report
Applied Materials reported in a fourth quarter earnings call that its long-pending merger with Tokyo Electron Ltd. may not close until the first quarter of 2015.
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News & Features
Slideshow: IEDM 2014 Preview
This year, the IEEE International Electron Devices Meeting (IEDM) has an increased emphasis on circuit and process technology interaction, energy harvesting, bio-snesors and bioMEMS, power devices, magnetics and spintronics, two dimensional electronics and devices for non-Boolean computing.
Research Alert: November 18, 2014
New process isolates promising material; Revolutionary solar-friendly form of silicon shines; New way to move atomically thin semiconductors for use in flexible devices
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Blogs/Twitter
Insights From Leading Edge
IFTLE 218 IMAPS 2014 contd: K&S Thermo compression, Shinko 3D stacking, Samsung High Density Organic Interposers
Continuing our look at the 2014 IMAPS Conference held in San Diego…
Materials Matters
Emerging Requirements for Electronic Materials Product Quality and Metrology
Technology changes in semiconductor processing and demands for higher-purity and better-characterized electronic materials have driven the need for ...
IC Design
My Design's Interconnect Has Enough Wire Width to Withstand ESD… Doesn't It?
While layout engineers are struggling to implement interconnect that meets chip area goals, they must also be concerned ...
Applied Innovation
What's in a Name? Innovation for Humanity
The project names Gooru, Nanoly, and Sanergy are intriguing. The fact these names represent efforts all over the ...
ASN's All Things SOI
Is China Interested in FD-SOI? You Bet.
At the recent FD-SOI Forum in Shanghai, the IoT (Internet of Things) was the #1 topic in all ...
Pete's Posts Blog
Semiconductor Materials: Growth, Opportunities and Challenges
Don't miss this week's webcast on Thursday. First, Lita Shon?Roy, President/CEO of Techcet, will provide an overview of ...
Ed's Threads
ASML Books Production EUV Orders
TSMC commits to two tools for delivery next year Maybe, just maybe, ASML Holding N.V. (ASML) has made ...
Viewpoints: SEMI
SEMICON Europa 2014 in Grenoble Expands by 40%: Increasing Opportunities as Supply Chain Complexity Grows
SEMICON Europa 2014, the industry's opportunity to network with customers, suppliers, partners and peers, opens today at ALPEXPO ...
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Videos/Podcasts
Solid State Watch: November 7-14, 2014
A new product scope for an expanded Information Technology Agreement announced; Silicon wafer shipments increased in third quarter; New CEO of SEMATECH; SIA board of directors announces new chairman
Chris Ciufo Interviews ARM's Ian Drew
At ARM TechCon, Ian Drew, chief marketing officer for ARM, talks to Chris Ciufo about servers, including a new announcement with Hewlett-Packard.
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White Papers
RF-SOI Wafers for Wireless Applications
The increasing demand for wireless data bandwidth and the emergence of LTE and LTE Advanced standards pushes radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance.
DFM: What is it and what will it do?
Everybody's talking about it, but just what is DFM? According to various EDA company websites, design for manufacturing can be: generation of yield optimized cells; layout compaction; wafer mapping optimization; planarity fill; or, statistical timing among other definitions. Obviously, there is very little consensus. For me, DFM is what makes my job hard: Characterizing it, and developing tools for it, is the most important item on my agenda.
Via Doubling to Improve Yield
In nanometer designs, the number of single vias, and the number of via transitions with minimal overlap, can contribute significantly to yield loss. Yet doubling every via leads to other yield-related problems and has a huge impact on design size. While there is still concern over of how many vias can be fixed without rerouting and without creating DRC violations, the Calibre via doubling tool can identify via transitions and recommend areas for second via insertion without increasing area.
The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions
Certain measurement methodologies can be inaccurate even if they're precise, and there are known errors associated with certain system parameters.
A Study Of Model-Based Etch Bias Retarget For OPC
The etch loading effect is the dominant factor that impacts final CD control at advanced nodes with shrinking critical dimension.
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