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Top Stories — February 19, 2014
3D NAND: To 10nm and beyond
Despite the potential of 3D NAND and announcements by the leading players in the industry, transferring 3D NAND technology into mass production is very challenging to do. 3D NAND does not require leading-edge lithography, eventually resulting in manufacturing costs that are lower than they would be for the extension of planar NAND, new deposition and etch technologies are required for high-aspect-ratio etch processes.
Experts At The Table: Commercial potential and production challenges for 3D NAND memory technology
SemiMD"s roundtable focused on 3D NAND includes Samsung Electronics (SE) in South Korea, which has begun production of its proprietary 3D NAND technology, Bradley Howard, Vice President of Advanced Technology Group, Etch Business Unit, at Applied Materials and Jim Handy from Objective Analysis, which specializes in coverage of the memory industry.
No technical barriers seen for 450mm
Paul Farrar, general manager of the G450C consortium, said early work has demonstrated good results and that he sees no real barriers to implementing 450mm wafers from a technical standpoint, but said gains in efficiencies were needed in order to meet the cost-saving goals of the program. "In the end, if this isn"t cheaper, no one is going to do it," he said.
Obama State of the Union Calls for a "Year of Action" — Highlighting Multiple Industry Priorities
The President touched on many different policy areas during his talk, and specifically mentioned a number of issues that are of top concern in the industry and with SEMI member companies. Among these are funding for federal R&D, including public-private partnerships, trade, high-skilled immigration reform, and solar energy.
Solid State Technology January 2014
The latest issue of Solid State Technology viewpoints from a variety of industry leaders on what we can expect in the coming year. The two keywords: Innovation and Collaboration.
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News & Features
Research Alert: Feb. 18, 2014
Breakthrough development of flexible 1D-1R memory cell array; Leeds researchers build world's most powerful terahertz laser chip; Quantum dots provide complete control of photons
Blog review February 10, 2014
New blogs discuss why Intel's embedded DRAMs have a very different structure than other e-DRAMs, the expected future of interposers (mostly silicon!), the hottest devices and trends in evidence at the Consumer Electronics Show, thoughts on how we got to where we are and answers to other life questions, the upcoming MEMS Executive Congress in Munich, and a look back at Solid State Technology in 1964.
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Applied Innovation
Why Silicon Valley Should be Called Innovation Valley
Why is Silicon Valley the world center for innovation? How does innovation continue to thrive there? How do ...
ASN's All Things SOI
A New Open Foundry Source for FD-SOI? Soon, Says ST.
STMicroelectronics will soon be announcing a "major foundry player" that will be both a dual FD-SOI manufacturing source ...
Viewpoints: SEMI
Obama State of the Union Calls for a "Year of Action"— Highlighting Multiple Industry Priorities
On January 28, 2014, President Obama used the occasion of his 5th State of the Union address to ...
Pete's Posts Blog
No technical barriers seen for 450mm
Paul Farrar, general manager of the G450C consortium, said early work has demonstrated good results and that he ...
Insights From Leading Edge
IFTLE 180 GaTech Interposer Conference
Continuing our look at the 2013 GaTech Interposer Conference.
Intel's e-DRAM Shows Up In The Wild
When Intel launched their Haswell series chips last June, they stated that the high-end systems would have embedded ...
MEMS Industry Group Blog
Exploring the MEMS-Enabled Life: A Preview of MEMS Executive Congress Europe 2014
Munich, Germany is one of my favorite cities in the world. If you agree or if you've never ...
Semico Spotlight
Semico's Top 5 Technologies from CES
As usual, this year's CES was dauntingly huge. There were thousands of products and over 150,000 people ...
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Solid State Watch: February 7-13, 2014
IBM looking for buyers for semiconductor business; Worldwide silicon revenues declined in 2013; SPTS opens Korean office; Leti launches PIEZOMAT
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White Papers
RF-SOI Wafers for Wireless Applications
The increasing demand for wireless data bandwidth and the emergence of LTE and LTE Advanced standards pushes radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance.
DFM: What is it and what will it do?
Everybody's talking about it, but just what is DFM? According to various EDA company websites, design for manufacturing can be: generation of yield optimized cells; layout compaction; wafer mapping optimization; planarity fill; or, statistical timing among other definitions. Obviously, there is very little consensus. For me, DFM is what makes my job hard: Characterizing it, and developing tools for it, is the most important item on my agenda.
Via Doubling to Improve Yield
In nanometer designs, the number of single vias, and the number of via transitions with minimal overlap, can contribute significantly to yield loss. Yet doubling every via leads to other yield-related problems and has a huge impact on design size. While there is still concern over of how many vias can be fixed without rerouting and without creating DRC violations, the Calibre via doubling tool can identify via transitions and recommend areas for second via insertion without increasing area.
The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions
Certain measurement methodologies can be inaccurate even if they're precise, and there are known errors associated with certain system parameters.
A Study Of Model-Based Etch Bias Retarget For OPC
The etch loading effect is the dominant factor that impacts final CD control at advanced nodes with shrinking critical dimension.
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Semiconductor Manufacturing & Design Newsletter is published monthly and contains deep insights for chip architects and engineers. SemiMD is published by Extension Media LLC and is part of the Chip Design Network.
Editor in Chief: John Blyler
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