|
 |
DNS Ponders Ice as New Wafer Cleaning Agent |
|
|
 |
|
Technologists from Dai Nippon Screen said they are working on a single-wafer cleaning technique which relies on the expansive force which occurs when water becomes ice. A major Asian foundry is working with DNS to bring the ice cleaning technique into commercial use, executives said at the Sematech Surface Preparation and Clean Conference (SPCC). |
|
|
|
|
Red Micro Wire Claims a Better Copper Wire |
|
|
 |
|
Copper wiring, often with palladium coating, is being adopted by assembly houses seeking to save on material costs. Now, Red Micro Wire claims it has a less-expensive way to create assembly wire, with a metal core coated with glass. The wire is cast, not drawn, and can be thinned down to smaller diameters than Pd-coated copper, according to RMW. |
|
|
|
|
3D Chip Mania Grows but Mass Adoption Lags |
|
|
 |
|
3D TSV chips are considered a "game changer" in the market, but mass production is still a moving target. However, a team of IBM and Swiss researchers will shortly roll out a test chip that could accelerate the shift to "true" 3D devices in the market. The group is devising a 3D stack that nearly parallels the density of a human brain. |
|
|
|
|
Top Five Design and Manufacturing Challenges at 20nm |
|
|
 |
|
The hottest topic in the leading-edge silicon foundry world centers around the shift from planar transistors to finFETs at 14nm. But the industry is getting ahead of itself, as experts warn there are still enormous IC design and manufacturing challenges at the 20nm process node. Experts list five of the bigger challenges - or trends - in the arena. |
|
|
|
|
AKT-PECVD Supports IGZO Display Transistors |
|
|
Applied's AKT Display Business Group is supporting a silicon-dioxide dielectric solution which is key to faster displays based on IGZO backplane transistors. "Companies have their roadmaps to make IZGO as cheap as amorphous silicon," PECVD marketing manager Doug Hayden said. |
|
|
|
Chip Makers Mull Plans to Insert DSA at 14nm |
|
|
 |
|
Faced with the dreaded multi-patterning era and delays with EUV, chip makers are taking a harder look at a technology that could save the day for the industry: directed self-assembly (DSA). In fact, several IC vendors are mulling plans to implement DSA at the 14nm node or so — an insertion point that is far sooner than previously thought, according to one DSA materials supplier. |
|
|
|
|
IBM Staying on SOI Technology for 14nm FinFETs |
|
|
IBM will continue to use SOI technology as it moves to finFETs at the 14 nm node, said IBM vice president Gary Patton. The Fishkill Alliance will pursue bulk finFETs at the 14nm node, but IBM sees advantages to SOI for its server processors and the Asics it makes for its external customers, Patton said. |
|
|
|
IBM, GlobalFoundries, Samsung Tip finFETs at 14nm |
|
|
 |
|
IBM's technology alliance members, IBM, GlobalFoundries and Samsung, have tipped their process roadmaps following the 20nm node, saying that they will move to finFET technology at 14nm. The firms also attempted to ease the angst among potential customers in terms of moving from conventional planar transistors to complex finFET structures. |
|
|
|
|
Common Platform Partners Readying EUV Center |
|
|
 |
|
An EUV Center of Competency is being constructed at the Albany Nanotech center by IBM, GlobalFoundries, Samsung, and suppliers. The building is in the final stage of construction now and R&D operations will begin in the second half of this year, said IBM vice president Gary Patton, speaking at the Common Platform technology event. TSVs, optical interconnect, silicon nanowires, and CNTs all will be needed to advance CMOS scaling, Patton said in a keynote speech. |
|
|
|
|
ST-Ericsson Adopts FD-SOI for Mobile Products |
|
|
 |
|
ST-Ericsson will use FD-SOI technology for its NovaThor mobile chipsets and others. ST-E has worked with Soitec, STMicroelectronics, and Leti to develop the technology. Fully depleted silicon on insulator technology rivals vertical transistors in terms of power and performance, while requiring fewer manufacturing steps than planar bulk CMOS processes. |
|
|
|
|
TEL to Buy NEXX Systems for $206 Million |
|
|
Tokyo Electron Ltd. (TEL) has reached a definitive agreement to acquire U.S.-based NEXX Systems Inc. for $206 million. The acquisition of NEXX will expand TEL's position in advanced 3D packaging tool technology. NEXX sells electrochemical deposition (ECD) and physical vapor deposition (PVD) systems for 3D TSV and related applications. |
|
|
|
ASML Becomes Leading Semi Equipment Vendor |
|
|
 |
|
VLSI Research said ASML became the leading semiconductor equipment vendor in 2011. Applied Materials had held the top spot since 1992. Non-lithography process tool vendors grew only 5 percent last year. Going forward, the introduction of EUV lithography could supercharge ASML's revenues. |
|
|
|
|
Vendors Aim to Jumpstart Temporary Bonding Market |
|
|
 |
|
Some blame one set of fab tool technologies — the temporary bonding and debonding systems — as one of the bottlenecks in 3D chip production. Seeking to change the landscape, TEL has entered this tool market. And another new player — Applied Materials — is reportedly readying a new tool, according to sources and analysts. |
|
|
|
|
SICAS Shuttered, WSTS Wounded by Departures |
|
|
 |
|
The SIA shut down its quarterly Semiconductor International Capacity Statistics (SICAS) report on semiconductor wafer fab capacity and utilization rates. The SIA's decision comes just days after news that Intel had dropped out of the larger WSTS. SICAS provided insight into capacity utilization trends that are "very difficult to acquire any other way," said analyst Bill McClean. |
|
|
|
|
More News & Features
|
|
