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IN THIS ISSUE — MAY 24, 2011
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The Future Of Memory |
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New materials, technology, processes and equipment mean big changes for future versions of memory,
according to speakers at the IEEE International Memory Workshop in Monterey, Calif. 3D NAND structures, now being developed by Hynix, Samsung, and Toshiba, could be ready in two years,
one expert said.
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RRAM R&D Advances Reported at MRS Meeting |
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Advances in RRAM R&D were included in over 40 papers at the spring Materials Research Society (MRS)
meeting, including oxides of Ti, Zn, and Ni as the most popular switching elements. HP appears to be still leading the pack, using either Ti or Ta oxide.
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GlobalFoundries Gives Fab 8 Progress Report |
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Construction is nearly done at the new 300-mm fab in Malta, N.Y., said GlobalFoundries
Fab 8 general manager Norm Armour. Automation systems are in place, and the first process tools will be installed in June, he said in a keynote speech at the ASMC conference.
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Experts: Intel's Tri-gate Not Easy to Match |
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Experts, including Scott Thompson at the University of Florida, Chenming Hu from the
University of California at Berkeley, and Klaus Schuegraf of Applied Materials, said Intel's tri-gate accomplishment requires complex epi and patterning steps. Intel may have
more than a five-year lead in bringing a finFET structure to market, said Thompson, who earlier worked in technology development at Intel. |
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Intel: Tri-gate Advantages "Worth the Effort" |
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Intel spent the last few years working on the manufacturing challenges required to use its tri-gate
transistor at the 22nm node. "The principal difficulty is maintaining the integrity of the fin," said Kaizad Mistry, 22nm program manager.
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Intel Going Vertical for 22nm Transistors |
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Intel said it will use a vertical tri-gate architecture on its 22nm products. Intel senior
fellow Mark Bohr said "the real advantage of going off into the third dimension is lower voltages, lower leakage." The upcoming "Ivy Bridge" line of MPUs is based on the
22nm technology. |
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AMAT to Buy Implant Leader Varian for $4.9B |
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Applied Materials plans to acquire Varian for $4.9 billion, adding the dominant company in
ion implant equipment to AMAT's Silicon Systems Group. The combined company will bring more resources to development of new transistor architectures and to opportunities in
solar, LEDs, and flat panel displays, Applied CEO Mike Splinter said. |
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Novellus Sees Order Pushouts, Record Profit |
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Novellus said two customers pushed out orders for semiconductor equipment in the face of
concerns over the Japan quake, rising oil prices, and high U.S. debt. The longer term trend remains good, said CEO Rick Hill. |
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Experts Debate Acceptance of 28nm Technology |
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At a panel discussion at the Semico Summit, executives debated how companies will use 28nm technology.
While many large companies will quickly adopt it, some panelists questioned how many "fast followers" will move to the 28nm technology.
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Wolters Introduces Gap Measurement for Double-Side Wafer Polishing
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Novellus subsidiary Peter Wolters introduced gap measurement technology for double-side silicon prime
wafer polishing (DSP). The advances are incorporated in the company's AC2000-P³ system.
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IEDM to Emphasize Nanodevices, C-D Interactions |
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The 2011 IEDM issued its call for papers, and said the meeting – planned for Dec. 5-7 in Washington,
D.C. - will put additional emphasis on circuit-device interactions and emerging devices.
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More News Stories
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RF Substrate Technologies for Mobile Communications |
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Two Soitec Group managers - Eric Desbonnets and Stéphane Laurent - describe how SOI wafers support
RF technology development.
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Executives at Semico Summit See Challenges |
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Executives from GlobalFoundries, Microchip, STMicroelectronics, Freescale, Intel, Altera, MIPS,
Xilinx, MoSys, and Mentor offered their opinions on the future challenges facing the semiconductor industry, at the Semico Summit, held in early May in Phoenix.
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More White Papers
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Editor’s View
Switching to Solar
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Bob Johnstone has written a book detailing how Germany's success at promoting solar energy could be adopted elsewhere.…
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Siliconisms
Intel 22nm finFET processing
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Intel's 22nm finFET process plans can be gleaned from past IEDM presentations, and Applied Materials' buying Varian's im…
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ImPatterning
Patterned LED Substrates
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Patterning is going to be part of the ultimate LED solution, but the details are anyone's guess.…
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Riding the Silicon Rapids
Waiting for Porous Low-k
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Increased leakage and dielectric constant increase due to plasma damage and post-etch cleaning remain challenging.…
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Viewpoints: SEMI
3D-IC, LED and 450 mm Update
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The SEMI International Standards Program brings together industry experts to exchange ideas and work towards developing…
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Litho Guru
Still Room at the Bottom
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Scaling down doesn't behave like scaling up.…
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ASN's All Things SOI
FD-SOI: The Right Choice
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For next-gen low-power, high-performance mobile apps, planar FD-SOI comes in cheaper, lower power, and far easier to des…
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Semico Spin
The Economics of Innovation ...Daunting
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The convergence of mobility, communication and computing has produced multifunctional end applications that are placing…
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Mentor Musings
EDA's Dr. Jekyll and Mr. Hyde
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The need for tool Integration and the reality of competition create a Jekyll and Hyde dichotomy for the EDA industry…
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