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Design Archive

Picosun and Hitachi MECRALD Process

ALD fab films at lower temperatures.

SiPs Simplify Wireless IoT Design

System-in-package solutions, running a proven software stack, are easing wireless design for Internet of Things end node applications.

Photonics in Silicon R&D Toward Tb/s

COSMICC Project and AIM Program developments

2D Materials May Be Brittle

Molybdenum-diselenide brittle, borophene not

Multibeam Patents Direct Deposition & Direct Etch

E-beams directed by design to form and repair device structures.

Air-Gaps for FinFETs Shown at IEDM

Researchers from IBM and Globalfoundries will report on the first use of “air-gaps” as part of the dielectric insulation around active gates of “10nm-node” finFETs at the upcoming International Electron Devices Meeting (IEDM) of the IEEE.

Elusive Analog Fault Simulation Finally Grasped

The test time per logic gate in ICs has greatly decreased in the last 20 years, thanks to scan-based design-for-test (DFT), automatic test pattern generation (ATPG) tools, and scan compression.

3D-NAND Deposition and Etch Integration

Lam talks about process control and default roadmaps.

Fab Facilities Data and Defectivity

In-the-know attendees at SEMICON West at a Thursday morning working breakfast heard from executives representing the world’s leading memory fabs discuss manufacturing challenges at the 4th annual Entegris Yield Forum.

CMOS-Photonics Technology Challenges

imec and Mentor detail painstaking progress.