Figure 1. Annual Growth Rates for Semiconductor Revenues, Units and Wafers

Over the past five years the U.S. economy suffered the worst economic downturn since the Great Depression, and most European economies continue to struggle. Semiconductor revenues have declined three out of the past five years. It started at the end of 2008 with the U.S. financial market meltdown. But in 2010, the industry experienced its best year since 2000.

Why the big swing? The answer is that in 2009 most companies followed the doomsday forecasters and cut inventories to the bone. Unemployment reached a peak of 10.2% and the outlook appeared bleak for consumer spending on electronics.

That all changed in 2010 when cell phone sales roared back to life, increasing more than 22%. Smart phones grew 38%. It became clear that the cell phone was not a luxury item but a necessity for anyone looking for a job. Even among those who had jobs, many people switched carriers to get better deals, which meant getting a new phone. The result was that semiconductor sales rose more than 32% in 2010.

Over the next two years, Semico forecasts a return to historical growth rates. From 2001-2012, semiconductor revenues grew at an 8.0% CAGR. Units grew 7.2% CAGR and wafer demand grew 9.6%. In 2013, wafer demand will grow by 9.9%, slightly above the 10-year CAGR of 9.6%. Total wafer demand will return to historical average, but the product and technology shifts will change significantly.

Most of the investment dollars will be directed at the development of advanced technologies such as 20nm, 14/16nm and the adoption of finFET technology. But there also will be continued demand for mature wafer processing. Productivity improvements and new process techniques will offer significant payback for manufacturers in the mature technology product markets. Expanding smart phone and tablet sales will continue to drive semiconductor unit demand, but the groundwork will be laid for the Internet of Things and big data. As we’ve seen in the past five years, there will continue to be subtle shifts in the type of manufacturing processes and wafers utilized making the Internet of Things economically possible.

For more information on Semico’s Wafer Demand Model, contact Rick Vogelei at rickv@semico.com.

—Joanne Itow is managing director of manufacturing at Semico Research.

The northeast coast of Japan is a prime example. In March 2011, the region suffered a massive 9.0 magnitude earthquake and tsunami that killed 15,883 people, injured more than 6,000, and left almost 2,700 still missing. The disaster also caused seven meltdowns at the Fukushima Daiichi nuclear power plant. The plant still is running on makeshift equipment and recently suffered a power outage that left four fuel storage pools without cooling water. In terms of damage to buildings, almost 130,000 buildings were completely leveled, and more than 1 million others sustained some sort of damage. The amount of devastation was astounding, but the Japanese have done an amazing job of clearing away debris and recovering in the two years since, as illustrated by these photos posted at the Atlantic.

The “Ring of Fire” is an area of high seismic activity that extends from southeast of Australia north along the Pacific coast of Asia, crosses south of Alaska, and then continues south along the Pacific coast of North, Central and South America. According to Wikipedia, 90% of the world’s earthquakes occur along the “Ring of Fire.” Another 5% to 6% of the world’s earthquakes occur along the Alpide Belt, which starts along the west coast of Indonesia, continues across the Himalayas, through the Mediterranean, and out into the Atlantic.

Figure: Ring of Fire Map

Source: USGS.gov

Semico Research considers fabs in Japan, Taiwan, and the west coast of the United States to be in the high-risk areas for earthquake activity. Thirty-nine percent of all fabs are in these high-risk areas, with another 22% in moderate-risk locations. In terms of capacity, 31% is in the high-risk areas, with another 36% in moderate-risk areas.

Recent quakes in Taiwan include a 6.5-magnitude temblor on March 4 that damaged some quartz furnace tubes and affected several thousand wafers. On March 27, a 6.1-magnitude earthquake shook buildings and caused damage to several DRAM manufacturers in Taiwan. TSMC briefly evacuated two fabs, one in Hsinchu and the other in Taichung. Operations were not affected at TSMC or UMC. According to the head of Taiwan’s Seismology Center, this quake (along with two past quakes) may indicate the presence of a “blind” fault, or one as yet undetected. The fault could be more than 100km long, capable of producing a 7.0-magnitude or higher earthquake, and the potential for significant damage. Taiwan is a key manufacturing center for the semiconductor industry, with two large foundries and most of their manufacturing capacity located on the island.

So far, the benefits of location in terms of convenience and labor costs have outweighed the risks of being in the danger zone for earthquakes and tsunamis. Semiconductor fab building techniques help minimize risk of damage from earthquakes. But it still makes sense to try to diversify manufacturing locations, and the supply chain as well, to minimize risk. For example, Intel has done an admirable job of spreading its fabs around the world, although its main R&D centers are on the west coast of the United States. Intel has fabs in Arizona and New Mexico, which are not prone to natural disasters of any kind. Its fabs in Ireland and Israel are also stable locations. The Dalian, China, fab is located on a peninsula that would be more at risk of flooding from typhoons or tsunamis.

—Adrienne Downey is director of technology research manufacturing at Semico Research.

Over the past five years FPGA revenues have grown at a compound annual growth rate (CAGR) of 6.4%. Although revenues took a dive in 2009 during the U.S. financial recession, revenues more than recovered in 2010. In 2012, total FPGA revenues dropped to $3.7 billion, down from $3.8 billion in 2011. Things should improve this year as Semico expects FPGA revenues to increase 5.5%. Over the next five years FPGA/PLD revenues are expected to grow by over 9% CAGR.

Figure 1: FPGA Revenues and Units

What is driving this growth? FPGA units grew 14.8% in 2012 over 2011 and are expected to grow 7.0% in 2013. Over the next five years, FPGA units will increase 3.6% CAGR. Most of that growth will be in FPGA products with greater than one million gates. Although average selling prices (ASPs) are expected to be flat to slightly down this year, the growth in high-performance products in the future will help maintain and even increase ASPs in the future. In addition, FPGA manufacturers are improving the performance of FPGAs and are integrating IP cores into their designs, making them more like programmable SoCs.

High-end FPGAs are used in applications such as cellular infrastructure, network equipment, OTN (Optical Transport Network), high-performance computing, satellite, aerospace, radar and military. The figure below presents data from the Semico MAP Model for one of the FPGA end markets, cellular infrastructure. It includes wafer demand by technology node for FPGAs used in cellular infrastructure, i.e. base stations. Although the volumes are not high, it does show that FPGA wafer demand transitions quickly to the most advanced manufacturing technology. In addition, with Intel’s advanced technology foundry offerings, Semico believes the transitions to new technologies will occur even faster than in the past.

For more details on the FPGA market, players and end use applications, contact Rick Vogelei at rickv@semico.com.

Figure 2. Wafer Demand for FPGAs in Cellular Infrastructure

—Joanne Itow is managing director of manufacturing at Semico Research.

Figure 1. Foundry Wafers as a Percent of Total, IC’s, and IC’s Minus Memory

Source: Semico Research Wafer Demand Model

When discretes and memory products are subtracted from the total, the impact of the foundry business model increases to more than 40%. For the top foundries, the big revenue generators come from the high-volume advanced technologies. Foundries are making a much bigger dent in the advanced technology arena. In 2012, more than 70% of the total advanced technology logic wafers were run at foundries.

Figure 2. Foundry Wafers as a Percent of Total Advanced Logic Wafers

Source: Semico Research Wafer Demand Model

TSMC, GlobalFoundries, Samsung and UMC are the main providers of manufacturing capacity for products that require advanced process technologies. The benefits of going fabless or fab-lite became very clear for semiconductor manufacturers prior to the transition to the 45/40nm process technology. Texas Instruments made the switch for its designs at the 45/40nm node. AMD sold off its fabs before ramping up its 32nm process technology.

Supplying leading-edge technology can reap big benefits, but it is adds high risk. It is costly to develop advanced technology and build the fabs. TSMC still reigns as the leading foundry supplier and outranks its closest competitor by almost 4X revenues. The big foundries all are targeting customers in need of large volumes and cutting-edge technologies. So how do the other foundries compete when market share is weighted so heavily in favor of one supplier and the risks continue to rise?

GlobalFoundries is rolling out technology as quickly as it can. Admittedly, the company stumbled a bit with its 32nm HKMG, but it’s once again on a very aggressive roadmap to be the first to deliver a low-power FinFET option. Its 14nm-XM process is on the roadmap for Q1 2014 risk production. The Common Platform continues to deliver. Samsung has successfully taken the jointly developed Common Platform technology to produce two generations of foundry products for its highly recognized mobile customer. However, there are risks to being so highly visible. That customer is also highly sought after and others want to take that business away. How is that done? Deliver technology options earlier, provide better service, offer lower prices, or all of the above.

Intel is entering the foundry space as quietly as it can. As the largest semiconductor company with the most advanced fabs, it’s debatable whether Intel really can do anything quietly? With just a few foundry customers, the company is delivering products using its 22nm FinFET technology. Many speculated that Achronix would tape out its Speedster22i product at the end of 2011, at the same time as Intel, and then move to production in 2012. The company is one year behind that schedule, but it still holds the distinction of being the first fabless company with working silicon utilizing FinFET technology—and the first at 22nm. But is that enough to be successful?

Intel’s foundry customers jumped from the TSMC track and took the risk of skipping directly to a 22nm FInFET technology. TSMC’s early success was built on a few fabless customers who made it big in their niches. For now, Intel appears to be selectively picking customers and is willing to provide custom foundry solutions to fit the customer’s needs. Intel has the luxury of concentrating on a few small volume customers since it can use its own products to test the technology and fill its fabs.

At the most advanced technologies, there are numerous factors necessary to be successful. Samsung and Intel can offer a fully integrated foundry solution from design to fully packaged product. That’s pretty enticing when advanced packaging is so critical for an optimized solution. One thing is for sure—the Common Platform and GlobalFoundries seem to have the biggest ecosystem of anyone out there. If you can’t find what you need through one of GlobalFoundries’ partners, it’s probably not available.

But the bottom line is that for a foundry to be successful at the most advanced nodes it has to have successful foundry customers. That’s as true for Intel as it is for Samsung, and for TSMC, GlobalFoundries and UMC. Samsung won big with Apple, but how many companies like Apple are out there? Even Apple may not measure up to its past achievements in the future. And at each successive process node, as costs, complexity and risks increase, the unanswered question is which foundries will have enough successful customers to continue down this path.

—Joanne Itow is managing director of manufacturing at Semico Research.

One of Semico’s jobs is to not only assess the impact of the major trends but to identify the subtle shifts that signal industry change. The chart below shows the percent of semiconductor sales to the Americas, Europe, Japan and Asia Pacific by quarter over the past 20 years.

Figure: Percent of Semiconductor Sales by Geographic Region

Source: SIA/WSTS and Semico Research Corp.

At the beginning of 1990, Japan was the largest consumer of semiconductor devices, but by the third quarter, semiconductor sales to Japan as a percent of the world started to decline. By the second quarter of 1992, the Americas regained the reign as the largest consuming geographic region in the world. The Americas consumed 32% to 35% of the world’s semiconductors between the second quarter of 1992 to the second quarter of 2001. In the second half of 2000, semiconductor shipments to the United States as a percent of the total began to fall as Asia Pacific dramatically increased their consumption. Not surprisingly, Asia Pacific has continued to steadily consume more semiconductor devices as a percent of the total. By the second half of 2012, Asia Pacific was consuming approximately 58% of the world’s semiconductor devices as production of our electronic systems steadily moved to that region.

All this data confirms what many of us expected as China’s market share continues to grow. But there is one trend that is somewhat surprising. Since the third quarter of 2008, the Americas’ market share of semiconductor consumption has steadily increased from a low of 14% to its current peak of 20% in the fourth quarter of 2012. In other words, the Americas region is gaining at the expense of Japan and Europe. As of fourth quarter 2012, Japan consumes only 12.8% and Europe 10.7% of the world’s semiconductors.

It is interesting to note that in the first quarter of 2012 alone, semiconductor sales to the Americas grew by 2.1% while Japan and Asia Pacific experienced a decline of 6.8% and 4.9%, respectively.

The resurgence in semiconductor consumption in the Americas can be attributed to the resurgence in manufacturing in the following segments: automotive, high-end servers, industrial equipment and communication infrastructure. While many are lamenting the exodus of manufacturing jobs to Asia, the Americas, including the U.S. and Brazil, are holding their own in growing electronics markets.

Semico also looked at the quarterly seasonal cycles to see if there were any surprises. For more on that, contact Rick Vogelei (RickV@semico.com) for a copy of the Semico IPI Report.

—Jim Feldhan is the president of Semico Research.

With all this advanced technology surrounding us, its no wonder that we’re moving back to the basics…of a sort. Self-improvement is the next driving force behind innovation. We’re already seeing some quite popular products hitting the market. Many of these new self-improvement products are really just new display options for infographics, enabling us to personalize our obsession with data.

Of course, the new fitness craze isn’t just for people looking to improve their health. We’re gravitating toward fitness products so we can understand our bodies and how the environment affects us. There are a million and one questions that data mining our every day lives can answer—and they all have an impact on semiconductors and semiconductor manufacturing.

• Why did that athlete lose their last tennis match?
• Why did one swimmer come in third instead of first? What did the guy in first place do differently?
• How do the different types of foods we eat affect our weight gain or loss?
• What are my best fitness records and what do I need to do to beat them? What are my friend’s?

It is said the millennials are all about “me, me, me,” and this fitness craze certainly lends credence to that idea. But, as a society, there are also many health concerns around our current population, and how that population is going to grow between now and 2030. In addition, with the current recession and stagnant economies, the health industry is looking to cut costs and focus on preventive measures.

So maybe it’s not just a fitness craze after all. Semico believes the portable healthcare and “Aging in Place” industries are going to experience huge growth, and be the focal point for another shift in how consumers interact with their environment and technology. The following are a few statistics about why this market is going to be so important.

• About of 11% of the world population is over 60 years, and that percentage is expected to increase to 14% by 2020. That percentage will be closer to 30% in many industrialized nations.
• According to the World Health Organization (WHO), the United States will have 65 million more obese people by 2030. And according to the U.S. Institute of Medicine, today’s annual cost of obesity-related illnesses is over $190 billion.
• 35.7% of adults were obese in 2010 according to the U.S. Center for Disease Control.
• University of Tennessee says the average adult takes 5,117 steps per day, half of the U.S. Surgeon General’s recommendation.
• Americans spend $2.8 trillion a year on health care, according to the Center for Medicare and Medicaid Services. The Center estimates that $765 billion a year is wasted in some form or another.
• Almost 70 million Americans are inactive.
• About 80% of the worldwide healthcare spending is on chronic disease management, with 860 million patients.

This is one of the largest target markets available, because it includes us all, all age types, cultures, and regions. And it not only requires a focus on the portable fitness side, but also on medical infrastructure, education, monitoring, and equipment. This means electronics to store medical records; electronics for more accurate surgeries; fitness tracking and health monitoring.

All of these involve semiconductors, and many of these chips will require process technologies and techniques that range from older and proven techniques at older nodes to double patterning, finFETs and ultimately 3D stacking. If you wonder what will drive future advances in semiconductor design and manufacturing, you may not have to look any further than the person next to you.

—Michell Prunty is a senior consumer analyst for end markets at Semico Research.

One of the reasons why these new applications are possible is the lower cost to integrate MEMS functions into consumer, medical and communication devices. The MEMS Technology Showcase on Thursday morning featured six companies with products ranging from fitness monitoring devices to a robotic ball and an illuminated graphic skateboard. MEMS devices are enabling both fun and practical new applications. But MEMS companies are facing the growing pains associated with a technology caught in the transition to volume breakthrough. How to maintain ROI with declining ASPs is a question being asked more and more often today.

Tony Massimini, Semico’s chief of technology, was on the MEMS Market Panel and was asked, “What does the industry need to do to address the issue of falling ASPs?” As an industry veteran, Massimini pointed out the two ways the semiconductor industry traditionally responds to this trend. First, they can add functionality or enhance performance to add value and maintain pricing levels. Second, they can accept the lower market prices and maintain ROI by reducing manufacturing costs. Of course, these options are not mutually exclusive. Most companies are working both angles to keep up.

To provide increased functionality and improved performance, companies are turning to sensor fusion. Integrating two or more MEMS sensors in one device or in a single package improves performance and can lower cost, but the key ingredient to sensor fusion is the addition of software algorithms that determine what information is important and what to do with it all. Sorting through the relevant information and effectively processing the massive amount of data collected from MEMS sensors is the key to sensor fusion.

On the manufacturing front, new techniques and equipment are being developed to reduce production costs. EV Group touted their Omni Spray coating technique, which reduces resist consumption. To improve yields, inline metrology and improved edge die yield have been implemented. There are a number of improvements that can be made when it comes to wafer bonding. Manufacturers are focused on improving the accuracy and strength of wafer bond lines to reduce their size, and reducing the temperature and/or the processing time at high temperatures can result in faster throughput.
I have no doubt that these innovative developments will improve the functionality and lower the cost of MEMS products. However, not all companies will have access to these developments. Semico believes we’ll continue to see new products and new companies entering the MEMS market, but we’ll also begin to see consolidation as the most efficient move to low-cost, high-volume production.

—Joanne Itow is managing director of manufacturing at Semico Research.

The wafer demand pie keeps getting bigger but all the pieces are not growing at the same rate. The pie looks a lot different than it did 15 years ago or even 10 years ago. Figure 1 (below) presents a few of the product categories that have traditionally utilized the most advanced technologies.

Fig. 1: Wafer Demand by Product as a Percentage of the Total Wafer Demand

Source: Semico Wafer Demand Model Sept. 2012

Wafer demand for microprocessors has grown 65% over the past 10 years, but as a percentage of the total MPU remains at less than 3% of the total industry wafers. To a certain extent, this is due to the production efficiencies and improved designs that the MPU manufacturers have implemented.

Not surprisingly, wafers needed for wireless communication products have grown almost 10X over the past 10 years. Cranking out a billion cell phones a year has been good business for communication wafer demand. On the other hand, DSP wafers are one of the casualties of the advanced technology products, as product designs have integrated the cell phone function into SoCs reported in the communication wafer category. DSP wafer demand continues to grow but now represents only 1% of total wafer demand.

The most significant change over the past 10 years is the growth of NAND wafer demand. NAND wasn’t even reported as a discrete category by the SIA in 2000. In 2005, all NAND products only required 4.4% of total production wafers. Between 2005 and 2010, NAND wafer demand grew more than 360%. Since then NAND manufacturers have turned to MLC (multi-level cell) technology to improve memory density. But even with the implementation of 2- and 3-bits per cell, NAND wafer demand has grown from only 4.4% of total wafer demand in 2005 to almost 18% in 2012. Continued growth in cell phones, tablets and SSDs for PCs is pushing the need for more and more production capacity for NAND products. NAND, which offers lower power and higher speed for cloud applications, also is making strong inroads in the enterprise space to support all the services used by mobile products.

In summary, what is implied from the data above is that mobile devices will drive semiconductor wafer demand for years to come. In addition to increased wafer demand from the growing need for baseband and application processors in cell phones, wireless products are consuming significantly more NAND per system as time progresses. And finally, as mobile users transfer more applications to the cloud for remote functionality, NAND memory will continue to grow as it becomes the memory of choice in server applications due to its power-saving capability and faster access speed.

For more information on Semico’s Wafer Demand Model and the complete data set, contact Rick Vogelei at rickv@semico.com.

—Joanne Itow is the managing director of manufacturing at Semico Research.

That’s the overall view. When the data is broken out into more detail, some product categories are experiencing a better year than others. Let’s go through a few of the winners and losers.

Unit Growth Rates for Semiconductor Revenue, Unit and Wafer Demand

Source: Semico Research Corp. Wafer Demand Model Sept. 2012.

Total MOS Logic is a mixed bag of products. Overall, the category will experience a 2.6% decline in units in 2012. But this category also includes products that will exhibit the highs and lows of the industry. Units for Wireless Communication-Cellular are expected to increase by 31.5%. Wafer demand will increase by 28.8% in 2012. That’s higher than the 10-year CAGR but not as high as the growth we’ve seen in this category over the past 5 years. The 5-year unit CAGR is 39.5% and the 5-year wafer demand CAGR is 44.1%.

MOS logic also includes Standard Cell products. This category is the biggest loser of 2012 and will experience a 25.4% decline in units in 2012. Wafer demand will see an even more severe decline of 34.3% this year.

Another product in the MOS Logic category is automotive. This product group will recover in 2012 with a 23.9% growth in units. That is much higher than the average growth over the past five years. It’s also higher than the 10-year CAGR of 11.7%.
 
Unit Growth Rates for MOS Logic Winners & Losers

Source: Semico Research Corp. Wafer Demand Model Sept. 2012

With some product categories reaching record high unit sales and others shrinking, what does all this mean? Wafer demand is not growing as fast as unit demand, indicating that production efficiencies continue to improve. Several high-growth product categories such as sensors and image sensors are moving to larger-size wafers to improve productivity. But if semiconductor revenues continue to grow at a slower rate than units and wafer demand, the industry will continue to remain under pressure to reduce manufacturing costs.

For more information on all the industry winners and losers or for the complete Semico Wafer Demand data, contact Rick Vogelei at rickv@semico.com.

—Joanne Itow is managing director of manufacturing at Semico Research.

In 2002, Chen Ming Hu* spoke at the Semico Summit. The title of his presentation was “The Future of Semiconductor Scaling.” In 2002, Hu pointed out that TSMC already had fabricated 35nm CMOS FinFET transistors on TSMC production tools and expected the technology to be scalable to 9nm. Ten years has elapsed and Intel is the first to run 22nm Ivy Bridge products using tri-gate technology. From a technical perspective, FinFETs are now proven to be executable in volume production. But how should we look at this from a market perspective?

When will the foundries be ready to ramp FinFET technology in volume production? And more importantly, when will foundry customers realistically be ready to fully utilize the technology? Until recently, the most advanced dedicated foundries were planning to introduce FinFETs on their 14nm technology. It appears that schedule has been accelerated. TSMC is talking about a 16nm transition node with FinFETs. GlobalFoundries just announced the development of ARM low-power processor designs for 20nm and finFET process technologies targeting SoCs including graphics processors. This doesn’t commit GlobalFoundries to finFETs at 20nm, but it does offer some options.

Semiconductor units continue to grow, and wafer demand increases right along with it. Any new technology that enables improved or new electronic applications should be implemented. Unfortunately, it’s not that easy. New consumer markets are cost-sensitive. The introduction of innovative technologies must take into consideration market competition, cost to volume, and opportune applications.

The following graph presents wafer demand assuming finFET adoption at 20nm versus 14nm. Although this graph depicts an “all-or-nothing” scenario, if finFETs are adopted by the industry at 22nm/20nm it could mean a significant difference in the total wafers used to produce finFET products.

The following graph adds in a line comparing finFET adoption with the adoption of HKMG. Intel was also the first to implement HKMG at the 45nm node. GlobalFoundries and Samsung introduced HKMG at 32nm. TSMC began ramping HKMG with its 28nm production in 2011, almost four years after Intel.

The smartphone and tablet markets continue to grow and the ultra-mobile PC market is beginning to take off. When the foundries transition to 20nm, the capacity ramp will have to be much larger than the ramp for HKMG at 32nm/28nm. Filling those market needs will be challenging. When 28nm was introduced at TSMC, customers could opt for a poly/SiOn gate stack versus the HKMG. That had a dampening effect on the volumes of HKMG wafers during the early ramp of 28nm. As companies begin to roll out 20nm products, once again there are a few options. Some companies may switch to finFETs. TSMC plans to stick with a bulk planar structure. As an alternative to bulk planar, there is also a fully depleted SOI option. Whether finFETs are introduced at 20nm, 16nm or 14nm, Semico believes their ramp will prove to be another test of the foundry model.

For additional data on wafer demand by product by technology, please visit Semico’s website for a current list of manufacturing studies.

*Chen Ming Hu is currently Distinguished Professor of Microelectronics at the University of California, Berkeley. At the time of his presentation at the Semico Summit in 2002, he was the Chief Technology Officer for TSMC.

—Joanne Itow is managing director of manufacturing at Semico Research.