Litho Signoff Options
By Joe Kwan
The DFM requirements at advanced process nodes pose new challenges to design teams that call for new technical and business approaches. For good yield, and to achieve a fast yield ramp, design rule checking (DRC) is not enough when working at advanced process nodes. Most foundries now require designers to perform lithography checking and litho hotspot fixing before tapeout. Designers now have more choices in how to do this: they can purchase software licenses to run litho simulation or hire services to perform litho checking for them, or both.
But let’s back up and talk about what’s changed with DRC and DFM over the past few years. When designing in process nodes at 90nm or earlier, getting a design to tape-out meant making sure your design met all design constraints (performance, area, power, etc.) and was DRC-clean. While this can be a challenge, it’s nothing compared to what designers face starting at 40nm, 28nm, and below.
At these nodes, DRC-clean is no longer sufficient to guarantee good yield. Even designs that pass rule-based DRC can still have yield detracting issues—issues that lead to parametric performance variability and even functional failure. At the root of the problem is the fact that those nice rectilinear shapes on your drawn layout (whether drawn manually or created with automatic P&R tools) do not print to silicon exactly as they’ve been drawn. Depending on your layout patterns and their nearby structures, the actual geometries on silicon may exhibit pinching (open), bridging (short) or line-end pull-back (see Figure 1).
Figure 1. SEM images of pinching and bridging. LPC finds these problems and lets you fix them before tapeout. Litho checking is mandatory at TSMC for 40nm, 28nm and 20nm process nodes.
These problems can no longer be fully fixed by applying OPC on the manufacturing side. This is why major foundries now require IC designers to perform litho simulation and to fix all Level 1 hotspots in the design stage before tapeout. TSMC’s terminology for this is Litho Process Check, LPC.
The traditional way to do this is to purchase software licenses and run litho checking in-house. This approach has the familiar and obvious benefits of software ownership. Designers have full control over when and how frequently they run the checks. The design database doesn’t leave the company’s network. There is a tight loop between updating the design database and re-running verification.
But what if a design house has not yet set up their own LPC checking flow and need time to plan or budget for software and CPU resources? Or what if a company only has a few tapeouts a year? These users can benefit from the flexibility and convenience of outsourcing the LPC check. These are a few of the situations that led Mentor to offer DFM Analysis Services to perform the TSMC-required signoff LPC.
DFM Analysis Services offers an alternative option to software purchase by performing litho checking for the customer. The customer delivers the encrypted design database to a secure electronic drop box. Mentor Graphics then runs TSMC-certified signoff Calibre LFD in Mentor’s secure data center in Oregon. The DFM Service can also be useful to customers who already have Calibre LFD licenses but find themselves in a situation where their computing resources are fully utilized.
Irrespective of whether a customer uses DFM Services or runs LPC in-house on purchased software, designers should run litho checking early and often to identify problematic structures early and allow more time to make the necessary fixes. Identifying weak layout structures early also allows design learning to feed back into improving the design flow. This will help to improve design robustness and avoid any last minute surprises or re-spins.
—Joe Kwan is the product marketing manager for Calibre LFD and DFM Services at Mentor Graphics.
Tags: DRC, lithography signoff, Mentor Graphics