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Archive for March, 2015

New Approaches to Small Problems

Friday, March 20th, 2015

The market expectations of modern electronics technology are changing the landscape in terms of performance and, in particular, power consumption, and new innovations are putting unprecedented demands on semiconductor devices. Internet of Things devices, for example, largely depend on a range of different sensors, and will require new architectures to handle the unprecedented levels of data and operations running through their slight form factors.

The continued shrinkage of semiconductor dimensions and the matching decreases in microchip size have corresponded to the principles of Moore’s Law with an uncanny reliability since the idea’s coining in 1965. However, the curtain is now closing on the era of predictable / conventional size reduction due to physical and material limitations.

Thus, in order to continue to deliver increased performance at lower costs and with a smaller footprint, different approaches are being explored. Companies can already combine multiple functions on a single chip–memory and logic devices, for example–or an Internet of Things device running multiple types of sensor through a single chip.

We have always known that we’d reach a point where conventional shrinking of semiconductor dimensions would begin to lose its effect, but now we are starting to tackle it head on. A leading U.S. semiconductor manufacturer got the ball rolling with their FinFET (or tri–gate) design in 2012 with its 3D transistors allowing designs that minimize current leakage; other companies look set to bring their own 3D chips to market.

At the same time, there’s a great deal of experimentation with a range of other approaches to semiconductor redesign. Memory device manufacturers, for instance, are looking to stack memory cells vertically on top of each other in order to make the most of a microchip’s limited space. Others, meanwhile, are examining the materials in the hope of using new, more efficient silicon–like materials in their chips.

Regardless of the approach taken, however, this step change in microchip creation means new material demands from chip makers and new manufacturing techniques to go with them.

The semiconductor industry has traditionally had to add new materials and process techniques to enhance the performance of the basic silicon building blocks with tungsten plugs, copper wiring / CMP, high–k metal gates, for example. Now, however, it is beginning to become impossible to extend conventional materials to meet the performance requirements. Germanium is already added to Si to introduce strain, but its high electron mobility means Germanium is also likely to become the material of the Fin itself and will be complemented by a corresponding Fin made of III–V material, in effect integrating three semiconductor materials into a single device.

Further innovation is required in the areas of lithography and etch. This is due to the delay in production suitability of the EUV lithography system proposed to print the very fine structures required for future technology nodes. Complex multi–patterning schemes using conventional lithography are already underway to compensate for this technology delay, requiring the use of carbon hard masks and the introduction of gases such as acetylene, propylene and carbonyl sulphide to the semiconductor fab. Printing the features is only half of the challenge; the structures also need to be etched. The introduction of new materials always presents some etch challenges as all materials etch at slightly different rates and the move to 3D structures, where very deep and narrow features need to be defined through a stack of different materials, will be a particularly difficult challenge to meet.

The microchip industry has continuously evolved to deliver amazing technological advances, but we are now seeing the start of a revolution in microchip design and manufacturing. The revolution will be slow but steady. Such is the pattern of the microchip industry, but it will need a succession of new materials at the ready, and, at Linde, we’re prepared to make sure the innovators have everything they need.

This blog post was contributed by Greg Shuttleworth, Global Product Manager at Linde Electronics. For more information, contact Francesca Brava:

The Greening of Semiconductors

Tuesday, March 3rd, 2015

There is an increasing demand for and focus on sustainable manufacturing that will contribute to a greening of semiconductors. This greening must be robust and responsive to change and cannot constrain the individual processes or operation of a fab.

Fabs are being driven to choose materials by the needs to:

  • Create ever-higher-performance devices to stay competitive
  • Reduce the material costs in a device
  • Realize process efficiencies and achieve zero negative process interaction throughput

 What can be achieved by the greening of semiconductor materials?

  • Lower facilities use of electricity, water, and abatement chemicals
  • Lower emissions of harmful substances into the atmosphere, waste water, and solid waste streams
  • Lower overall volume of solid and liquid wastes
  • Lower consumption of materials, especially those that are costly, finite, or associated with harmful extraction

 All of the above lead to reduced costs at scale.

How are these benefits achieved?

These benefits are achieved through investments in:

  • Material supply and packaging
  • Tool, pump, abatement, and waste stream design
  • Recovery technology

 Often the economic benefits require upfront CAPEX investment by suppliers and end users to achieve later OPEX cost savings. Boundary conditions can determine who bears the cost and who realizes the benefits.

How can materials suppliers contribute to the greening of semiconductors?

Materials suppliers can do the following to reduce the environmental footprint of fabs:

  • Limit emissions and waste over a product’s lifecycle, to include material production, delivery, and return/reclamation/disposal.
  • Where possible within material selection constraints, make direct, process-compatible substitutions that have less environmental impact. An example of this is using F2 (fluorine) rather than NF3 (nitrogen trifluoride) as a cleaning gas in plasma CVD chambers.
  • Package and process for efficient use. Often, headspaces are exhausted and heels are unused to prevent light and heavy contaminants. Better purification, quality control, packaging, and material property knowledge can reduce the amount of material lost to safeguarding quality.
  • Recover material from waste streams of such gases as He (helium), Ar (argon), Xe (xenon), and H2SO4 (sulphuric acid). Reference Linde article “Sustainability through Materials Recovery” at
  • Consider the trade-offs of production location of global vs. regional vs. local vs. on-site that includes a yields matrix of benefits and costs for emissions, material cost, and supply chain stability.

 What can equipment suppliers and end users do to contribute to the greening of semiconductors?

They can:

  • Design equipment and processes for efficient use and easier recovery
  • Design pumps, abatement, and facilities to enable better abatement, lower dilution of waste, and the ability to isolate waste streams from specific recipe steps
  • Budget for material recovery in new fab construction
  • Develop strategies for recycling of valuable and toxic materials from finished products


This blog post was contributed by Paul Stockman, Commercialization Manager, Linde Electronics.

Paul Stockman

For more information, contact Francesca Brava:

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