SPIE – Day 2
I spent much of Tuesday learning about alternate lithography schemes. Toshiba gave an update on their efforts to evaluate nanoimprint lithography for chip manufacturing. The technology is closer to prime-time than I expected. Most of the data for 28 nm half-pitch looked very, very good (CDU of 1.2nm, LWR of 2nm, mix-and-match overlay of 10nm), but of course there is one big problem remaining. Mask defectivity is a factor of 100 too high. Toshiba has given themselves one year to bring defect densities down. I wish them luck.
The technology that has excited me the most this year is directed self-assembly (DSA). Several authors have presented phenomenally good 25-nm pitch line/space patterns. This stuff is cool! There are still many things to learn (and to fix) about the technology, but the potential is so great that there is no doubt the industry will aggressively pursue DSA in the next few years. The progress has been very rapid. My favorite quote is from Chris Bencher: “DSA can not be ignored.”
Many people told me there was a lot of buzz around multi-beam electron beam technology. I didn’t see any of the papers (the curse of parallel sessions), but the technology is generating interest. Not everyone is a believer in EUV.
But many people are believers. The EUV conference this year has the most papers of any conference. The bulb glows brightest just before it burns out. But more on that topic later in the week.