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GlobalFoundries Yield Rebound

Friday, March 16th, 2012

By David Lammers

Sometimes, you have to hear it from the horse’s mouth. Everyone has heard about the claims of improved 32nm yields at the GlobalFoundries Dresden fab. At the Common Platform Technology Forum, details emerged about how the GlobalFoundries team boosted  yields so dramatically.

Mike Noonen, hired away in January from NXP Semiconductors as the sales and marketing senior vice president at GlobalFoundries, started out the Common Platform event by acknowledging that in the third quarter of last year, low yields were “challenging” the volume production of AMD’s Llano processor.

Mike Noonen

“We took a variety of steps in the fab and on the management team,” Noonen said at the Santa Clara event Wednesday (March 14). “The result was that Llano yields doubled in a quarter. We are in a very, very aggressive ramp of Llano,” he told more than a thousand attendees.

Noonen said the foundry achieved an 80% increase in 32nm unit shipments from Q3 to Q4.

How did GlobalFoundries’s Dresden yields improve in such a short time?

An executive gave credit to the “great German engineers” at Dresden, with a key boost from Robert Madge, director of design-enabled manufacturing at GlobalFoundries, who was sent over to Dresden early last year to help fix the yield issues.

Rutger Wijburg, hired last August to run the Dresden campus after working at NXP’s foundry operations, brought an intense focus on yield improvements, this source said. Rather than try to accommodate a dozen new foundry products at the same time — which “sent the Dresden operation into shock, hurting everything” — Wijburg preached “Llano, Llano, Llano” to the Dresden team. “German engineering did the rest,” the executive said.

Single-wafer clean tools from Dai Nippon Screen (DNS) were used much more widely, a key factor in the yield-enhancement campaign. “Getting the particles off the wafers with single-wafer cleans was one of the main things they figured out. We also bought a bunch of brightfield inspection tools. And there were some back-end copper issues that got figured out,” he said.

With 32nm SOI yields now at very respectable levels, “AMD is happy again,” the executive said, with the relationship back on a normal customer-supplier basis. If GlobalFoundries can deliver the goods, they will keep AMD’s business, even in the face of competition from TSMC at 28nm bulk and 28nm HKMG.

AMD has its “Trinity” processor coming along this year, and the expectations are for AMD to account for about $1.5B in business for GlobalFoundries this year, up from $800 million in 2011. JoAnne Feeney, a stock analyst at Longbow Research, said AMD has been gaining market share, with a 17 percent share of the notebook processor market.

Feeney said notebook customers pay a lot of attention to battery life, and the AMD notebook processors are equivalent to what Intel-based systems deliver. Consumers don’t know or care if the processor is 32nm SOI or 22nm Tri-gate, she added, as long as the performance, graphics, and, especially, battery life are competitive.

The AMD-based thin notebooks — which Intel has branded as UltraBooks – may be significantly cheaper than the Intel-based UltraBooks, Feeney added. While Intel has outlined specific guidelines for what UltraBooks must be able to do, thereby jacking up the costs, the AMD customers have a relatively free rein and may be able to undercut the UltraBook retail prices by a couple hundred of dollars, she said.

“I am predicting that AMD will gain share this year,” Feeney said at the Common Platform event.

Another interesting point was raised by a senior marketing manager working at GlobalFoundries. While a year ago some major smartphone IC manufacturers were saying they would mainly use a non-high-k gate stack for 28nm applications processors, the advantages of  high-k are now swinging more of their product mix toward a high-k solution. The nitrided polySi gate oxide just can’t keep up in terms of power and performance with the more-complex high-k gate stack. And with mass production of 28nm parts slipping somewhat, customers are tilting toward high-k at 28nm and pushing back tapeouts of 20nm parts by three or four quarters, he added.

With several hundred thousand wafer starts of 32nm high-k/metal gate production behind it for Llano production, the company’s painful yield enhancement process will pay dividends at 28nm HKMG, he said.

Another executive at the Common Platform Forum claimed that through all of the foundry’s 2011 challenges, GlobalFoundries customers have been willing to cut the foundry some slack, largely because they don’t want to be totally dependent on TSMC and thereby vulnerable to wafer price increases as 28nm heads into mass production.

Consolidation Behind SICAS, WSTS Problems

Monday, March 5th, 2012

By David Lammers

The apparent end of the Semiconductor International Capacity Statistics (SICAS) program is not the end of the world, but it is an indication of the consolidation trend in the semiconductor manufacturing industry.

SICAS’s end was not mourned by Gartner semiconductor manufacturing analyst Bob Johnson or VLSI Research CEO Dan Hutcheson. The message from those two gentlemen: “Don’t worry, we’ve got you covered.” While SICAS was free to all (even journalists), Gartner and VLSI offer their respective data sets for a fee. And Hutcheson said his company’s fab utilization report is better than what SICAS offered, partly because VLSI’s fab utilization data comes out monthly rather than quarterly.

SICAS tracks capacity by technology node. (Source: SICAS)

SICAS, which tracks fab capacity and utilization, is a relatively small program compared with the World Semiconductor Trade Statistics (WSTS), which saw Intel drop out following AMD’s withdrawal in December. IC Insights president Bill McClean said he was trying to get the SICAS board to revise its data categories and revive the SICAS program. And McClean also was contacting his sources to see if Intel could somehow get back in and participate in a revised category within WSTS, without “exposing” its pricing data to customers. If the WSTS would merge MPUs with, say, the SoCs which are used as the application processors in cellphones, it would support the WSTS’s overall goals and allow Intel to “hide its data,” McClean said.

When AMD withdrew from WSTS in December, for reasons yet to be made clear, Intel was “exposed” by being the last participant in the MPU category at WSTS. Knowing that Intel was the only company in the category apparently allowed customers to see Intel’s average selling prices. “Intel was exposed. It is a pricing issue. Customers can look at the WSTS data and are go back to Intel and say, ‘You charged us more’ than the average,” McClean said. UMC (or TSMC) was in a similarly “exposed” position when one or the other of the big Taiwan foundries decided to drop out.

VLSI Research tracks fab utilization on a monthly basis. (Source: VLSI Research Inc)

TSMC apparently withdrew from the SICAS program because SICAS reported foundry capacity data by technology node, allowing others to see how much overall foundry capacity was available at, say, 28nm. Since TSMC discusses sales by technology node on a quarterly basis, the withdrawal had Hutcheson and Johnson theorizing that TSMC and other companies simply didn’t see the added value in dealing with SICAS.

McClean argued that fab utilization data is “the kind of thing that is useful,” noting that in the first quarter of 2009 SICAS was reporting a measly 66.8 percent utilization rate. By the third quarter, utilization had jumped to 87 percent. “That showed everybody how fast the industry was recovering,” McClean said.

Johnson said Gartner arrives at its utilization data by tracking the total silicon consumed and the total wafer capacity by node. Dividing those terms gives Gartner its utilization data. Analysts who don’t own their own utilization data, Johnson said, will have to “scramble around, because their models are based on SICAS.”

Overall, the SICAS demise is part of a larger trend. The large companies, with well-staffed sales and marketing organizations, gather their own data and want to “control the message” going out to the marketplace.

“The big companies don’t want to talk about what they are doing with the smaller companies around. We might as well get used to it. Intel knows who builds wireless devices, and there are only a few companies building smart phones who really matter. Do the big companies really need WSTS? Probably not,” Johnson said.

“With the WSTS, Intel is not controlling the message. The WSTS withdrawal by Intel is symptomatic: companies as big as Intel, Samsung, and TSMC want to control their own messaging to the market,” Johnson said.

If it were a matter of simply merging categories in the WSTS reports to hide Intel’s ASPs, or shrouding the foundry data in SICAS somewhat but keeping the bigger utilization picture intact, these kinds of fixes would be worthwhile. The SIA is studying the issue, a spokeswoman said, while emphasizing that both SICAS and WSTS are independent bodies with their own boards.

“SIA has no decision-making authority regarding SICAS and the administration of the quarterly report. However, we do help sponsor the program, encourage our members to participate, have many common members and republish the SICAS report on our website,” the SIA spokeswoman said.

Once the three companies decided not participate, the SICAS executive committee made the decision to discontinue the report because of the diminished value of the data.

“In speaking with SIA members we understand that the real value of the report is that it provided a global view, and while many of our members are open to continuing to provide this data, the return on investment for them is just not significant enough if the report does not capture a global picture of production capacity,” she added.

That statement suggests that, while the SIA and the SICAS members wish the group had not fallen apart, without data from what she called “a key region” it appears unlikely SICAS will be revived.

Jonathan Davis, president of SEMI’s Global Semiconductor Business operation, said he believes SEMI has the most comprehensive fab capacity information, but it doesn’t monitor utilization levels, as SICAS does. “SICAS reported trend data to the supply chain that was valuable,” Davis said. And while the largest equipment and materials companies may have their own research organizations which can gather and collate data from multiple sources, there are many smaller suppliers which do not have that option.

“The broader supply chain — the long tail of the supplier base — benefits (from SICAS and WSTS), and even the largest companies call us regularly to verify their own data. SICAS was not perfect, and all of these market research tools are imperfect. The data is less valuable when some companies are not participating,” Davis said.

Hutcheson of VLSI Research had an interesting take on SICAS, comparing it to government programs which compete with private businesses.  “It costs us to develop the primary (capacity and utilization) data, and with SICAS out there it made it more difficult to convince people to pay for it, even though our reports are on a monthly basis,” he said.

And Hutcheson said capacity or utilization are not the best measures of how the industry is doing, or whether a downturn is on the way. Capacity is an always-evolving number. Since foundries and others need to invest in capacity for leading-edge linewidths ahead of demand, the result can be a lower utilization number. What the IC vendors and systems companies want to know is whether a foundry or IDM has enough leading-edge capacity in place to supply chips which will be needed for future demand, Hutcheson said.

Inventory levels turn out to be a better indicator of when a downturn might be around the corner, Hutcheson added, noting that has called two earlier downturns ahead of other market research firms by watching the rising inventory levels and comparing the inventory data with billing numbers.

In 2000, for example, the industry was in a fab-building boom, but shortly thereafter inventories started scaling up. “It was inventories that gave us the signal (of the 2001 downturn). Capacity utilization was a lagging indicator,” Hutcheson said.

WSTS is a different story, he said. WSTS tracks such a wide variety of chip types — ranging from analog to discretes and power IC — that all companies benefit from the WSTS data.

“If Intel drops out of WSTS, it looks bad. Intel is a company that needs to play a leadership role,” Hutcheson said. And he recalled that the WSTS data collection effort started with Intel, National, AMD and other compies in Silicon Valley, with Texas Instruments joining a few years later. The WSTS data was used as the gold standard during the U.S.-Japan semiconductor trade negotiations in the mid-1980s, with Washington demanding that the Japanese government use WSTS data — rather than MITI or EIAJ numbers —for determining the market share of non-Japanese companies in the Japan semiconductor market.

Having spent so many years of effort to build up the completeness and credibility of the WSTS database, it would be unfortunate to see it diminished by the absences of Intel and AMD.

The larger companies gather different data sets, buying information from VLSI, Gartner, and iSuppli, and then adding in the public data from SICAS, WSTS, and other sources. Fabless IC vendors need to make sure they are ordering enough wafers.

Similarly, chip makers need to watch utilization levels and make sure they are included in the slots allocated for important tools. Hutcheson noted that in 2009 several big IC companies — aware that it takes as two years or longer for Nikon and ASML to build an immersion scanner — gobbled up all the scanner capacity. That left one of the major foundries fourth in line for scanners, which hurt its bottom line when demand bounced back.