Foundries fine without finFETs
Intel’s trumpeting of 22nm CMOS finFETs as the future-arrived-in-the-present has triggered TSMC and GlobalFoundries to say that the present is planar. The present will remain planar for commercial IC foundries for another node or so to preserve flexibility in design. Since Intel has one major IC product family, it could more easily re-tune it’s designs and manufacturing to work with finFETs.
On May 5 of this year, Dow Jones Newswires in Taiwan published an official comment on finFETs at the 22/20nm node by TSMC senior vice president of research and development S.Y. Chiang. Despite showing excellent 20nm CMOS finFET transistor performance at IEDM 2010, in terms of design, “the tools and layout for the technology are still immature at the moment,” said Chiang. “The current 2D transistor will hit its limit when the production process advances beyond 20nm and that’s when we will switch to 3D transistors.”
GlobalFoundries recently published a newsletter in which it declared that planar CMOS provides the best balance of cost, risk, and performance for 22/20nm node ICs. The company says that customers’ design requirements across diverse product types—including computing, consumer, and communications chips—led to the decision to push out finFETs until the 16/14nm node. All leading-edge IC foundries today must offer more than just fab capacity, however, so GlobalFoundries is already working on a full suite of design tools for 22/20nm.
As a partner in the Joint Development Alliance (JDA) centered around IBM, GlobalFoundries has access to over a decade of research in finFET technology and can choose to use it when it may be needed. The JDA’s collaborative decision to continue with 2D planer structures in 20nm was based on the power, performance, and cost parameters that drive the specifications for the global industry, from high performance desktop computing to low power mobile applications.