IFTLE 306 Qualcomm Acquisition of NXP?; HBM IP at Open Silicon; IEEE 3DIC Program
By Dr. Phil Garrou, Contributing Editor
Qualcomm Negotiating to Acquire NXP
Long time readers know that IFTLE has been following the consolidation in our industry for more than 8 years now based on the basic laws of economics telling us this was going to happen. [see IFTLE 241 “Simply Obeying the Laws of Economics”]
Reports from multiple financial sources indicate that NXP Semiconductors has hired an investment bank to help them deal with recent acquisition offers. Qualcomm is viewed as the likely acquirer. According to the Wall Street Journal (WSJ) the deal would be worth over $30B. [link]
Qualcomm and NXP both supply Apple. Qualcomm apparently has its eye on NXP’s position in the automotive supplier business based on its Freescale takeover in 2015. The automotive chip business will reportedly show above average future growth.
Bloomberg reports that others who could possibly jump in with bids includes Broadcom, Intel and Samsung [link].
According to the WSJ, the deal would reshape Qualcomm. While Qualcomm currently derives most of its revenue from designing and selling chips, the company earns more than half of its profits from licensing its wireless patents to nearly all makers of mobile phones.
HBM IP at Open Silicon
TSMC’s Open Innovation Platform (OIP) Forum was held Sept. 22nd at the Santa Clara Convention Center.
A recent discussion on Semiwiki [link] by Tom Simon indicated that Open Silicon discussed their IP for HBM memory stacks on 2.5D interposers at the meeting.
This topic is discussed in detail on the Open Silicon web page [link].
Open-Silicon’s subsystem IP solution comprises the HBM Controller, PHY and 2.5D interposer IO addressing interoperability and 2.5D design, test and SiP packaging challenges. The HBM IP claims to be suitable for graphics, high-performance computing, high-end networking and communication applications that require low power and small form factor.
Open-Silicon claims their HBM IP is the industry’s first solution for integrating HBM into ASICs for high performance and low power. By integrating the HBM protocol controller, PHY and IO into one sub-system IP product, interoperability aspects between the different system components are addressed. The Open-Silicon HBM IP fully complies with the HBM-Gen2 (2 Gbps per signal) JEDEC standard.
Back to the OIP presentation, Simon reports that Open-Silicon has implemented an HBM reference design in 16nm. According to Open Silicon 16 nm FinFET is the key to unlocking the full benefits of HBM since it can potentially reduce power and boost performance by 50% relative to 28 nm.
In the current design Open Silicon replaced (24) DDR3 1600 with 1 HBM stack, the power consumption went from 1.0 mW /Gbit to 0.33 mW. The data rate climbed from 4 GB/s up to 256 GB/s.
To effectively shield the 0.85 um signal lines from cross talk, ground wires of 0.5um were placed 2.1um to the side of each signal wire. This left 2.1 um for each signal line.
IEEE 3DIC Conference
The IEEE 3DIC conference, which I helped put together several years ago, is back in SF this year and will be held Nov 9 – 11th. [link]
Topics will include:
- 3DIC Processing - Design and Applications
- Thermal Analysis – Bonding
– Reliability and Stress - Power & Signal Integrity
Next week we will start our coverage of SEMICON Taiwan packaging activities. For all the latest in Advanced Packaging, stay linked to IFTLE…