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IFTLE 286 IME Forum; IMAPS DPC 2016 part 3: IMEC Assembly Challenges for 2.5/3D

By Dr. Phil Garrou, Contributing Editor

IME Forum

In late March IME held an industry forum in Singapore to discuss “High Density WLFO WLP for next gen mobile 2.5D/5G Systems” Of special interest was their process flow for PoP package constructed from a FOWLP as shown below. This is a chips last FOWLP assembly with access to the top surface by TMV (through mold vias) and subsequent formation of stacked memory as the upper PoP level.

IME

Continuing our look at the 2016 IMAPS Device Packaging Workshop

IMEC – Assembly and Packaging Challenges for 2.5/3D

IMEC addressed assembly and packaging challenges for 2.5/3D. One the main changes we will see moving from 50um to 10um micro bump pitch will be the move from solder ball reflow to thermo-compression bonding.

imec 1

This will require the use of pre applied underfill to insure:

  • Mechanical connection (adhesion)
  • Protection of joints and chips during operation

Two types of pre-applied underfill are available:

  • No-flow underfill (NUF) – dispensed on bottom die
  • Wafer-level underfill (WLUF) – applied on top wafer

imec 2

If the TCB is done to quickly, heavy voiding results. A comparison of NUF and WLUF (which IFTLE sometimes calls WUF) is given below.

imec 3

The process flows for NUF and WUF are compared below.

imec 4

Amkor moves SWIFT and SLIM into Mass Production

Anyone questioning whether Amkor would move their high density TSV-less packaging technologies SWIFT and SLIM into HVM should question no more following their announcement that they have teamed with Cadence and will be releasing PDK for these technologies.[link]

For all the latest on 3DIC and other advanced packaging, stay linked to IFTLE…

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