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IFTLE 20 ASE Examines Materials and Process Changes for Advanced WLP

Wafer Level Packaging (WLP) is one of the fastest growing segments of the chip packaging area. WLP began over a decade ago with very small packages having very few I/O. There is currently significant demand for much larger die (greater than 7 mm) with many more I/O (greater than 150). In order to meet these requirements and continue to pass customer required board level reliability (BLR) tests (drop test and temperature cycling test) assembly houses have had to introduce material, process and structural changes to their WLP structures. For instance,

Initial WLP products manufactured under the FCT UltraCSP license (i.e Amkor, ASE, SPIL, STATSChipPAC, National, etc. )used BCB dielectric, Ti/Al/Ti RDL and Al/NiV/Cu UBM. Larger chips and more difficult reliability requirements have seen a shift to PI and PBO type dielectrics which have higher elongation and are considered “tougher”, a shift to Cu RDL and a shift away from sputtered Al/NiV/Cu UBM.

At the recent IEEE ESTC (Electronic System-integration Technology Conference) in Munich, John Hunt of ASE detailed dielectric, RDL and UBM change options for their WLP technology.

Experiments were run on a 6.36 x 6.36 mm test vehicle having a 15 x 15 array of SAC 405 solder balls on 0.4 mm pitch. The test matrix they examined is shown in Table 1. Cycles to first fail and Weibul 63.2% fail data are shown in Table 2 for the Thermal Cycling and Drop tests.

Hunt concludes that in both the temp cycling and drop test results, cell 8 shows the highest first fail and Weibul 63.2% cycle to failure data. Cell 5 would rank 2nd. Overall both cells have 7.5 um of dielectric in both the first and second RDL layers . Cell 5 uses PI and performs slightly better in the temp cycle tests and cell 8 which uses PBO performs better in the drop test.

All cells with 5 um dielectric performed poorly. Al/NiV/Cu sputtered UBM performed poorly. PBO 2 (lower cure temp – 250 C) performed better in TCT than in drop test. Higher elongation, lower modulus PBO 1 gives better drop test results.

For all the latest information on 3D IC and advanced packaging stay linked to Insights from the leading edge, IFTLE……

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