Roundup: FD-SOI, Ecosystem Shine at Semicon West
Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News
SOI in general and FD-SOI in particular were hot topics at this year’s Semicon West in San Francisco. A panel discussion by industry thought-leaders gathered to discuss the current challenges facing the mobile industry was among the highlights. It featured an impressive line-up of key players from the ecosystem at the forefront of fully-depleted, SOI based technologies, including:
- ARM: Ron Moore – Director of Strategic Accounts Marketing, Physical IP Division
- GlobalFoundries: Subramani Kengeri – Vice President of Design Solutions
- IBM: Gary Patton – Vice President of the Semiconductor Research and Development Center
- SOI Industry Consortium: Horacio Mendez – Executive Director
- Soitec: Steve Longoria – Senior Vice President of World Wide Strategic Business Development
- STMicroelectronics: Philippe Magarshack – Technology Research and Development Group Vice President
- UC Berkeley: Chenming Calvin Hu, Ph.D. – TSMC Distinguished Professor at the University of California at Berkeley
Setting the scene, Soitec’s Longoria noted that, “Our industry is now driven by SOCs (where in the past it was CPUs) and we are on much shorter product cycles driven by consumer applications.”
As the first to be bringing out products based on ultra-thin layers of both SOI and insulator, ST’s Magarshack spoke extensively about their planar FD-SOI technology, which will be taping out at 28nm this summer. He said that they were very confident and would be sharing the results at the end of the year. He also emphasized their full commitment and close work with GF to enable the ecosystem, which was echoed in comments by GF’s Kengari.
With respect to 28nm, said Mendez of the SOI Consortium, “…the analysis says the cost [of FD-SOI] is equivalent to or even lower [than bulk silicon].”
IBM’s Patton concurred, saying that, “When you’re dealing with an FD-SOI wafer, we see a big key advantage in manufacturability and time to market.”
Asked how FD-SOI would impact end-users, ARM’s Moore responded that mobile is about saving power. FD-SOI provides a low-power bedrock, and with the headroom, the back-biasing option lets you add incredible performance. “We see a valuable flow with FD-SOI & FinFET from devices down to servers,” he said.
In conclusion, UCBerkeley’s Hu said, “I’m very confident FD-SOI and FinFET are going to serve the industry quite well.”
Earlier in the day, the show’s TechXpot series lead off with Enabling Sub-22nm with New Materials and Processes. It was packed – with all the chairs taken, people were sitting on the floor in the aisles and crowded four-deep all around the edges. In his presentation on the “Convergence of Engineered Substrates and IC Devices for Mobile Applications”, Soitec CTO Dr. Carlos Mazure reminded us that mobile is really many technologies: in addition to the digital side, there’s RF, imaging, MEMS and memories – all of which can (and many do) benefit from SOI and other advanced engineered substrates. They’re not all on the leading edge, but when it comes to battery life, they all count.
At another presentation, Leti’s FD-SOI Manager with the IBM Alliance Maud Vinet covered their leading-edge research on FD-SOI. She says that they’ll be presenting exciting results at IEDM in December, so watch this page for that.
All in all, it was a good show for the SOI ecosystem, full of energy and renewed enthusiasm.