The ISMI Manufacturing Week is no longer, being replaced with a members-only event, Sematech said. That move has prompted another manufacturing-related gathering, the Advanced Process Control (APC) conference, to set up a separate event, with a meeting planned for September in Ann Arbor, Michigan.

The annual ISMI event had attracted more than 500 participants to Austin each fall, with sessions on environment, safety, and health, refurbished equipment, the 450mm wafer transition, and others, as well as keynote speakers drawn from the top semiconductor and equipment vendors. A Sematech spokesman said the planned members-only event will focus on “providing increased value to ISMI’s membership by bringing them together with the supplier community to proliferate innovations in semiconductor operations.”

The APC Conference had co-located with ISMI Manufacturing Week for the past two years, with mixed results, said John Pace, president of the Integrated Measurement Association (IMA), which will host the APC Conference XXIV. After more than 18 years of holding separate meetings, the APC conference tried to co-locate with the much larger ISMI Manufacturing Week, a move “that was not popular with our members, who wanted to have a separate event.”

Organizers issued a call for papers for the upcoming APC conference during a SEMI-organized conference going on this week in Saratoga Springs, N.Y., the Advanced Semiconductor Manufacturing Conference. Abstracts can be submitted on-line, or if that is not possible, by email to APCconference@gmail.com.

Brad Van Eck

Brad Van Eck, chairman of the APC conference, said the APC meetings in the United States normally attracted more than 200 control experts since 1992, peaking at 500 in the late 1990s. “APC is a very focused event. People in the advanced process control community bring new ideas to APC first,” he said. Fault detection and classification (FDC), run-to-run control, and predictive techniques such as virtual metrology and predictive maintenance, are expected to be on the agenda at the Ann Arbor event, planned for Sept. 10-12.

Interestingly, APC has thrived overseas. A European event, APCM, has attracted sponsors and participants, and an Asian-focused conference that alternates between Japan and Taiwan, also has continued.

The APC conference logo.

James Moyne, a professor at the University of Michigan who also consults for Applied Materials, said the APC event will be held at a conference hall at the university. The organizers are soliciting papers beyond the semiconductor space, soliciting papers from control engineers working in solar, MEMS, LEDs, and related areas. Van Eck said people working at manufacturers, equipment suppliers, software solution providers, and sensor and metrology suppliers, are expected to  submit abstracts.  Topics include:

•        Run-to-run, wafer-to-wafer, real-time control; process modeling and model-based control

•        Fault detection and classification (FDC); fault prediction (FP)

•        Factory-wide and enterprise-wide applications and deployment

•        Integrated metrology and virtual metrology

•        Predictive technologies such as predictive maintenance, predictive scheduling and predictive yields

•        APC integration with technologies such as yield/maintenance management, adaptive scheduling and DFM

•        Sensor development, implementation and integration

•        Sensor/actuator bus and intelligent sensors

•        Real-time data collection and data management

•        Control architecture requirements

•        Applications (Etch, Litho, CVD, PVD, Implant)

•        Future APC needs and requirements

•        Data Mining

•        Airborne Molecular Contamination (AMC)

•        Benefits and justification (ROI, CoO, OEE)

•       Standards (process control systems, sensorbus, data quality, integrated metrology, EDA, time synch, Idle Mode, etc)

•        Tool productivity data collection/analysis

•        E-diagnostics, E-manufacturing, and EEC

•        APC in the next generation factory (NGF)

•        APC and APC-related advancements in solar devices, flat panels, LEDs and MEMs

•        APC applications to back-end semiconductor manufacturing

•        Remote/wireless sensors and networks applied to APC

•        APC and green technologies, such as “pump idle mode”

A team based at the Centre de Recherches sur les Macromolécules Végétales (CNRS) said it has combined sugar- and oil-based polymers in an effort to improve the resolution of patterns created with self-assembling copolymers.

Synthetic polymers derived from petroleum have a minimum resolution of about 20nm, according to CNRS. Associating sugars with oil-based macromolecules may reduce the resolution of the self-organization films to 5-nm, according to an article in the journal ACS Nano. The copolymers could be applied to flexible electronics, including  biosensors and photovoltaic cells, said Redouane Borsali, a CNRS senior researcher.

The hybrid material combines sugar-based and petroleum-derived polymers with widely different physical/chemical characteristics, creating sugar cylinders within a petroleum-based polymer lattice. The ACS Nano article bears the title Oligosaccharide/Silicon-Containing Block Copolymers with 5 nm Features for Lithographic Applications.

Purposeful Cracking

South Korean researchers published a paper in Nature describing efforts to cause purpose-driven cracking, a method which they said could be applied to creating channels in electronic devices and microfluidic products.

The team borrowed methods used for fashioning stone, in which small holes are made in a piece of stone and wood is inserted. Soaking the wood causes the stone to expand and crack in a controlled fashion.

Doing that in semiconductor materials produced patterns such as spirals, oscillating and branched fracture paths, and fractal geometries.

Controlled cracking may work for creating channels. (Source: Nature)

The team worked with a silicon nitride thin film deposited on a silicon substrate using low-pressure chemical vapor deposition. Micro-notches etched into the silicon substrate concentrated stress for crack initiation, which occurred spontaneously during deposition of the silicon nitride layer.

The Korean team said the patterning technique “presents new opportunities in nanofabrication and offers a starting point for atomic-scale pattern formation, which would be difficult even with current state-of-the-art nanofabrication methodologies.”

Throwaway Touch Pads

Capacitors can be cut into metallic paper, forming touch keys.

A U.S.-French team described ways to make touch pads so cheaply that they could be applied to disposable products such as disposable medical device labels and food labels, or for keying in password-protected codes on security-sensitive packaging.

The electronic touch pads, which might cost as little as 25 cents per square meter, are made of paper coated in aluminum and transparent polymer, forming the basis for touch-sensitive capacitors. Lead researcher Aaron Mazzeo of Harvard University said a laser could cut individual capacitors into the paper, each corresponding to a key on a touch pad. The keys would need to be linked to an external source of power and to electronic circuitry to detect when a given key is touched. That work remains to be done, according to an article in Chemistry World.

– by David Lammers

Intel remained in control of the number one spot in the rankings, according to the firm. Intel extended its lead over second-ranked Samsung, according to the firm. TSMC was third, followed by Toshiba, Qualcomm, TI, Renesas, Micron, SK Hynix and ST, according to IC Insights.

GlobalFoundries replaced Elpida in the top 20 rankings. GlobalFoundries, which moved into 19th place, passed up UMC. UMC remained in 20th place.

”Fabless semiconductor supplier Qualcomm rode the strong wave of high growth in the smartphone marketplace to post a stellar 56 percent year-over-year surge in semiconductor sales. This amazing increase was also spurred in part by the company’s acquisition of Atheros in May of 2011. In fact, Qualcomm is now on pace to register over $12 billion in sales this year,” according to IC Insights.

”It currently appears that Micron has the best chance to eventually acquire Elpida out of bankruptcy. If this occurs, Micron would add between $2.5 and $3.0 billion in revenue to its annual sales, which could help move the company up one or two positions in the ranking,” according to IC Insights.

Mobile OEMs are looking for higher capacity and faster storage solutions, as the current interface technology standard is quickly running out of steam.

The current mobile storage interface standard — dubbed e.MMC — was recently given a major speed upgrade. But looking to replace products based on the e.MMC standard, many OEMs are now taking a hard look at a faster and next-generation interface technology called Universal Flash Storage (UFS). The UFS electrical interface is a serial communication bus that can be used in smartphones, cameras, digital recorders, MP3 players, tablets and even electronic toys.

UFS could also propel a new and large semiconductor sector. Micron, Samsung and others are racing each other to roll out their initial UFS chipsets in 2012. Cadence, Synopsys and other intellectual-property (IP) houses are also looking at the technology. The volumes for UFS chipsets and IP are expected in 2013.

In February, standards body JEDEC published the 1.0 specification of the new UFS standard. JEDEC will shortly upgrade the 1.0 specification. And a separate group plans to set up accreditation labs and a certification process for UFS-compliant products.

“UFS is a big deal,” said Matti Floman, senior manager of technology at cell-phone giant Nokia at JEDEC’s Mobile Forum in Santa Clara, Calif. on Thursday (May 10). “UFS lets you open up a big door” in terms of enabling new and exploding applications in the mobile space.

For example, UFS will enable end-users to multi-task and open up different applications — perhaps from 10 to 20 programs — on a smartphone simultaneously, said Victor Tsai, architecture strategist for NAND development at Micron Technology Inc. UFS is initially geared for mobile products, but the technology could one day migrate to PC systems, Tsai told SemiMD.

e.MMC vs. UFS

The push for UFS follows a major move by Apple, which could be developing a rival and proprietary solution to UFS. Last year, Apple bought IP chip vendor Anobit Technologies Ltd. of Israel for up to $500 million. Anobit’s memory signal processing technology is said to improve the endurance, performance and cost of flash storage products and systems.

Apple — as well as Nokia, Samsung and other mobile vendors — all see a major need for a new mobile interface storage technology. Today, NAND flash memory is used for storage in many types of mobile systems. NAND is controlled by a dedicated controller, which handles the read, write and other functions within the device. In many of today’s systems, three components — the NAND flash memory, controller and a multimedia card (MMC) interface — are integrated into a single device. Generally, the interface is based on the e.MMC technology standard, which has been around for several years.

Diagram of typical e.MMC configuration (Source: Samsung)

Despite the upgrade for e.MMC, the message was clear at JEDEC’s Mobile Forum: UFS is the future. Competing with e.MMC, UFS is designed for both embedded and removable flash memory-based storage in mobile devices such as smartphones and tablet computers. The initial data throughput for UFS will be 300 Mbyte/sec. Over time, UFS can be scaled to 600 Mbyte/sec and beyond, according to JEDEC.

UFS uses MIPI Alliance’s M-PHY and UniPro specifications for the interconnect layer. UniPro is a specification meant to act as a universal chip-to-chip protocol. Designed as the primary physical interface for the UniPro specification, M-PHY is a high-speed serial interface targeting up to 2.9 gigabits per second (Gbps) per lane, with scalability to 5.8 Gbps per lane.

UFS Top Level Architecture (Source: JEDEC)

“Performance and security are the key focus points for UFS,” said Ryan Chien, an analyst with IHS iSuppi. “In particular, upcoming productivity-based tablets such as those running Windows 8 will be ideal for UFS, as the Windows kernel is built around traditional storage interfaces. The new super-thin ultrabook computers promoted by Intel Corp., with their flexible product development roadmap, also could be a potentially robust application for UFS.”

Despite the push for UFS, the e.MMC standard is expected to retain its dominance in many cellphones and tablets, with shipments rising by a robust 37 percent for 2012, according to the firm. Shipments of e.MMC solutions in 2013 are forecast to reach 711.1 million units, up from 520.3 million in 2012, according to IHS iSuppli.

No forecast is yet available for UFS. “UFS parts won’t be as cost competitive as e.MMC given their high manufacturing expense. As a result, smartphone manufacturers will not share the same urgency to switch their storage needs to e.MMC, even for bleeding-edge smartphone platforms,” Chien said. ”Moreover, the most current e.MMC 4.5 revision with up to 200 megabyte-per-second performance not only is sufficient for even high-end devices, it also provides a far smoother transition than UFS for mainstream device platforms in terms of system compatibility. E.MMC has a further card up its sleeve. An earlier-specification product known as e.MMC 4.41 continues to claim a sizable contingent of devices that prefer to stick to the older e.MMC version instead of incurring the additional expense of switching to e.MMC 4.5.”

The case for UFS

On the other hand, UFS will provide a change in architecture to increase performance. UFS will initially offer three times the interface speed of the prevalent e.MMC interface, which is comparable to serial ATA-2. Moreover, UFS will offer the promise for reductions in device power consumption due to a low active power level and a near-zero idle power level.

And unlike e.MMC, UFS supports several significant features, such as multi-tasking and command queuing to raise random read/write speeds, said Alan Niebel, chief executive for Web-Feet Research Inc., a market research company. This differs from conventional flash-based memory cards and embedded flash solutions, which processes one command at a time, limiting random read/write access performance. In addition, a forthcoming complementary UFS Host Controller Interface (HCI) specification will allow system designers flexibility by simplifying the involvement of the host processor in the operation of the flash storage subsystem.

So far, there are little or no UFS-based products in the market. With the standards now in place, vendors are expected to roll out systems and chipsets based on UFS technology in 2012, said Hangu Sohn, technical product marketing manager for Samsung Semiconductor Inc. Samsung itself did not disclose products in the arena.

Micron also did not announce products. “Product availability is TBA (to be announced),” said Micron’s Tsai, who is also the vice chairman for JEDEC’s JC-64.1 Subcommittee, which defines electrical specifications and command protocols in UFS.

In an interview with SemiMD, Tsai said JEDEC is defining a more robust version of the UFS specification, dubbed 1.1, which will be out “soon.” UFS 1.1 will also have many of the attributes of 1.0, he said.

A separate organization — the Universal Flash Storage Association — is in the process of setting up accreditation labs and certification procedures for UFS chips and devices, he said. The certification process will ensure that products are UFS compliant. Formed in 2010, the Universal Flash Storage Association includes Agilent, Micron, Phison, Samsung, Silicon Motion and SK Hynix.

The plan will impact up to approximately 250 positions globally. As part of the effort to cut costs, Applied expects to relocate manufacturing for its Precision Wafering System (PWS) solar business based in Cheseaux, Switzerland to Asia, according to the filing.

PWS business operations and customer support functions will be relocated to Treviso, Italy, the headquarters for Applied’s Baccini Cell Systems, and Xi’an, China, the site of Applied’s Solar Technology Center, according to the filing. PWS’s headquarters and new product development will remain in Switzerland.

The plan also includes reductions in development activities for LED. The total estimated pre-tax cost of implementing the plan is expected to be in the range of approximately $70 million to $100 million, or $0.04 to $0.06 per share, which will be incurred over the next 12 to 18 months beginning in the third quarter of fiscal 2012.

These actions are consistent with the company’s previously-stated goal to reduce the EES segment’s annual revenue breakeven level to $500 million in fiscal 2013, according to the filing.

Micron is offering more than $2.5 billion (200 billion yen) as well as assurances of the continued operation of Elpida’s operations in Japan, according to several reports from Japan-based sources.

The U.S. memory maker made the announcement following a May 10 approval by the Tokyo District Court allowing Elpida’s trustees to negotiate an agreement with Micron, pursuant to which Micron would become Elpida’s sponsor and acquire Elpida’s entire business in accordance with the corporate reorganization proceedings.

Elpida, a semiconductor DRAM memory manufacturer, filed a petition for commencement of corporate reorganization proceedings with the Tokyo District Court under the Corporate Reorganization Act of Japan on Feb. 27, 2012, which proceedings have been commenced.

SK Hynix issued a regulatory filing last week saying it was no longer in the running to buy Elpida. Toshiba is said to be out of the running to buy Elpida. Private equity firm TPG Capital and Chinese fund Hony Capital have submitted a joint bid.

The addition of Elpida’s capacity would give Micron roughly a 25 percent share in the worldwide DRAM market, according to IHS iSuppli, making it the second-largest DRAM maker after Samsung and moving beyond SK Hynix. Elpida has a large fab in Hiroshima, in southern Japan, and a smaller packaging operation in Akita in the northern part of the country.

Elpida is Japan’s last remaining maker of DRAMs, a sector Japan-based companies dominated in the 1980s and for most of the 1990s. Elpida was established in 1999, originally as NEC Hitachi Memory, Inc., and took on the Elpida name shortly thereafter. In 1993, it took on the DRAM operations of Mitsubishi Electric Corp., and began working together with Taiwan-based Powerchip Semiconductor (PSC). In early 2007 Elpida and PSC set up a DRAM manufacturing joint-venture company, Rexchip Electronics Corp.

The IC business climate continues to improve in 2012, prompting various firms to raise their respective capital spending forecasts.

Total semiconductor capital spending is now projected to hit $56.5 billion in 2012, nearly flat from the previous year and almost $6 billion higher than the January outlook, according to a new forecast from VLSI Research Inc.

Industry trade group SEMI will likely boost its capital spending forecast. “The World Fab Forecast report will be published end of this month, but we expect equipment spending to be above the flat-line,” said Christian Gregor Dieseldorff, senior analyst of fab information in the SEMI Industry Research and Statistics group. “We expect the second half of this year to be better and we expect 2013 to be record year for equipment spending.”

In its previous forecast, semiconductor fab equipment spending was expected to remain flat, according to SEMI. Fab equipment spending was estimated at $38.85 billion for 2012 and $45.50 billion for 2013, according to the previous forecast, which was issued in March.

Joanne Itow, an analyst with Semico Research Corp., has been more optimistic than others about capital spending for 2012. “Since the beginning of this year, we’ve been flat to up 4 percent,” Itow said.

G. Dan Hutcheson, CEO of VLSI Research, sees a mixed picture despite the upgrade in capital spending. “Within the equipment market, the back-end is seeing a stronger momentum than the front-end after trailing it for much of 2011. Utilization rates at the subcons are rising fast, driven primarily by strong demand in the mobile space amid new product introductions,” he said.

“Even though VLSI’s forecast for IC sales has been unchanged at +4 percent since the beginning of the year, the equipment forecast was upgraded two months ago to -7 percent from -9 percent and will receive another boost in the next update due to several significant increases in capital spending,” he said.

“Most of the hikes took place in the foundry market with TSMC increasing their capex by $2.3 to a whopping $8.3 billion and UMC raising it (to) $2.0 billion for the year. The memory market has also seen some upgrades; Toshiba is planning to spend $1.8 billion in 2012, up 10 percent from the previous year,” he said. “However, most of the spending in the memory market will go to capacity upgrades, not expansions. Clearly, the outlook for the equipment industry has improved considerably this year; however, the momentum can only be sustained if the IC market continues to improve across the board in the second half of the year.”

President Barack Obama, during a visit to CNSE in Albany, N.Y. (Source: GlobalFoundries)

“After years of undercutting the competition, now it’s getting more expensive to do business in places like China.  Wages are going up.  Shipping costs are going up.  And meanwhile, American workers are getting more and more efficient.  Companies located here are becoming more and more competitive,” Obama said during a visit to the College of Nanoscale Engineering and Technology in Albany, N.Y. Tuesday (May 8).

Noting that GlobalFoundries and others are hiring in New York because of the quality of the workforce, Obama said more companies are insourcing, citing an unnamed study that found that half of America’s largest companies are thinking of moving their manufacturing operations from China back to the United States.

“Even when we can’t make things cheaper than other countries because of their wage rates, we can always make them better,” Obama said.

However, to keep up the momentum behind the resurgence in manufacturing, Washington needs to revise the corporate tax code, the president said, arguing that companies now get tax breaks for moving factories, jobs and profits overseas.  “They can actually end up saving on their tax bill when they make the move.  Meanwhile, companies that choose to stay here are getting hit with one of the highest tax rates in the world.  That doesn’t make sense,” Obama said.

Long term, Congress needs to implement a full-blown tax reform. But nearer term, the president said  “at the very least what we can do right away is stop rewarding companies who ship jobs overseas and use that money to cover moving expenses for companies that are moving jobs back here to America.”

GlobalFoundries CEO Ajit Manocha addressed the crowd of over 500 people at the CNSE complex and lauded the Obama administration’s Advanced Manufacturing Partnership and its support for the America Invents Act. “American manufacturing is climbing back, with almost half a million jobs added in the manufacturing sector since 2010,” Manocha said.

Public-private partnerships have created jobs in New York, he said, noting that the GlobalFoundries Fab 8, north of Albany, will create more than 1,600 new direct jobs and approximately 8,000 additional new indirect jobs, representing an annual payroll of over $300 million. Fab 8 consists of almost two million square feet of total space, built with an estimated capital budget of approximately $6.9 billion. The fab will ramp to volume production in late 2012, Manocha said. Upon full build out, it will have a production capacity of approximately 60,000 wafers per month.

Last October, memory rivals Samsung and Micron announced the creation of a consortium to develop an open interface specification for a 3D memory technology called the Hybrid Memory Cube (HMC). The HMCC is developing 3D DRAM devices based on through-silicon-via (TSV) technology.

Members of the consortium include Micron, Samsung, Altera, Open-Silicon, Xilinx, IBM and now Microsoft. The technology will enable 3D memory solutions for applications ranging from industrial products to high-performance computing and large-scale networking.

“HMC technology represents a major step forward in the direction of increasing memory bandwidth and performance, while decreasing the energy and latency needed for moving data between the memory arrays and the processor cores,” said K.D. Hallman, general manager of Microsoft’s Strategic Software/Silicon Architectures group.

Last year, Micron disclosed the manufacturing flow for the HMC. Under the plan, IBM will manufacture the controller logic portions of the HMC within its own fab. Micron will make the memory portions – and will assemble and test – the HMC devices within its own operations. Micron has recently set up a 3D DRAM pilot and production line within its 300mm R&D fab in Boise, Ida.

Sandia National Laboratories is developing a supercomputer as part of a DARPA program. In the short term, the lab has found a memory solution for the system: Micron’s HMC.

France’s III-V Lab said it has developed a tunable laser on silicon. The lab has been working on integrated photonic circuits which combine the active and passive functions of III-V- and silicon-based devices for telecommunications and data transfer.

The III-V lab, near Paris, is working towards fully integrated transceivers.

A joint lab of Alcatel-Lucent Bell Labs France, Thales Research and Technology, and CEA-Leti, the III-V lab said it has demonstrated single-wavelength tunable lasers with a 21mA threshold at 20°C, a 45nm tuning range and side mode suppression ratio larger than 40dB over the tuning range.

CEA-Leti and the III-V lab have been working to integrate on-chip devices, including a fully integrated transmitter working above 10Gb/s, as well as tunable single wavelength lasers. They represent key milestones towards fully integrated transceivers, said the III-V lab, which is located near Paris at two sites, Marcoussis and Palaiseau, and which includes about 100 permanent researchers and 25 PhD students.

ASTAR Simulates Nanotwinned Copper

Singapore’s A*STAR Institute for High Performance Computing has been simulating a form of copper known as nanotwinned copper, which may have semiconductor applications.

Using molecular dynamics simulations, the institute reported in a Science article that nanotwinned polycrystalline copper has been shown to possess “simultaneous ultra-high strength and ductility” with a maximum strength found at a small, finite twin spacing.

The simulations addressed questions arising from previous, unexplained experimental data which indicate that the crystal structure of nanotwinned copper exhibits many closely-spaced interruptions in an otherwise regular atomic array. “These interruptions, despite being termed ‘defects,’ actually increase the metal’s strength without reducing its ductility,” researcher Zhaoxuan Wu and co-workers reported.

Schematic illustrations of the (a) crystallographic orientation between nanotwins and (b) slip systems for nanotwinned grains. (Source: ASTAR)

In 2009, the researchers had observed that the strength of nanotwinned copper reached a maximum when the size of the defects in its crystal structure was about 15 nanometers. When the defects were made smaller or larger, the copper’s strength decreased. This contradicted the classical model, which predicted that the metal’s strength would increase continually as the defect size was reduced.

Wu and co-workers addressed this contradiction by using a very large-scale molecular dynamics simulation to calculate how a nanotwinned copper crystal consisting of more than 60 million atoms deforms under pressure.

Cornell Studies Iron-based Superconductors

Cornell researchers have confirmed some predictions about how iron-based high-temperature superconductors work. According to an article in the British publication, The Engineer, various research teams have discovered compounds of iron, arsenic and other elements which become superconductors at much higher temperatures. Early superconductor research focused on metals cooled to near absolute zero.

The Cornell University team studied electrons that have paired up with twins from adjacent atoms to form ‘Cooper pairs’ that move through the conductor without interference. “It is believed that Cooper pairs form when two electrons with opposite spins join up, analogous to two bar magnets snapping together with their north and south poles meeting,” the article in the U.K. publication said.

Anisotropic energy gaps of LiFeAs superconductors. (Source: Cornell University)

Studying crystals of a compound of lithium, iron and arsenic − LiFeAs − that becomes a superconductor at 15K, the Cornell researchers found three of the five possible electron bands.

‘There are two more pairing gaps that we should have been able to detect, and we don’t know yet why not,’ said team leader Séamus Davis of Cornell University. ‘But finding these three along with the directionality is enough to strongly support the theory, and the measurements give the theorists numbers to plug in to refine and extend their predictions.’

An article on the research appeared in Science magazine, saying that the lab’s measurements “will advance the quantitative theoretical analysis of the mechanism of Cooper pairing in iron-based superconductivity.”

- by David Lammers