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Posts Tagged ‘VLSI’

Blog review July 14, 2014

Monday, July 14th, 2014

Ed Korzynski blogs that Moore’s Law is dead – including what and when in the first two parts of a four part series that reference an interview with Gordon Moore and the “so-called” Moore’s Law (by Moore himself).

Pete Singer also blogs on continued scaling, as discussed by IBM’s Gary Patton at The ConFab in June. Patton said scaling will continue but the industry needs to address costs in addition to continued technology innovation.

Many of the developments in the semiconductor industry have stemmed from the continued progress in lithography. However, with the persistent uncertainty of extreme ultraviolet EUV for future-generation patterning, the industry has developed techniques such as self-alignment double patterning (SADP) to extend optical lithography. In a video produced by SPIETV, Chris Bencher of Applied Materials Office of the Chief Technology Officer, reviews the evolution of SADP and looks to its future.

The VLSI Symposia – one on technology and one on circuits – are among the most influential in the semiconductor industry. Three hugely important papers were presented – one on 14nm FD-SOI and two on 10nm SOI FinFETs – at the most recent symposia in Honolulu. Adele Hars reports.

The 5th annual Suss Technology Forum was recently held at SEMICON West focused on trends in 3DIC and WLP. Phil Garrou reports in his latest blog.

Research Alert: June 17, 2014

Tuesday, June 17th, 2014

Research on high-performance field-effect transistors to be presented at 2014 VLSI Symposium

A team of researchers from Purdue University, SEMATECH and SUNY College of Nanoscale Science and Engineering will present today at the 2014 Symposium on VLSI Technology on their work involving high-performance molybdenum disulfide (MoS2) field-effect transistors (FETs).

The team’s research is an important milestone for the realization of the ultra-scaled low-power 2D MoS2 FETs and the advancement of photonic and electronic devices based on transition metal dichalcogenide (TMD) materials such as solar cells, phototransistors and low-power logic FETs. The research is supported by Semiconductor Research Corporation (SRC), the world’s leading university-research consortium for semiconductors and related technologies, and SEMATECH.

As part of the research, the team leveraged MoS2, which has been studied closely in recent years by the semiconductor industry due to its potential applications in electrical and optical devices. However, high contact resistance value limits the device performance of MoS2 FETs significantly. One method to resolve this issue is to dope the MoS2 film, but doping the atomically thin film is nontrivial and requires a simple and reliable process technique. The technique used by the research team provides an effective and straightforward way to dope the MoS2 film with chloride-based chemical doping and significantly reduces the contact resistance.

“Compared with other chemical doping materials such as PEI (polyethylene imine) and potassium, our doping technology shows superior transistor performance including higher drive current, higher on/off current ratio and lower contact resistance,” said Professor Peide Ye, College of Engineering, Purdue University.

In order to obtain high-performance FETs, three parts of the device should be carefully engineered: semiconductor channel (carrier density and its mobility); semiconductor-oxide interface; and semiconductor-metal contact. This research is particularly aimed at eliminating the last major roadblock toward demonstration of high-performance MoS2 FETs, namely, high contact resistance.

The MoS2 FETs using the doping technique, which were fabricated at Purdue University, can be reproduced now in a semiconductor manufacturing environment and show the best electrical performance among all the reported TMD-based FETs. The contact resistance (0.5 kΩ·μm) with the doping technique is 10 times lower than the controlled samples. The drive current (460 μA/μm) is twice of the best value in previous literature.

“Due to recent advances such as the research being presented at the VLSI symposium, 2D materials are gaining a lot of attention in the semiconductor industry,” said Satyavolu Papa Rao, director of Process Technology at SEMATECH. “The collaborative effort among world-class researchers and engineers from this team is a prime example of how consortium-university-industry partnerships further enable the development of cutting-edge process techniques.”

“Improved contacts are always desirable for all electronic and optical devices,” said Kwok Ng, Senior Director of Device Sciences at SRC. “The doping technique presented by this research team provides a valid way to achieve low contact resistance for MoS2 as well as other TMD materials.”

UC Santa Barbara researchers introduce highest performing III-V metal-oxide semiconductor FET

Researchers from the University of California, Santa Barbara (UCSB) will introduce today the highest performing III-V metal-oxide semiconductor (MOS) field-effect transistors (FETs) at the 2014 Symposium on VLSI Technology.

The UCSB research promises to help deliver higher semiconductor performance at lower power consumption levels for next-generation, high-performance servers. The research is supported by the Semiconductor Research Corporation (SRC), the world’s leading university-research consortium for semiconductors and related technologies.

The UCSB team’s III-V MOSFETs, for the first time in the industry, exhibit on-current, off-current and operating voltage comparable to or exceeding production silicon devices — while being constructed at small dimensions relevant to the VLSI (very-large-scale integration) industry.

For the past decade, III-V MOSFETs have been widely studied by a large number of research groups, but no research group had reported a III-V MOSFET with a performance equal to, let alone surpassing, that of a silicon MOSFET of similar size. In particular, UCSB’s transistors possess 25 nanometer (nm) gate lengths, an on-current of 0.5mA and off-current of 100nA per micron of transistor width and require only 0.5 volt to operate.

“The goal in developing new transistors is to reach or beat performance goals while making the transistor smaller—it is no good getting high performance in a big transistor,” said Mark Rodwell, professor of Electrical and Computer Engineering, UCSB. “In time, the UCSB III-V MOSFET should perform significantly better than silicon FinFETs of equal size.”

To reach this breakthrough in performance, the UCSB team made three key improvements to the III-V MOSFET structure. First, the transistors use extremely thin semiconductor channels, some 2.5nm (17 atoms) thick, with the semiconductor being indium arsenide (InAs). Making such thin layers improves the on-current and reduces the off-current. These ultra-thin layers were developed by UCSB Ph.D student Cheng-Ying Huang under the guidance of Professor Arthur Gossard.

Next, the UCSB transistors use very-high-quality gate insulators, dielectrics between the gate electrode and the semiconductor. These layers are a stack of alumina (Al2O3, on InAs) and zirconia (ZrO2), and have a very high capacitance density. This means that when the transistor is turned on, a large density of electrons can be induced into the semiconductor channel. Development of these dielectric layers was led by UCSB Ph.D student Varista Chobpattana under the guidance of Professor Susanne Stemmer.

Third, the UCSB transistors use a vertical spacer layer design. This vertical spacer more smoothly distributes the field within the transistor, avoiding band-to-band tunneling. As with the very thin InAs channel design, the vertical spacer makes the leakage currents smaller, allowing the transistor’s off-current to rival that of silicon MOSFETs. The overall design, construction and testing of the transistor was led by UCSB Ph.D student Sanghoon Lee under Rodwell’s guidance.

“The UCSB team’s result goes a long way toward helping the industry address more efficient computing capabilities, with higher performance but lower voltage and energy consumption,” said Kwok Ng, Senior Director of Device Sciences at SRC. “This research is another critical step in helping ensure the continuation of Moore’s Law — the scaling of electronic components.”

The Week in Review: June 13, 2014

Friday, June 13th, 2014

According to the IMF and predictions by many other market research firms, 2014 and 2015 are expected to be growth years, comparable to or even better than the past few years.

Worldwide shipments of flat-panel televisions rose convincingly in the first quarter of 2014 compared to the same period last year, a stronger-than-expected showing that puts the industry on firm footing for the year, according to a new report from IHS.

Researchers from the University of California, Santa Barbara (UCSB) introduced the highest performing III-V metal-oxide semiconductor (MOS) field-effect transistors (FETs) at the 2014 Symposium on VLSI Technology.

A team of researchers from Purdue University, SEMATECH and SUNY College of Nanoscale Science and Engineering presented at the 2014 Symposium on VLSI Technology on their work involving high-performance molybdenum disulfide field-effect transistors.

Crystal IS, a developer of high-performance ultraviolet (UVC) LEDs, this week announced availability of Optan. The first commercial semiconductor based on native Aluminum Nitride (AIN) substrates, Optan provides a unique technology platform for increased detection sensitivity.

Dow Corning established a higher industry standard for silicon carbide (SiC) crystal quality by introducing a product grading structure that specifies ground-breaking new tolerances on killer device defects, such as micropipe dislocations (MPD), threading screw dislocations (TSD) and basal plane dislocations (BPD).

Solid State Watch: June 6-12, 2014

Friday, June 13th, 2014
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Research Alert: June 10, 2014

Tuesday, June 10th, 2014

UC Santa Barbara researchers introduce highest performing III-V metal-oxide semiconductor FET

Researchers from the University of California, Santa Barbara (UCSB) will introduce today the highest performing III-V metal-oxide semiconductor (MOS) field-effect transistors (FETs) at the 2014 Symposium on VLSI Technology.

The UCSB research promises to help deliver higher semiconductor performance at lower power consumption levels for next-generation, high-performance servers. The research is supported by the Semiconductor Research Corporation (SRC), the world’s leading university-research consortium for semiconductors and related technologies.

The UCSB team’s III-V MOSFETs, for the first time in the industry, exhibit on-current, off-current and operating voltage comparable to or exceeding production silicon devices — while being constructed at small dimensions relevant to the VLSI (very-large-scale integration) industry.

For the past decade, III-V MOSFETs have been widely studied by a large number of research groups, but no research group had reported a III-V MOSFET with a performance equal to, let alone surpassing, that of a silicon MOSFET of similar size. In particular, UCSB’s transistors possess 25 nanometer (nm) gate lengths, an on-current of 0.5mA and off-current of 100nA per micron of transistor width and require only 0.5 volt to operate.

“The goal in developing new transistors is to reach or beat performance goals while making the transistor smaller—it is no good getting high performance in a big transistor,” said Mark Rodwell, professor of Electrical and Computer Engineering, UCSB. “In time, the UCSB III-V MOSFET should perform significantly better than silicon FinFETs of equal size.”

To reach this breakthrough in performance, the UCSB team made three key improvements to the III-V MOSFET structure. First, the transistors use extremely thin semiconductor channels, some 2.5nm (17 atoms) thick, with the semiconductor being indium arsenide (InAs). Making such thin layers improves the on-current and reduces the off-current. These ultra-thin layers were developed by UCSB Ph.D student Cheng-Ying Huang under the guidance of Professor Arthur Gossard.

Next, the UCSB transistors use very-high-quality gate insulators, dielectrics between the gate electrode and the semiconductor. These layers are a stack of alumina (Al2O3, on InAs) and zirconia (ZrO2), and have a very high capacitance density. This means that when the transistor is turned on, a large density of electrons can be induced into the semiconductor channel. Development of these dielectric layers was led by UCSB Ph.D student Varista Chobpattana under the guidance of Professor Susanne Stemmer.

Third, the UCSB transistors use a vertical spacer layer design. This vertical spacer more smoothly distributes the field within the transistor, avoiding band-to-band tunneling. As with the very thin InAs channel design, the vertical spacer makes the leakage currents smaller, allowing the transistor’s off-current to rival that of silicon MOSFETs. The overall design, construction and testing of the transistor was led by UCSB Ph.D student Sanghoon Lee under Rodwell’s guidance.

“The UCSB team’s result goes a long way toward helping the industry address more efficient computing capabilities, with higher performance but lower voltage and energy consumption,” said Kwok Ng, Senior Director of Device Sciences at SRC. “This research is another critical step in helping ensure the continuation of Moore’s Law — the scaling of electronic components.”

New class of nanoparticles brings cheaper, lighter solar cells outdoors

Researchers in the University of Toronto’s Edward S. Rogers Sr. Department of Electrical & Computer Engineering have designed and tested a new class of solar-sensitive nanoparticle that outshines the current state of the art employing this new class of technology.

This new form of solid, stable light-sensitive nanoparticles, called colloidal quantum dots, could lead to cheaper and more flexible solar cells, as well as better gas sensors, infrared lasers, infrared light emitting diodes and more.

Collecting sunlight using these tiny colloidal quantum dots depends on two types of semiconductors: n-type, which are rich in electrons; and p-type, which are poor in electrons. The problem? When exposed to the air, n-type materials bind to oxygen atoms, give up their electrons, and turn into p-type. Ning and colleagues modelled and demonstrated a new colloidal quantum dot n-type material that does not bind oxygen when exposed to air.

Maintaining stable n- and p-type layers simultaneously not only boosts the efficiency of light absorption, it opens up a world of new optoelectronic devices that capitalize on the best properties of both light and electricity. For the average person, this means more sophisticated weather satellites, remote controllers, satellite communication, or pollution detectors.

“This is a material innovation, that’s the first part, and with this new material we can build new device structures,” said Ning. “Iodide is almost a perfect ligand for these quantum solar cells with both high efficiency and air stability—no one has shown that before.”

Ning’s new hybrid n- and p-type material achieved solar power conversion efficiency up to eight per cent—among the best results reported to date.

Design of self-assembling protein nanomachines starts to click

A route for constructing protein nanomachines engineered for specific applications may be closer to reality.

Biological systems produce an incredible array of self-assembling, functional protein tools. Some examples of these nanoscale protein materials are scaffolds to anchor cellular activities, molecular motors to drive physiological events, and capsules for delivering viruses into host cells.

Scientists inspired by these sophisticated molecular machines want to build their own, with forms and functions customized to tackle modern-day challenges.

This is a computational model of a successfully designed two-component protein nanocage with tetrahedral symmetry. Credit: Dr. Vikram Mulligan

The ability to design new protein nanostructures could have useful implications in targeted delivery of drugs, in vaccine development and in plasmonics — manipulating electromagnetic signals to guide light diffraction for information technologies, energy production or other uses.

A recently developed computational method may be an important step toward that goal. The project was led by the University of Washington’s Neil King, translational investigator; Jacob Bale, graduate student in Molecular and Cellular Biology; and William Sheffler in David Baker’s laboratory at the University of Washington Institute for Protein Design, in collaboration with colleagues at UCLA and Janelia Farm.

The work is based in the Rosetta macromolecular modeling package developed by Baker and his colleagues. The program was originally created to predict natural protein structures from amino acid sequences. Researchers in the Baker lab and around the world are increasingly using Rosetta to design new protein structures and sequences aimed at solving real-world problems.

“Proteins are amazing structures that can do remarkable things,” King said, “they can respond to changes in their environment. Exposure to a particular metabolite or a rise in temperature, for example, can trigger an alteration in a particular protein’s shape and function.” People often call proteins the building blocks of life.

“But unlike, say, a PVC pipe,” King said, “they are not simply construction material.” They are also construction (and demolition) workers — speeding up chemical reactions, breaking down food, carrying messages, interacting with each other, and performing countless other duties vital to life.

Reporting in the June 5 issue of Nature, the researchers describe the development and application of new Rosetta software enabling the design of novel protein nanomaterials composed of multiple copies of distinct protein subunits, which arrange themselves into higher order, symmetrical architectures.

With the new software the scientists were able to create five novel, 24-subunit cage-like protein nanomaterials. Importantly, the actual structures, the researchers observed, were in very close agreement with their computer modeling.

Their method depends on encoding pairs of protein amino acid sequences with the information needed to direct molecular assembly through protein-protein interfaces. The interfaces not only provide the energetic forces that drive the assembly process, they also precisely orient the pairs of protein building blocks with the geometry required to yield the desired cage-like symmetric architectures.

Creating this cage-shaped protein, the scientists said, may be a first step towards building nano-scale containers. King said he looks forward to a time when cancer-drug molecules will be packaged inside of designed nanocages and delivered directly to tumor cells, sparing healthy cells.

“The problem today with cancer chemotherapy is that it hits every cell and makes the patient feel sick,” King said. Packaging the drugs inside customized nanovehicles with parking options restricted to cancer sites might circumvent the side effects.

The scientists note that combining just two types of symmetry elements, as in this study, can in theory give rise to a range of symmetrical shapes, such as cubic point groups, helices, layers, and crystals.

King explained that the immune system responds to repetitive, symmetric patterns, such as those on the surface of a virus or disease bacteria. Building nano-decoys may be a way train the immune system to attack certain types of pathogens.

“This concept may become the foundation for vaccines based on engineered nanomaterials,” King said. Further down the road, he and Bale anticipate that these design methods might also be useful for developing new clean energy technologies.

The scientists added in their report, “The precise control over interface geometry offered by our method enables the design of two-component protein nanomaterials with diverse nanoscale features, such as surfaces, pores, and internal volumes, with high accuracy.”

They went on to say that the combinations possible with two-component materials greatly expand the number and variety of potential nanomaterials that could be designed.


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