By David Lammers

Water is proving increasingly useful to the semiconductor industry. Just as immersion techniques came to the rescue of lithographers, ice could prove beneficial in removing small particles from wafers, speakers from Dai Nippon Screen (DNS) said at the Sematech Surface Preparation and Clean Conference (SPCC 2012) in Austin.

Ice is effective at dislodging small particles. (Source: DNS presentation at SPCC 2012)

Researchers at the central research laboratory of DNS (Kyoto, Japan) hypothesized that the expansive force which occurs when water freezes could nudge small particles stuck to a wafer’s surface. Water expands in volume by about 10 percent when it freezes, said Jim Snow, a chemist based at the DNS office in Dallas.

Early tests have shown that when water becomes ice it lifts particles adhering to a wafer surface. If water is frozen in a convex manner, i.e., from the inner part of the wafer out to the edge, there is no damage to the wafer. After the water is frozen with liquid nitrogen at minus 190° C, it is unfrozen with 80° C water. The result, said DNS CTO Soichi Nadahara, is an 80 percent particle removal efficiency (PRE), better than the company’s current state-of-the-art techniques.

While DNS has tested the ice cleaning method with 37nm poly lines and spaces, the test patterns were not very dense. “We believe this technique could be useful beyond 28nm and 20nm,” Snow said, adding that it is “a work in progress.”

Nadahara said “we are close to the beta or prototyping tool stage, and we will put it to the test somewhere at a customer site. We have been working on it internally for a couple of years.” The motivation, he said, is that ice seems more effective than other techniques at dislodging extremely small particles, with less damage than spray aerosols or megasonic techniques.

Cryogenic techniques have been used in wafer cleaning tools for some time. BOC earlier introduced its Eco Snow cleaning method, hitting the wafer with ice particles while rotating the wafer at different speeds.

FSI, for example, projects frozen nitrogen and argon at wafers at high velocity, with no side effects, said Jeff Butterbaugh, CTO at FSI International (Chaska, Minn.) DNS has used a two-fluid spray technique — most often nitrogen (N2) combined with water or SC1 chemistry for a 30 second period — using a tangential force in its Nanospray 2 product.

But as far as anyone could recall at the SPCC conference, the idea of freezing a wafer has not been tried before. Participants at the conference said many questions remain to be answered, including the impact on throughput, damage to sensitive structures, and the like.

One large wafer foundry is working with DNS on the tool, and participants at the conference that that foundry is most likely TSMC, which has pioneered single-wafer cleaning before. While working with SEZ (now part of Lam Research), TSMC engineers figured out that back end of the line (BEOL) cleaning with the ST250 chemistry at lower viscosity worked better in single-wafer chambers than in batch processing tools. TSMC’s move jump-started the move to single-wafer cleaning, and the major clean tool companies now offer tools with eight to 20 chambers.

Texas Instruments, which worked closely with TSMC and other foundries, had visibility into TSMC’s success with single-wafer cleaning, and began incorporating single-wafer cleaning tools into its DMOS 6 fab in Dallas at the 65nm generation, a participant at the SPCC conference said. Since then, single-wafer techniques have worked their way into the front-end of the line as well.

Nadahara said DNS estimates that single-wafer tools overtook sales of batch tools in 2008, accelerating as high-k/metal gate introduction began to pick up speed.

Ice seems to work better than dual-fluid cleaning techniques for the smallest particles. (Source: DNS presentation at SPCC 2012)

By David Lammers

The concerns about the worldwide macroeconomic situation, which weighed so heavily on the semiconductor equipment industry for most of the second half of 2011, are continuing to worry executives at Lam Research Corp.

In a call following release of the company’s calendar year fourth quarter 2011 financials, newly installed CEO Martin Anstice said Lam now forecasts wafer fab equipment spending for 2012 to be flat to slightly down, in the $30B range, which is an improvement over the company’s expectation of a few months ago of minus 5-20 percent for WFE spending this year. With semiconductor sales forecast to be in the range of $310-315 billion this year, it would appear that 2012 could be a decent year for the industry overall and for a combined Lam-Novellus in 2012.

Hanging overhead, however, are worries about debt in the Eurozone, a possible slowdown in Asia, including China, and tepid expectations for the U.S. economy this year as well. “The macroeconomic environment is very unstable,” said Anstice, citing a recent IMF warning about the Eurozone debt crisis as evidence.

On the technical front, with semiconductor companies facing big decisions about their device architectures and processes this year, Anstice said Lam faces a “critical year.” In both etch and single-wafer cleans, semiconductor companies are deciding which equipment companies to rely on. In high-aspect-ratio single-wafer clean and drying steps, and for the dielectric and conductor etch steps in finFETs, 3D NAND structures, and others, customers are making important technical and supplier choices, he said.

“We are at a significant inflection point, with customers making very focused investment decisions about their critical device architectures and processes this year that will impact our 2013 and 2014 revenues,” Anstice said.

Also, the semiconductor industry’s spending is becoming more concentrated, as evidenced by the large capex increase announced recently by Samsung Electronics. Without naming customers, the Lam executives said the current quarter, ending in March, will see an unusual concentration in shipments to one or two customers. Traditionally, customers placing very large orders have more pricing leverage, and Anstice spent much of Wednesday’s conference call fielding questions on how the company’s gross margins will fare giving the higher concentration of spending. Lam forecasts its gross margins in the March-ending quarter to be about 41 percent.

Lam is changing the definition of its foundry segment to go beyond pure-play foundries, now including companies which “make available” their logic capacity for use by foundry customers, an obvious reference to Samsung’s current strategy. For the March-ending quarter, he said Lam expects to ship at least 50 percent of its product to the foundry segment.

Over the past few months, Lam executives have been asking customers to provide their expectations for the merged Lam-Novellus corporation. “We’ve been encouraging customers to tell us what they see as the strengths and weaknesses of both companies,” he said, adding that Lam is “encouraging customers to engage with us in collaborative models.”