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SiPs Simplify Wireless IoT Design

Thursday, February 16th, 2017

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By Dave Lammers, Contributing Editor

It takes a range of skills to create a successful business in the Internet of Things space, where chips sell for a few dollars and competition is intense. Circuit design and software support for multiple wireless standards must combine with manufacturing capabilities.

Daniel Cooley, senior vice president of IoT products at Silicon Labs

Daniel Cooley, senior vice president and general manager of IoT products at Silicon Labs (Austin, Tx.), said three trends are impacting the manufacture of IoT end-node devices, which usually combine an MCU, an RF transceiver, and embedded flash memory.

“There is an explosion in the amount of memory on embedded SoCs, both RAM and non-volatile memory,” said Cooley. Today’s multi-protocol wireless software stacks, graphics processing, and security requirements routinely double or quadruple the memory sizes of the past.

Secondly, while IoT edge devices continue to use trailing-edge technologies, nonetheless they also are moving to more advanced nodes. However, that movement is partially gated by the availability of embedded flash.

Thirdly, pre-certified system-in-package (SiP) solutions, running a proven software stack, “are becoming much more important,” Cooley said. These SiPs typically encapsulate an MCU, an integrated antenna and shielding, power management, crystal oscillators, and inductors and capacitors. While Silicon Labs has been shipping multi-chip modules for many years, SiPs are gaining favor in part because they can be quickly deployed by engineers with relatively little expertise in wireless development, he said.

“Personally, I believe that very advanced SIPs increasingly will be standard products, not anything exotic. They are a complete solution, like a PCB module, but encased with a molding compound. The SiP manufacturers are becoming very sophisticated, and we are ready to take that technology and apply it more broadly,” he said.

For example, Silicon Labs recently introduced a Bluetooth SiP module measuring 6.5 by 6.5 mm, designed for use in sports and fitness wearables, smartwatches, personal medical devices, wireless sensor nodes, and other space-constrained connected devices.

“We have built multi-chip packages – those go back to the first products of the company – but we haven’t done a fully certified module with a built-in antenna until now. A SiP module simplifies the go-to-market process. Customers can just put it down on a PCB and connect power and ground. Of course, they can attach other chips with the built-in interfaces, but they don’t need anything else to make the Bluetooth system work,” Cooley said.

“Designing with a certified SiP module supports better data throughput, and improves reliability as well. The SiP approach is especially beneficial for end-node customers which “haven’t gone through the process of launching a wireless product in in the market,” Cooley said.

System-in-package (SiP) solutions ease the design cycle for engineers using Bluetooth and low low-energy wireless networks. (Source: Silicon Laboratories).

The SiP packages a wireless SoC with an antenna and multiple other components in a small footprint.

Control by voice

The BGM12x Blue Gecko SiP is aimed at Bluetooth-enabled applications, a genre that is rapidly expanding as ecosystems like the Amazon Echo, Apple HomeKit, and Google Home proliferate.

The BGM12x Blue Gecko SiP is aimed at Bluetooth-enabled applications

Matt Maupin is Silicon Labs’ product marketing manager for mesh networking products, which includes SoCs and modules for low-power Zigbee and Thread wireless connectivity. Asked how a home lighting system, for example, might be connected to one of the home “ecosystems” now being sold by Amazon, Apple, Google, Nest, and others, Maupin said the major lighting suppliers, such as OSRAM, Philips, and others, often use Zigbee for lighting, rather than Bluetooth, because of Zigbee’s mesh networking capability. (Some manufactures use Bluetooth low energy (BLE) for point-to-point control from a phone.)

“The ability for a device to connect directly relies on the same protocols being used. Google and Amazon products do not support Zigbee or Thread connectivity at this time,” Maupin explained.

Normally, these lighting devices are connected to a hub. For example, Amazon’s Echo and Google’s Home “both control the Philips lights through the Philips hub. Communication happens over the Ethernet network (wireless or wired depending on the hub).  The Philips hub also supports HomeKit so that will work as well,” he said.

Maupin’s home configuration is set up so the Philips lights connect via Zigbee to the Philips hub, which connects to an Ethernet network. An Amazon Echo is connected to the Ethernet Network by WiFi.

“I have the Philips devices at home configured via their app. For example, I have lights in my bedroom configured differently for me and my wife. With voice commands, I can control these lamps with different commands such as ‘Alexa, turn off Matt’s lamp,’ or ‘Alexa, turn off the bedroom lamps.’”

Alexa communicates wirelessly to the Ethernet Network, which then goes to the Philips hub (which is sold under the brand name Philips Hue Bridge) via Ethernet, where the Philips hub then converts that to Zigbee to control that actual lamps. While that sounds complicated, Maupin said, “to consumers, it is just magic.”

A divided IoT market

Sandeep Kumar, senior vice president of worldwide operations

IoT systems can be divided into the high-performance number crunchers which deal with massive amounts of data, and the “end-node” products which drive a much different set of requirements. Sandeep Kumar, senior vice president of worldwide operations at Silicon Labs, said RF, ultra-low-power processes and embedded NVM are essential for many end-node applications, and it can take several years for foundries to develop them beyond the base technology becoming available.

“40nm is an old technology node for the big digital companies. For IoT end nodes where we need a cost-effective RF process with ultra-low leakage and embedded NVM, the state of the art is 55nm; 40 nm is just getting ready,” Kumar said.

Embedded flash or any NVM takes as long as it does because, most often, it is developed not by the foundries themselves but by independent companies, such as Silicon Storage Technology. The foundry will implement this IP after the foundry has developed the base process. (SST has been part of Microchip Technology since 2010.) Typically, the eFlash capability lags by a few years for high-volume uses, and Kumar notes that “the 40nm eFlash is still not in high-volume production for end-node devices.”

Similarly, the ultra-low-leakage versions of a technology node take time and equipment investments, as well as cooperation from IP partners. Foundry customers and the fabless design houses must requalify for the low-leakage processes. “All the models change and simulations have to be redone,” Kumar said.

“We need low-leakage for the end applications that run on a button cell (battery), so that a security door or motion sensor, for example, can run for five to seven years. After the base technology is developed, it typically takes at least three years. If 40nm was available several years ago, the ultra-low-leakage process is just becoming available now.

“And some foundries may decide not to do ultra-low-leakage on certain technology nodes. It is a big capital and R&D investment to do ultra-low-leakage. Foundries have to make choices, and we have to manage that,” Kumar said.

The majority of Silicon Labs’ IoT product volume is in 180nm, while other non-IoT products use a 55nm process. The line of Blue Gecko wireless SoCs currently is on 90nm, made in 300mm fabs, while new designs are headed toward more advanced process nodes.

Because 180nm fabs are being used for MEMS, sensors and other analog-intensive, high-volume products, there is still “somewhat of a shortage” of 180nm wafers, Kumar said, though the situation is improving. “It has gotten better because TSMC and other foundries have added capacity, having heard from several customers that the 180nm node is where they are going to stay, or at least stay longer than they expected. While the foundries have added equipment and capital, it is still quite tight. I am sure the big MEMS and sensor companies are perfectly happy with 180nm,” Kumar said.

A testing advantage

IoT is a broad-based market with thousands of customers and a lot of small volume customizations. Over the past decade Silicon Labs has deployed a proprietary ultra-low-cost tester, developed in-house and used in internal back-end operations in Austin and Singapore at assembly and test subcontractors and at a few outside module makers as well. The Silicon Labs tester is much more cost effective than commercially available testers, an important cost advantage in a market where a wireless MCU can sell in small volumes to a large number of customers for just a few dollars.

“Testing adds costs, and it is a critical part of our strategy. We use our internally developed tester for our broad-based products, and it is effective at managing costs,” Kumar said.

Silicon as Disruptive Platform for IoT Applications

Monday, August 29th, 2016

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By Ed Korczynski, Sr. Technical Editor

Marie Semeria, chief executive officer of CEA-Leti (http://www.leti.fr/en), sat down with SemiMD during SEMICON West to discuss how the French R&D and pilot manufacturing campus—located at the foot of the beautiful French alps near Grenoble—is expanding the scope of it’s activities to develop systems solutions for the Internet-of-Things (IoT). Part-1 on hardware/software co-development was published last month.

Korczynski: Regarding ‘IoT’ applications, we expect that chips must be very low cost to be successful, and at the same time the ultimately winning solutions will be those that combine the best functionalities from different technology spaces each in a ‘sweet spot’ of cost to performance. It seems that being able to do it on SOI wafers could produce the right volumes.

Semeria: Yes. It could be enough.

Korczynski: Do you have any feel in advance for how much area of silicon is needed? Some small ADC, an 8-bit micro-controller, and RF components may be done in different processes and then integrated. Is it possible that the total area of silicon needed could be less than a square millimeter?

Semeria: Yes.

Korczynski: Well, if they are that small then we have to remember how many units we’d get from just a single wafer, and there are 24 wafers in a batch…

Semeria: One batch can be enough for one market, depending upon the application.

Korczynski: If this is the case, then even though the concept of purely-additive roll-to-roll processes are attractive, oddly they may be too efficient and produce more units than the world can absorb. If we can do all that we need to do with established silicon wafer fab technology creating ICs smaller than a square millimeter then it will be very cost-effective.

Semeria: Leti’s strategy is to keep the performance of solid-state devices, so not to go to organic electronics. Use silicon as the differentiator to lower the cost, add more functions, and then miniaturize all that can be miniaturized. In this way we are achieving integration of MEMS with small electronics in arrays as small as one millimeter square. When you deal with such small die you can put them inside of flexible materials, inside of a t-shirt and it’s no problem. So that’s our strategy to keep small silicon and put it in clothes, in shoes, in windows, in glasses, and all sorts of flexible materials. When you are thinning substrates for bonding, then the thinned silicon is very flexible.

Korczynski: In 1999 I worked for one of the first companies selling through-silicon via technology, and it was all about backside thinning so I’ve played with flexible wafers.

Semeria: So you know what I mean.

Korczynski: Around 50 microns and below as long as you etch away any grinding defects from the backside it is very strong and very flexible (Fig. 1). At 50 microns the chip is still thick enough to be easily picked-and-placed, but it’s flexible. Below 10 microns the wafer is difficult to handle.

FIGURE 1: 50 micron thin silicon wafers can be strong and very flexible. (Source: Virginia Semiconductor)

Semeria: To maintain the advantage of cost for different applications spaces, we are developing the ‘chiplet’ approach which means a network of chips. It starts with a digital platform, then you add an active interposer to connect different dice. For example you could have 28nm-node on the bottom and a 14nm-node chip on top for some specific function. Then you can put embedded memory and RF connected through the interposer, and it’s the approach that we promote for the first generation of multi-functional integration on digital. Very flexible, cost-effective.

Korczynski: This is using some sort of bus to move information?

Semeria: Yes, this will be an electronic bus for the first generation, as we recently announced. Then a photonics interposer could be used for higher-speed data rate in a future generation. We have a full roadmap with different types of integration schemes. So it’s a way to combine all with silicon. Everything is intended to be integrated into existing 300mm silicon facilities. Some weeks ago we presented the first results showing silicon quantum bits built on 300mm substrates, and fully compatible with CMOS processing. So it’s the way we are going, taking a very disruptive approach using the foundation of proven 300mm silicon processing.

Korczynski: Interesting.

Semeria: For example, regarding driving assistance applications we have to consider fusion integration of different sensors, and complete coverage of the environment with low power-consumption. For computing capacity we developed a completely disruptive approach, very different from Intel and very different from nVidia which use consumer products as the basis for automotive application products. Specifically for automotive we developed a new probabilistic methodology to avoid all of the calculations based on floating-point. In this way we can divide the computing needs of the device by 100, so it’s another example of developing just the right device for the right application adapted for the right environment. So the approach is very different in development for IoT instead of mainstream CMOS.

Korczynski: For automotive there’s such a requirement for reliability, with billions of dollars at stake in product recalls and potential lawsuits, the auto industry is very risk-averse for very good reasons. So historically they’ve always used trailing-edge nodes, and if you want to supply to them you have to commit to 10 or maybe 20 years of manufacturing, and yet we still want to add in advance functionalities. The impression I’ve gotten is that the 28nm FD-SOI platform is fairly ideal here.

Semeria: FD-SOI is very reliable and very efficient. That’s why when we showed our demonstrator at the recent DAC it’s based on the STMicroelectronics micro-controller. It’s very reliable and adaptable for automotive applications.

Korczynski: Is it at 28nm?

Semeria: No, about 40nm now. The latest generation is not needed, because we changed the algorithms so we didn’t need so much capacity in computing. In IoT there is space to use 40nm or 32nm down to 28nm. It’s a great space to use ‘old technologies’ and optimize them with the right algorithms, the right signal-processing, and the right security. So it’s very exciting for Leti because we have all of the key competencies to be able to handle the IoT challenge, and there is a great ability to make various integration schemes depending upon the application. There is a very large space to demonstrate, and to develop new materials.

Korczynski: Does this relate to some recent work I’ve seen from Leti with micro-cantilevers?

Semeria: Yes, this is the work we are doing with CalTech on micro-resonators (Fig. 2).

FIGURE 2: MEMS/NEMS silicon cantilever resonator capable of detecting individual adhered molecules, for integration with digital CMOS in a complete IoT sensing system. (Source: Leti)

Korczynski: Thank you very much for taking the time to discuss these important trends.

Semeria: It is a pleasure.

—E.K.

Test Protocols for the IoT

Tuesday, July 12th, 2016

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By Ed Korczynski, Sr. Technical Editor

The Internet-of-Things (IoT) will require components that can sense the world, process and store data, and communicate autonomously within a secured environment. Consequently, IoT devices must incorporate sensors, wireless communication at Radio Frequencies (RF), logic, and embedded memory. Integrated circuit (IC) chips for IoT applications will have to be created at low cost in High Volume Manufacturing (HVM) lines, for which there are unique challenges with design and test. Presto Engineering’s founder and president, Michel Villemain, spoke with the Show Daily about how his company’s test services can accelerate the time-to-market and reduce risk in creating new IoT chip products.

“We started 10 years ago, and were differentiated on RF,” explained Villemain. “We now have a good view on what test costs are in production for different chip functionalities. We focus on specific segments of the industry that are not the traditional ‘drivers’ such as SoCs and large digital chips.” Since most IoT devices are expected to use Over The Air (OTA, a.k.a. “wireless”) links, Presto’s expertise in RF test helps create a low-cost solution for customers.

“We see some general trends in this area,” said Villemain. “The first one in IoT is there is a lot of activity in determining proper protocols for communications, as the industry moves from using short-range private area networks to low-power wide-area-networks with range beyond 300 feet. The second trend which is not technical, is that more and more non-semiconductor companies such as ‘system houses’ will be designing chips to reduce costs and increase security.

“The need for security has been reported as one of the main issues in peoples’ minds preventing deployment of the IoT. When security has to be hardware related and implemented in the chip, the only easy way to enable it is with test,” confided Villemain. “Remember that security is not binary. There is a return-on-investment decision based on how easy would it be to break something and how much would it cost to prevent that breakage. There is somewhat of a consensus that hardware-based solutions provide more security for data traveling over a link, so what we are trying to do is lower the cost of adding security at the hardware level.”

For the test of a very large and complex device, all of the digital instructions are generated by the design tools. However, for a primarily analog device the digital is not the core of the design and not the core expertise of the design team. The Figure shows the workflow used by Presto to methodically manage the establishment of rigorous engineering and production flows for IoT ICs.

test protocols

“Provisioning” is defined as the use of embedded Non-Volatile Memory (NVM) such as Flash within a chip to be able to customize the functionality. If you need to test Flash cells and bake, then program the Flash and bake again before final test it calls for up to three probe insertions, so the type of NVM chosen can alter the text protocol needed.

At end end of last month, Presto announced a multi-year supply agreement with NAGRA—a Kudelski Group company in secure digital TV access and management systems—to provide supply chain management and production services for several of NAGRA’s key products in the Pay TV market. “We are delighted that NAGRA has placed trust in Presto to be its production partner for volume products,” said Michel Villemain, CEO, Presto Engineering. “Leveraging team and expertise acquired from INSIDE Secure in 2015, this is a natural complement to our strategy of deploying an independent subcontract back-end manufacturing and supply chain service for the secure card industry and IoT markets.”

IoT Demands Part 2: Test and Packaging

Friday, April 15th, 2016

By Ed Korczynski, Senior Technical Editor, Solid State Technology, SemiMD

The Internet-of-Things (IoT) adds new sensing and communications to improve the functionality of all manner of things in the world. Solid-state and semiconducting materials for new integrated circuits (IC) intended for ubiquitous IoT applications will have to be extremely small and low-cost. To understand the state of technology preparedness to meet the anticipated needs of the different application spaces, experts from GLOBALFOUNDRIES, Cadence, Mentor Graphics and Presto Engineering gave detailed answers to questions about IoT chip needs in EDA and fab nodes, as published in “IoT Demands:  EDA and Fab Nodes.” We continue with the conversation below.

Korczynski: For test of IoT devices which may use ultra-low threshold voltage transistors, what changes are needed compared to logic test of a typical “low-power” chip?

Steve Carlson, product management group director, Cadence

Susceptibility to process corners and operating conditions becomes heightened at near-threshold voltage levels. This translates into either more conservative design sign-off criteria, or the need for higher levels of manufacturing screening/tests. Either way, it has an impact on cost, be it hidden by over-design, or overtly through more costly qualification and test processes.

Jon Lanson, vice president worldwide sales & marketing, Presto Engineering

We need to make sure that the testability has also been designed to be functional structurally in this mode. In addition, sub-threshold voltage operation must account for non-linear transistor characteristics and the strong impact of local process variation, for which the conventional testability arsenal is still very poor. Automotive screening used low voltage operation (VLV) to detect latent defects, but at very low voltage close to the transistor threshold, digital becomes analog, and therefore if the usual concept still works for defect detection, functional test and @speed tests require additional expertise to be both meaningful and efficient from a test coverage perspective.

Korczynski:  Do we have sufficient specifications within “5G” to handle IoT device interoperability for all market segments?

Rajeev Rajan, Vice President of Internet of Things (IoT) at GLOBALFOUNDRIES

The estimated timeline for standardization availability of 5G is around 2020. 5G is being designed keeping three classes of applications in mind:  Enhanced Mobile Broadband, Massive IoT, and Mission-Critical Control. Specifically for IoT, the focus is on efficient, low-cost communication with deep coverage. We will start to see early 5G technologies start to appear around 2018, and device connectivity,

interoperability and marshaling the data they generate that can apply to multiple IoT sub-segments and markets is still very much in development.

Korczynski:  Will the 1st-generation of IoT devices likely include wide varieties of solution for different market-segments such as industrial vs. retail vs. consumer, or will most device use similar form-factors and underlying technologies?

Rajeev Rajan, Vice President of Internet of Things (IoT) at GLOBALFOUNDRIES

If we use CES 2016 as a showcase, we are seeing IoT “Things” that are becoming use-case or application-centric as they apply to specific sub-segments such as Connected Home, Automotive, Medical, Security, etc. There is definitely more variety on the consumer front vs. industrial. Vendors / OEMs / System houses are differentiating at the user-interface design and form-factor levels while the “under-the-hood” IC capabilities and component technologies that provide the atomic intelligence are fairly common. ​

Steve Carlson, product management group director, Cadence

Right now it seems like everyone is swinging for the fence. Everyone wants the home-run product that will reach a billion devices sold. Generality generally leads to sub-optimality, so a single device usually fails to meet the needs and expectations of many. Devices that are optimized for more specific use cases and elements of purchasing criteria will win out. The question of interface is an interesting one.

Korczynski:  Will there be different product life-cycles for different IoT market-segments, such as 1-3 years for consumer but 5-10 years for industrial?

Rajeev Rajan, Vice President of Internet of Things (IoT) at GLOBALFOUNDRIES

That certainly seems to be the case. According to Gartner’s market analysis for IoT, Consumer is expected to grow at a faster pace in terms of units compared to Enterprise, while Enterprise is expected to lead in revenue. Also the churn-cycle in Consumer is higher / faster compared to Enterprise. Today’s wearables or smart-phones are good reference examples. This will however vary by the type of “Thing” and sub-segment. For example, you expect to have your smart refrigerator for a longer time period compared to smart clothing or eyewear. As ASPs of the “Things”come down over time and new classes of products such as disposables hit the market, we can expect even larger volumes.​

Jon Lanson, vice president worldwide sales & marketing, Presto Engineering

The market segments continue to be driven by the same use cases. In consumer wearables, short cycles are linked to fashion trends and rapid obsolescence, where consumer home use has longer cycles closer to industrial market requirements. We believe that the lifecycle norms will hold true for IoT devices.

Korczynski:  For the IoT application of infrastructure monitoring (e.g. bridges, pipelines, etc.) long-term (10-20 year) reliability will be essential, while consumer applications may be best served by 3-5 year reliability devices which cost less; how well can we quantify the trade-off between cost and chip reliability?

Steve Carlson, product management group director, Cadence

Conceptually we know very well how to make devices more reliable. We can lower current densities with bigger wires, we can run at cooler temperatures, and so on.  The difficulty is always in finding optimality for a given criterion across the, for practical purposes, infinite tradeoffs to be made.

Korczynski:  Why is the talk of IoT not just another “Dot Com” hype cycle?

Rajeev Rajan, Vice President of Internet of Things (IoT) at GLOBALFOUNDRIES

​​I participated in a panel at SEMICON China in Shanghai last month that discussed a similar question. If we think of IoT as a “brand new thing” (no pun intended), then we can think of it as hype. However if we look at the IoT as as set of use-cases that can take advantage of an evolution of Machine-to-Machine (M2M) going towards broader connectivity, huge amounts of data generated and exchanged, and a generational increase in internet and communication network bandwidths (i.e. 5G), then it seems a more down-to-earth technological progression.

Nicolas Williams, product marketing manager, Mentor Graphics

Unlike the Dot Com hype, which was built upon hope and dreams of future solutions that may or may not have been based in reality, IoT is real business. For example, in a 2016 IC Insights report, we see that last year $63.4 billion in revenue was generated for IoT systems and the market is growing at about 20% CAGR. This same report also shows IoT semiconductor sales of over $15 billion in 2015 with a CAGR of 21.1%.

Jon Lanson, vice president worldwide sales & marketing, Presto Engineering

It is the investment needed up front to create sensing agents and an infrastructure for the hardware foundation of the IoT that will lead to big data and ultimately value creation.

Steve Carlson, product management group director, Cadence

There will be plenty of hype cycles for products and product categories along the way. However, the foundational shift of the connection of things is a diode through which civilization will only pass through in one direction.

IoT Demands Part 1: EDA and Fab Nodes

Thursday, April 14th, 2016

The Internet-of-Things (IoT) is expected to add new sensing and communications to improve the functionality of all manner of things in the world:  bridges sensing and reporting when repairs are needed, parts automatically informing where they are in storage and transport, human health monitoring, etc. Solid-state and semiconducting materials for new integrated circuits (IC) intended for ubiquitous IoT applications will have to be assembled at low-cost and small-size in High Volume Manufacturing (HVM). Micro-Electro-Mechanical Systems (MEMS) and other sensors are being combined with Radio-Frequency (RF) ICs in miniaturized packages for the first wave of growth in major sub-markets.

To meet the anticipated needs of the different IoT application spaces, SemiMD asked leading companies within critical industry segments about the state of technology preparedness:

*  Commercial IC HVM – GLOBALFOUNDRIES,

*  Electronic Design Automation (EDA) – Cadence and Mentor Graphics,

*  IC and complex system test – Presto Engineering.

Korczynski:  Today, ICs for IoT applications typically use 45nm/65nm-node which are “Node -3″ (N-3) compared to sub-20nm-node chips in HVM. Five years from now, when the bleeding-edge will use 10nm node technology, will IoT chips still use N-3 of 28nm-node (considered a “long-lived node”) or will 45nm-node remain the likely sweet-spot of price:performance?

Timothy Dry, product marketing manager, GLOBALFOUNDRIES

In 5 years time, there will be a spread of technology solutions addressing low, middle, and high ends of IoT applications. At the low end, IoT end nodes for applications like connected smoke

detectors, security sensors will be at 55, 40nm ULP and ULL for lowest system power, and low cost. These applications will be typically served by MCUs <50DMIPs. Integrated radios (BLE, 802.15.4), security, Power Management Unit (PMU), and eFlash or MRAM will be common features. Connected LED lighting is forecasted to be a high volume IoT application. The LED drivers will use BCD extensions of 130nm—40nm—that can also support the radio and protocol-MCU with Flash.

In the mid-range, applications like smart-meters and fitness/medical monitoring will need systems that have more processing power <300DMIPS. These products will be implemented in 40nm, 28nm and GLOBALFOUNDRIES’ new 22nm FDSOI technology that uses software-controlled body-biasing to tune SoC operation for lowest dynamic power. Multiple wireless (BLE/802.15.4, WiFi, LPWAN) and wired connectivity (Ethernet, PLC) protocols with security will be integrated for gateway products.

High-end products like smart-watches, learning thermostats, home security/monitoring cameras, and drones will require MPU-class IC products (~2000DMIPs) and run high-order operating systems (e.g. Linux, Android). These products will be made in leading-edge nodes starting at 22FDX, 14FF and migrating to 7FF and beyond. Design for lowest dynamic power for longest battery life will be the key driver, and these products typically require human machine Interface (HMI) with animated graphics on a high resolution displays. Connectivity will include BLE, WiFi and cellular with strong security.

Steve Carlson, product management group director, Cadence

We have seen recent announcements of IoT targeted devices at 14nm. The value created by Moore’s Law integration should hold, and with that, there will be inherent advantages to those who leverage next generation process nodes. Still, other product categories may reach functionality saturation points where there is simply no more value obtained by adding more capability. We anticipate that there will be more “live” process nodes than ever in history.

Jon Lanson, vice president worldwide sales & marketing, Presto Engineering

It is fair to say that most IoT devices will be a heterogeneous aggregation of analog functions rather than high power digital processors. Therefore, and by similarity with Bluetooth and RFID devices, 90nm and 65nm will remain the mainstream nodes for many sub-vertical markets, enabling the integration of RF and analog front-end functions with digital gate density. By default, sensors will stay out of the monolithic path for both design and cost reasons. The best answer would be that the IoT ASIC will follow eventually the same scaling as the MCU products, with embedded non-volatile memories, which today is 55-40nm centric and will move to 28nm with industry maturity and volumes.

Korczynski:  If most IoT devices will include some manner of sensor which must be integrated with CMOS logic and memory, then do we need new capabilities in EDA-flows and burn-in/test protocols to ensure meeting time-to-market goals?

Nicolas Williams, product marketing manager, Mentor Graphics

If we define a typical IoT device as a product that contains a MEMS sensor, A/D, digital processing, and a RF-connection to the internet, we can see that the fundamental challenge of IoT design is that teams working on this product need to master the analog, digital, MEMS, and RF domains. Often, these four domains require different experience and knowledge and sometimes design in these domains is accomplished by separate teams. IoT design requires that all four domains are designed and work together, especially if they are going on the same die. Even if the components are targeting separate dice that will be bonded together, they still need to work together during the layout and verification process. Therefore, a unified design flow is required.

Stephen Pateras, product marketing director, Mentor Graphics

Being able to quickly debug and create test patterns for various embedded sensor IP can be addressed with the adoption of the new IEEE 1687 IP plug-and-play standard. If a sensor IP block’s digital interface adheres to the standard, then any vendor-provided data required to initialize or operate the embedded sensor can be easily and quickly mapped to chip pins. Data sequences for multiple sensor IP blocks can also be merged to create optimized sequences that will minimize debug and test times.

Jon Lanson, vice president worldwide sales & marketing, Presto Engineering

From a testing standpoint, widely used ATEs are generally focused on a few purposes, but don’t necessarily cover all elements in a system. We think that IoT devices are likely to require complex testing flows using multiple ATEs to assure adequate coverage. This is likely to prevail for some time as short run volumes characteristic of IoT demands are unlikely to drive ATE suppliers to invest R&D dollars in creating new purpose-built machines.

Korczynski:  For the EDA of IoT devices, can all sensors be modeled as analog inputs within established flows or do we need new modeling capability at the circuit level?

Steve Carlson, product management group director, Cadence

Typically, the interface to the physical world has been partitioned at the electrical boundary. But as more mechanical and electro-mechanical sensors are more deeply integrated, there has been growing value in co-design, co-analysis, and co-optimization. We should see more multi-domain analysis over time.

Nicolas Williams, product marketing manager, Mentor Graphics

Designers of IoT devices that contain MEMS sensors need quality models in order to simulate their behavior under physical conditions such as motion and temperature. Unlike CMOS IC design, there are few standardized MEMS models for system-level simulation. State of the art MEMS modeling requires automatic generation of behavioral models based on the results of Finite Element Analysis (FEA) using reduced-order modeling (ROM). ROM is a numerical methodology that reduces the analysis results to create Verilog-A models for use in AMS simulations for co-simulation of the MEMS device in the context of the IoT system.

Functional Safety, Security for IoT Stressed at Cadence Event

Thursday, April 7th, 2016

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By Jeff Dorsch, Contributing Editor

Lip-Bu Tan, President and CEO, Cadence Design Systems

The “big trends” in the electronics industry are social, mobility, the Internet of Things, and security, Lip-Bu Tan, the president and chief executive officer of Cadence Design Systems, said Tuesday (April 5) in his keynote address at the CDNLive Cadence User Conference in Santa Clara, Calif.

He later touched on 5G wireless communications, Big Data, deep learning, and ultra-low-power devices, leading up to the concept of System Design Enablement, or SDE. “We have been changing the entire system design flow,” Tan told a capacity audience in the Santa Clara Convention Center’s Elizabeth A. Hangs Theatre.

The Cadence CEO described new products that have been introduced in the past year.

(The system design theme is also exemplified by the Electronic Design Automation Consortium renaming itself last month as the Electronic System Design Alliance.)

Tan was followed by Qualcomm CEO Steve Mollenkopf, who took “The Evolution of Connected Devices” as his theme.

“There’s tremendous innovation in front of us…providing technology at scale,” Mollenkopf said. Mobility and low-power technology are “disrupting multiple industries,” he added.

While growth in the smartphone market is slowing down, wider adoption of Long-Term Evolution communications and the introduction of augmented reality and virtual reality on handsets promise to buoy the smartphone business for years to come, according to Mollenkopf.

The description of automotive vehicles as “a phone on wheels” is not unjustified, the Qualcomm CEO observed. While the unit volume of the auto business is lower than smartphones and many electronics products, the process of adding connectivity and Internet service to cars is “just beginning,” he said.

While the IoT is “not the next savior for the [semiconductor] industry,” Mollenkopf said, the industrial IoT promises to generate valuable data for manufacturers. “We’re moving from discrete to integrated platforms,” he added.

Qualcomm CEO Steve Mollenkopf

Mollenkopf also addressed drone aircraft, 5G, and autonomous vehicles in his keynote.

Congratulating Cadence on its collaborations with Qualcomm, Mollenkopf concluded, “We need people to make it easy for us to use silicon.”

GlobalFoundries CEO Sanjay Jha was up next. He identified mobile computing, the IoT, and mission-critical/automotive applications as important considerations for the near future.

The IoT market could generate a low estimate of $3.9 trillion in the next decade, with high estimates topping out at $11.5 trillion, Jha said, citing IHS Technology, iSuppli, and other sources. The semiconductor industry could realize $50 billion to $75 billion in value from IoT-related products, “from chips to mini-systems,” he added.

GlobalFoundries, which last year acquired IBM Microlectronics, has identified several key technologies for its operations and foundry services: fully-depleted silicon-on-insulator, magnetic random-access memory, radio-frequency SOI and silicon germanium, system-in-package and other advanced packaging, FinFETs, and application-specific integrated circuits.

“Power consumption is the big differentiator,” Jha commented.

GlobalFoundries CEO Sanjay Jha

The 5-nanometer process node “will be a very expensive technology,” he said. Jha compared an extreme-ultraviolet lithography scanner (EUV technology is now expected to be production-ready for 5nm chips) to “a small Hadron Collider.”

The CDNLive Silicon Valley event was the first of 2016 for the EDA company. Similar conferences are scheduled this year for Germany, Korea, Japan, India, China, Taiwan, the eastern US (Boston), and Israel.

The Future Is Flexible and Printed

Friday, March 4th, 2016

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By Jeff Dorsch, Contributing Editor

Automotive electronics, the Internet of Things, wearable gadgets, and other emerging chip markets are also expected to provide growth for flexible electronics, which often share manufacturing processes and materials with semiconductors.

Such applications were the talk of this week’s 2016FLEX Conference & Exhibition in Monterey, Calif. Printed and hybrid electronics were also on offer in the technical presentations and the compact exhibition area on the mezzanine level of the Monterey Marriott, where the conference was held while the Monterey Conference Center across Del Monte Avenue undergoes a year-long reconstruction project.

The Monterey Marriott and the Monterey Conference Center. (Credit: Jeff Dorsch)

Autonomous vehicles, connected cars, and the IoT are driving demand and innovation in flexible, hybrid, and printed electronics, according to Harry Zervos, principal analyst and business development manager for North America at IDTechEx, the market research, business intelligence, consulting, and events firm.

These new forms provide the capability to “add electronics to more and more mundane things,” he noted.

IDTechEx estimates the printed, flexible, and organic electronics market was worth a total of $24.5 billion in 2015. Organic light-emitting diode displays accounted for the lion’s share, at $15.3 billion. While OLEDs typically are not printed electronics, they stand to lead to flexible displays in the future, according to IDTechEx.

Sensors, mostly glucose test strips, represented $6.6 billion in revenue last year, while conductive inks provided $2.3 billion during 2015.

The market research firm forecasts printed electronics will increase from $8.8 billion in 2015 to $14.9 billion in 2025. Products made on flexible substrates are projected to grow from $6.4 billion last year to $23.5 billion in the next decade.

Market researchers have predicted “billions of sensors” will be sold in the next few years, including sensors for smartphones, Zervos said.  Smartphones will be “becoming flexible, more robust, foldable,” he added.

He is looking ahead to a time of flexible sensors and perhaps flexible microelectromechanical system devices to enable those flexible phones.

Flexible, hybrid, and printed electronics will provide “innovation in form factors, allowing designers to come up with new ideas on what devices could look like,” Zervos said in an interview. Such innovation will lead to “more excitement, higher profit margins,” he added.

This will depend on “an interoperable ecosystem” between the mature semiconductor industry and the nascent flexible electronics industry, Zervos said.

Molex was among the exhibitors at this week’s conference. The company was acquired in late 2013 for $7.2 billion by Koch Industries. Nearly a year ago, Molex acquired certain assets of Silogie, a supplier of flexible and printed electronics for consumer goods, industrial, lighting, medical, and military applications.

During the technical program on Wednesday afternoon, John Heitzinger — Molex’s general manager of printed electronics — described products the company has developed for the structural health monitoring of advanced ammunition, building monitoring systems, and physiological monitoring, the last on behalf of the U.S. Air Force. In working on functionalized carbon nanotubes for detecting and sensing lactate, Molex collaborated with American Semiconductor, Brewer Science, and Northeastern University, he said.

Neil Morrison of Applied Materials WEB Coating presented Wednesday morning on “’Packaging’ of Moisture Sensitive Materials Used in New Form Factor Display Products.” He is manager of research and development in Energy & Environmental Solutions for the Applied Materials unit, based in Alzenau, Germany.

Applied has a 40-year history is supplying chemical vapor deposition equipment for semiconductor manufacturing, he noted, and now offers plasma-enhanced CVD for displays and roll-to-roll CVD for advanced flexible electronics.

For quantum dots and wearables, “you need a barrier solution,” especially multilayer barrier stacks, Morrison said.

He recommended PECVD for manufacturing with silicon nitride, and critical roll-to-roll CVD requirements for high-performance barrier films.

For high-volume manufacturing of roll-to-roll barriers, “process monitoring and control is key,” Morrison said.

Flexible, hybrid, and printed electronics are clearly becoming a big and growing market. How companies take advantage of this market opportunity may be critical to their future.

Identifying the Prime Challenge of IoT Design

Friday, December 18th, 2015

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By Jeff Miller, Product Marketing Manager, Mentor Graphics Corporation

Introduction

In his blog post for Semiconductor Manufacturing & Design, Pete Singer shared how the acquisition of Tanner EDA by Mentor Graphics provides a solution to meeting the design challenge of Internet of Things (IoT). Low-cost IoT designs, which interface the edge of the real world to the Internet, mesh together several design domains. Individually, these design domains are challenging for today’s engineers. Bringing them all together to create an IoT product can place extreme pressure on design teams. For example, let’s look at the elements of a typical IoT device (Figure 1).

Figure 1: A typical IoT device.

This IoT device contains a sensor and an actuator that interface to the Internet. The sensor signal is sent to an analog signal processing device in the form of an amplifier or a low-pass filter. The output connects to an A/D converter to digitize the signal. That signal is sent to a digital logic block that contains a microcontroller or a microprocessor. Conversely, the actuator is controlled by an analog driver through a D/A converter. The sensor telemetry is sent and control signals are received by a radio module that uses a standard protocol such as WiFi, Bluetooth, or ZigBee, or a custom protocol. The radio transmits data to the Cloud or through a smartphone or PC.

This device points out the prime challenge to IoT design: analog, digital, RF, and MEMS design domains all live together in one device. IoT design requires that all four design domains are designed and work together, especially if they are going on the same die. Even if the components are targeting separate dies that will be bonded together, designers still need to work together during the integration and verification process. In this design, there are several components in multiple domains, such as the A/D converter, digital logic, a RF radio, a MEMS sensor, and an analog driver that connects to an external mechanical actuator. The design team needs to capture a mixed analog and digital, RF, and MEMS design, perform both component and top-level simulation, layout the chip, and verify the components within the complete system.

The Tanner Solution

The Tanner solution delivers a top-down design flow for IoT design, unifying the four design domains (Figure 2).

Figure 2: The Tanner IoT design flow.

Whether you are designing a single die or multiple die IoT device, you can use this design flow for creating and simulating this device:

  • Capturing and simulating the design. S-Edit captures the design at multiple levels of abstraction for any given cell. Each cell can have multiple views such as a schematic, RTL, or SPICE and then you choose which view to use for simulation. T-Spice simulates SPICE and Verilog-A representations of the design while ModelSim simulates the digital, Verilog-D/RTL portions of your design.
  • Simulating the mixed-signal design. S-Edit creates the complete Verilog-AMS netlist and passes it to T-Spice. T-Spice automatically adds Analog/Digital connection modules and then partitions the design for simulation. T-Spice simulates the analog (SPICE and Verilog-A) and sends the RTL to ModelSim for digital simulation. Both simulators are invoked automatically and during simulation the signal values are passed back and forth between the simulators whenever there is a signal change at the analog/digital boundary. This means, that regardless of the design implementation language, you drive the simulation from S-Edit and the design is automatically partitioned across the simulators. Then, you can interact with the results using the ModelSim and T-Spice waveform viewers. Behavioral models of MEMS devices can be created in Verilog-A or as equivalent lumped SPICE elements that are simulated along with the digital models for system-level verification.
  • Laying out the design. The physical design is completed using L-Edit which allows you to create the layout of the analog and MEMS components for the IoT design. The parameterized layout library of common MEMS elements and true curve support simplify the MEMS layout.
  • Completing the flow. Of course, there are other steps in the flow, such as digital synthesis, digital place and route, chip assembly, physical verification, static timing analysis, and full system verification. However, these steps are beyond the scope of this discussion.

Implementing the MEMS Device

One of the most challenging aspects of IoT design is implementing the MEMS device. So, in this article we focus on the physical design flow for this device. Let’s say that the MEMS device in our design is a magnetic actuator. A magnetic actuator is comprised of a coil and a moving paddle. The paddle is suspended by a spring. When current is sent through the coil, a magnetic field is created which moves the paddle in and out of the coil field (Figure 3).

Figure 3: MEMS magnetic actuator.

You could create a 3D model of the magnetic actuator using a 3D analysis tool and then analyze its dynamic response to different currents. To fabricate the actuator you need a 2D layout mask and deriving a 2D mask from a 3D model is error-prone and difficult to validate. A better approach is to follow the mask-forward flow that Figure 4 shows, that results in more confidence that the actuator will not only work correctly but that it can be successfully fabricated.

Figure 4: The mask-forward MEMS design flow.

The mask-forward MEMS design flow starts by creating the 2D mask layout in L-Edit. Then, use the SoftMEMS 3D Solid Modeler (integrated within L-Edit) to automatically generate the 3D model from those masks and a set of specified fabrication steps. Perform 3D analysis using your favorite finite element tool and then iterate if you find any issues. Make the appropriate changes to the 2D mask layout and then repeat the flow. Using this mask-forward design flow, you can converge on a MEMS device that you are confident can be fabricated correctly because you creating the 3D model directly from the masks that will eventually be used for fabrication, rather than trying to work backwards from the 3D model.

Conclusion

The prime challenge of IoT design is working in four design domains: analog, digital, RF, and MEMS. The Tanner design flow is architected to seamlessly work across all of these design domains by employing an integrated design flow for design, simulation, layout, and verification.
For more information about the IoT design flow, see: www.mentor.com/tannereda/mems-design?cmpid=10167

Smart Rock Bolt Wins Prize at Designers of Things Conference

Monday, December 7th, 2015

By Jeff Dorsch, Contributing Editor

When it comes to Internet of Things products, most people would think of the Apple Watch or Fitbit fitness-tracking devices. A device aimed at the mining industry has proved to be a popular entry at the Designers of Things conference in San Jose, Calif.

The Smart Rock Bolt designed by Jens Eliasson of Sweden’s Lulea University of Technology and others, along with Eistec, on Wednesday (December 2) received first prize in the IPSO Challenge competition put on by the Internet Protocol for Smart Objects Alliance, an award worth $10,000.

The low-power device can be driven into the rock walls of mines, and its sensors can report on movement within the rock, which can potentially warn of a collapse. Through 6LoWPAN technology, a capability in Internet Protocol version 6, the rebar sensors communicate with a network gateway, relaying information to a central command post.

The sensitivity of the sensors allows for detection of the movements by miners and machinery, according to Professor Eliasson, which can help direct underground traffic and – in the case of a collapse – can pinpoint where people are.

He said the designers and developers of the Smart Rockbolt are in discussions with mining companies on a long-term testbed for the technology.

There is the possibility that other sensors could be integrated into the Smart Rock Bolt, such as smoke sensors and gas sensors, which could warn miners if poisonous gases are building up in the mineshaft and let them know when such gases have subsided to a safer level.

The IPSO Alliance had its own sprawling booth at the DoT exposition to demonstrate the 10 semi-finalist entries in the IPSO Challenge, all of which were aimed at touting the usefulness of Internet Protocol in the Internet of Things.

Nicholas Ashworth, an IPSO Alliance board member and treasurer who also served as co-chairman of this year’s IPSO Challenge, said the organization received dozens of entries from around the world for the competition, which is in its third year and is sponsored by Google, Atmel, and others. He and other judges met on the day before DoT conference opened to pick the winners.

Second place, with a prize of $5,000, went to EISOX’s Intelligent Thermostatic Radiator Valve, while third place (worth $2,500) was claimed by MicroPnP’s IoT platform.

The IPSO Alliance was founded in 2008, according to Ashworth. “We were basically promoting the Internet of Things before the Internet of Things,” he said.

Internet Protocol technology has “35 years of development” behind it, he noted, which offers advantages not currently available through ZigBee, Thread, and other IoT protocols. “It’s a protocol soup,” Ashworth commented.

Eliasson said he has been at LTU since 2003. “We were doing IoT with Bluetooth sensors,” he noted. The university group later moved on to IPv6 and 6LoWPAN. IP offers low-power capabilities and interoperability, he added.

“The mines have adopted IP,” Eliasson said. “They’re using VoIP [voice-over-Internet-Protocol). They jumped on the bandwagon.”

Mine operators are closely watching the development of 5G wireless networks, the professor added, since it can be used on normal mobile phones.

IoT Will Enable ‘Living Services,’ Keynote Speaker Says

Monday, December 7th, 2015

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By Jeff Dorsch, Contributing Editor

“It’s not about the sensors,” Nandini (Nan) Nayak, managing director of design strategy at Fjord, said Thursday morning (December 3) in a keynote address at the Designers of Things conference in San Jose, Calif.

Rather than talk about the Internet of Things, the subject of this two-day conference, Nayak addressed what she termed “Living Services” – the product of all those IoT sensors and processors, data centers, and cloud-based services.

Living services are “responsive to individual needs, contextually aware, and react in real-time,” she said. They “learn and evolve…as if they are alive.”

The “digitization of everything” creates “liquid expectations” among consumers and other users, Nayak asserted. “People’s expectations transcend expected boundaries,” she added.

The IoT involves “a shift of focus from designing for users and things to designing for people’s activities,” Nayak elaborated. “Everything is beginning to connect with each other.”

She added, “Sensors are cheap; they are able to be placed in many places.”

User interfaces are changing, Nayak noted, moving from computer screen-based interfaces to haptics and “touch-based interaction.”

She laid out the key characteristics of living services – the automation of low-maintenance decisions and actions, long-term learning from what people do, powered by data and analytics, collected from sensor-rich objects and interactions of daily life. “Think about environments, not industries,” Nayak advised.

“The IoT or living services will affect all aspects of our lives,” she asserted. “The home will be a key battleground.”

Personal health and shopping will be other areas where living services will have dramatic impacts, Nayak said.

How can businesses address living services? Nayak said the key points are: Know your customer; flex your technology; design in order to know and flex; and design to delight.

“Think about the value of the experience,” she asserted. “People expect the richness of experience, fun.”

Nayak concluded, “Prepare to atomize. Make your brand feel alive.”

Fjord was acquired in 2013 by Accenture, the global management consulting and technical services firm.

Nayak’s keynote was followed with a panel session moderated by Lucio Lanza of Lanza techVentures, a veteran technology investor and one-time executive at Daisy Systems, an early leader in electronic design automation that was acquired by Intergraph in 1990 and later absorbed into Mentor Graphics.

While the Internet connected computers and networks around the world, smartphones and other mobile devices are connecting people, Lanza noted.

Rather than the Internet of things or objects, it’s more correct to speak of “a world of things,” Lanza asserted, adding, “There are a lot of opportunities making this thing happen.”

Jack Hughes, the chairman and founder of TopCoder who also serves as chairman of the Christopher & Dana Reeves Foundation, showed part of a foundation video showing the benefits of epidural stimulation for people with paralysis.

“It’s not a cure,” he said of the technology. “These are early days. But it is extremely promising. Every one of these injuries is individual.” The foundation has supported the work of device designers, turning out the electrodes that can help paralyzed people move their limbs for the first time in years.

While the technology could deliver groundbreaking rehabilitation, “how do we make these things secure?” Hughes asked.

Mark Templeton of Scientific Ventures LLC, the co-founder of Artisan Components (acquired by ARM Holdings in 2004) and now a tech investor, talked about the Learning Thermostat from Nest Labs (now a Google subsidiary) and the business model behind the device, which can deliver data on its use to electrical utility companies to guide how and when they supply power to customers.

He urged IoT startups to “think about the business model more than the device itself.” He added, “The device is just the starting point.”

Ted Vucurevich of Enconcert, who once was the chief technology officer of Cadence Design Systems, said the IoT is bringing about a “transformation” in electronics, semiconductors, computing, and related industries. “It’s not about winning a socket,” he said, but “how you’re going to monetize the things you sell.”

He added, “There is consolidation and exploration. How can we allow these ecosystems to move forward? There’s a complete transformation coming.”

Noting his background in software, Hughes said, “When I hear ‘Internet of Things,’ I think ‘community.’ It’s a community of things. This is sort of a watershed moment.”

The panel, left to right: Ted Vucurevich, Mark Templeton, Jack Hughes, Lucio Lanza.

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