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Posts Tagged ‘Honeywell’

Molecular Modeling of Materials Defects for Yield Recovery

Monday, March 21st, 2016

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By Ed Korczynski, Sr. Technical Editor

New materials are being integrated into High Volume Manufacturing (HVM) of semiconductor ICs, while old materials are being extended with more stringent specifications. Defects within materials cause yield losses in HVM fabs, and engineers must identify the specific source of an observed defect before corrective steps can be taken. Honeywell Electronic Materials has been using molecular modeling software provided by Scienomics to both develop new materials and to modify old materials. Modeling allowed Honeywell to uncover the origin of subtle solvation-based film defects within Bottom Anti-Reflective Coatings (BARC) which were degrading yield in a customer’s lithographic process module.

Scienomics sponsored a Materials Modeling and Simulations online seminar on February 26th of this year, featuring Dr. Nancy Iwamoto of Honeywell discussing how Scienomics software was used to accelerate response to a customer’s manufacturing yield loss. “This was a product running at a customer line,” explained Iwamoto, “and we needed to find the solution.” The product was a Bottom Anti-Reflective Coating (BARC) organo-silicate polymer delivered in solution form and then spun on wafers to a precise thickness.

Originally observed during optical inspection by fab engineers as 1-2 micron sized vague spots in the BARC, the new defect type was difficult to see yet could be correlated to lithographic yield loss. The defects appeared to be discrete within the film instead of on the top surface, so the source was likely some manner of particle, yet filters did not capture these particles.

The filter captured some particles rich in silicon, as well as other particles rich in carbon. Sequential filtration showed that particles were passing through impossibly small pores, which suggested that the particles were built of deformable gel-like phases. The challenge was to find the material handling or processing situation, which resulted in thermodynamically possible and kinetically probable conditions that could form such gels.

Fig: Materials Processes and Simulations (MAPS) gives researchers access to visualization and analysis tools in a single user interface together with access to multiple simulation engines. (Source: Scienomics)

Molecular modeling and simulation is a powerful technique that can be used for materials design, functional upgrades, process optimization, and manufacturing. The Figure shows a dashboard for Scienomics’ modeling platform. Best practices in molecular modeling to find out-of-control parameters in HVM include a sequential workflow:

  • Build correct models based on experimental observables,
  • Simulate potential molecular structures based on known chemicals and hierarchical models,
  • Analyze manufacturing variabilities to identify excursion sources, and
  • Propose remedy for failure elimination.

Honeywell Electronic Materials researchers had very few experimental observables from which to start:  phenomenon is rare (yet effects yield), not filterable, yet from thermodynamic hydrolysis parameters it must be quasi-stable. Re-testing of product and re-examination of Outgoing Quality Control (OQC) data at the Honeywell production site showed that the molecular weight of the product was consistent with the desired distribution. There was also an observed BARC thickness increase of ~1nm on the wafer associated with the presence of these defects.

Using the modeling platform, Honeywell looked at the solubility parameters for different small molecular chains off of known-branched back-bone centers. Gel-like agglomerations could certainly be formed under the wrong conditions. Once the agglomerations form, they are not very stable so they can probably dis-aggregate when being forced through a filter and then re-aggregate on the other side.

What conditions could induce gel formation? After a few weeks of modeling, it was determined that temperature variations had the greatest influence on the agglomeration, and that variability was strongest at the ~250°K recommended for storage. Storage at 230°K resulted in measurably worse agglomeration, and any extreme in heating/cooling ramp rate tended to reduce solubility.

Molecular modeling was used in a forensic manner to find that the root cause of gel-like defects was related to thermal history:

*   Thermodynamics determined the most likely oligomers that could agglomerate,

*   Temperature-dependent solubility models determined which particles would reach wafers.

Because of the on-wafer BARC thickness increase of ~1nm, fab engineers could use all of the molecular modeling information to trace the temperature variation to bottles installed in the lithographic track tool. The fab was able to change specifications for the storage and handling of the BARC bottles to bring the process back into control.

The Week in Review: February 14, 2014

Friday, February 14th, 2014

Worldwide silicon wafer revenues declined by 13 percent in 2013 compared to 2012 according to the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry. Worldwide silicon wafer area shipments increased 0.4 percent in 2013 when compared to 2012 area shipments.

Silicon wafer area shipments in 2013 totaled 9,067 million square inches (MSI), slightly up from the 9,031 million square inches shipped during 2012. Revenues totaled $7.5 billion down from $8.7 billion posted in 2012. “Annual semiconductor silicon shipment levels have remained essentially flat for the past three years,” said Hiroshi Sumiya, chairman of SEMI SMG and general manager of the Corporate Planning Department of Shin-Etsu Handotai Co., Ltd. ”However, industry revenues have declined significantly for the past two years.”

Rudolph Technologies, Inc. announced this week the sale of its first NSX 320 TSV Metrology System to CEA-Leti, a research organization based in Grenoble, France, which, in the frame of the Nanoelec Research Technology Institute (Nanoelec RTI) program, is developing three-dimensional integrated circuit (3DIC) technologies that use through silicon vias (TSVs) to conduct signals among vertically-stacked chips. The new NSX 320 TSV system includes integrated 3D metrology that enables specialized measurements critical to the TSV process.

Honeywell announced today that it has introduced new RadLo low alpha plating anodes based on proprietary technology to help reduce alpha particle radiation that can lead to data errors in semiconductors. The new plating anodes for semiconductor packaging wafer bumping applications expand Honeywell’s RadLo offerings and employ proprietary Honeywell metrology and refining techniques.

At this week’s International Solid State Circuits Conference (ISSCC2014), imec and Holst Centre, together with Olympus, demonstrated a low-power single channel implantable electrocardiography (ECG) acquisition chip with analog feature extraction, which enables precise monitoring of the signal activity in a selected frequency band. Leadless Pacemakers with ultra-small size and ultra-low power consumption are emerging, improving analysis and clinical research of the intra-cardiac rhythm, and as a result, improving patients’ quality of life. The new low-power ECG acquisition chip advances the state-of-the-art by consuming only 680nA when all features are active, and also provides competitive performance, such as input SNR>70dB, CMRR >90dB, PSRR >80dB without any external passive components. By equipping an ultra-low power analog feature extractor, the new chip is capable of assisting digital signal processor platforms for the implementation of low-power heartbeat detection algorithms.

SPTS Technologies, a supplier of advanced wafer processing solutions for the global semiconductor industry and related markets today announced the opening of a new office in Korea. The new SPTS Korea office is situated in Pangyo and will be the central base of operations for sales, field process and engineering staff. The new facility will also carry essential and critical spares inventory to support SPTS’ system installed base.

Fujitsu Laboratories Ltd. and imec Holst Centre this week announced that they have developed a wireless transceiver circuit for use in body area networks (BAN) for medical applications that adheres to the 400 MHz-band  international standard. While the subject of high expectations for medical applications, wireless monitoring of brainwaves or other vital signs has in the past required over a dozen milliwatts (mW) of electric power. Now, however, by optimizing the architecture and circuitry, Fujitsu Laboratories and imec Holst Centre have succeeded in reducing the electric power requirements of wireless transceiver front-ends, to just 1.6 mW when receiving data and 1.8 mW when transmitting.


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