By Mark LaPedus
Enterprise-based bring your own device (BYOD) programs continue to become more commonplace. In fact, 38% of companies expect to stop providing devices to workers by 2016, according to a global survey of CIOs by Gartner.

What would happen if half of all global DRAM production, two-thirds of NAND flash manufacturing and 70% of the world’s tablet display supply suddenly disappeared from the market? For high-tech companies, this could be the outcome if current tensions escalate to the point of war on the Korean peninsula, resulting in the disruption of South Korea’s technology manufacturing base, says IHS iSuppli.

Intel telegraphed its future directions. The chip giant has named Brian Krzanich as its next chief executive, succeeding Paul Otellini. Krzanich, Intel’s chief operating officer since January 2012, will become the sixth CEO in Intel’s history. As announced, Otellini will step down as CEO. In a research note, Hans Mosesmann, an analyst with Raymond James, said: “We are not entirely shocked by the news but note that some investors preferred an external option on the belief that new blood was needed. Giving Krzanich’s manufacturing background we think the appointment is an indication that Intel will continue Paul Otellini’s strategy of building bigger/better fabs to attack the market. We also believe the move toward better manufacturing processes (like the 450mm transition) will remain front and center.” Added RBC Capital analyst Doug Freedman: “The move to appoint Renee James (as president) is likely in support of the vision of Krzanich’s and the board has laid out for the future of Intel. This appointment validates the increasing importance of on-going software development to Intel’s future, whether it be internally or in collaboration with partners.”

Microsemi has inked a foundry deal with Intel. Microsemi is currently engaged with customers and has started designs utilizing Intel’s 22nm tri-gate technology. Product delivery is anticipated to begin in late 2014 to early 2015.

Infineon and GlobalFoundries announced a joint technology development and production agreement for 40nm embedded flash (eFlash) process technology. The cooperation will focus on technology development based on Infineon’s eFlash cell design and manufacturing of automotive and security microcontrollers with 40nm process structures.

GlobalFoundries has collaborated with Cadence to provide pattern classification data for manufacturing processes of 20nm and 14nm. GlobalFoundries is using the Cadence Pattern Classification and Pattern Matching Solutions.

SEMI announced that Philip Yeo, chairman of Spring Singapore, and Lee Kok Choy, country manager of Micron Technology Singapore, have been voted by the SEMI Singapore Regional Advisory Board as recipients of two prestigious awards recognizing their contributions to the development and success of the Southeast Asian semiconductor industry. The awards will be presented during festivities held at Semicon Singapore 2013 on May 7.

Soitec has finalized a ZAR 1,000,000,000 (more than $100 million) solar financing bond issued by CPV Power Plant No.1 Bond SPV, an affiliate of Soitec Solar GmbH. The bonds will finance the construction of a 44 MWp utility-scale concentrator photovoltaic (CPV) solar power plant in Touwsrivier, South Africa.

Applied Materials and The Center for Science Teaching and Learning (CSTL) announced the San Francisco Bay Area grand-prize winning team and nine finalist teams in the 2013 Clean Tech Competition.

Rudolph has purchased selected assets related to 3D metrology from Tamar Technology.

Proteus Digital Health has completed a second closing of its Series F financing, raising $62.5 million in total. New corporate investor Oracle joins Otsuka, Novartis, Sino Portfolio and others in this funding round. Proteus is working to create a new category of products. Called Digital Medicines, these new pharmaceuticals will contain a tiny sensor that can communicate, via a digital health feedback system, vital information about an individual’s medication-taking behavior and how their body is responding.

Is Mindspeed Technologies on the block? The supplier of semiconductor solutions for communications has retained Morgan Stanley as a financial advisor to assist the board in evaluating various strategic alternatives available to the company.

Spansion has acquired the microcontroller and analog business of Fujitsu Semiconductor for approximately $110 million, plus approximately $65 million for inventory.

Amkor Technology announced that Stephen Kelley has been appointed to serve as president and CEO. He succeeds Ken Joyce, who previously announced his intention to retire.

ASE remained the world’s largest OSAT in 2012, according to the new rankings from Gartner.

By Mark LaPedus

For years, the DRAM industry has been engulfed in a downturn. Sadly, vendors have grown accustom to overcapacity, falling ASPs and losses. Now, the tide is turning, at least based on the data from Micron Technology. Micron posted a loss this week, but the company provided some surprising and welcomed news about DRAMs. “Despite a weak PC environment and more DRAM capacity from the revised Inotera agreement, Micron is allocating DRAM to some channel and OEM customers. DRAM capacity continues to go offline or transition to NAND, and Micron envisions no new capacity coming online in either 2013 or 2014. This suggests to us that the recent ASP dynamic is here to stay,” said Hans Mosesmann, an analyst with Raymond James. Another chip analyst, Jagadish Iyer of Piper Jaffray, said: “Micron articulated that DRAM capacity likely remains constrained for the next two years as near-term allocation prevails.”

What about NAND flash? “We expect industry supply to be far more rational than years past. Expect NAND ASP trends to strengthen through 2Q ‘13 with handset ramps pending,” said Doug Freedman, an analyst with RBC Capital Markets. Added Monika Garg, an analyst with Pacific Crest: “During our meetings with semiconductor capital equipment companies last month, all companies highlighted that they have not yet received any NAND capacity orders. These comments lend conviction that we should see strong NAND supply-demand balance in 2013.”

Richard Hill, the former chairman and CEO of Novellus, is back in the news. Hill, an outspoken executive who left Novellus after it was acquired by Lam, is leading a committee of independent directors for troubled Tessera. The committee is refocusing Tessera’s DigitalOptics unit. This follows a move by an investment firm to oust Tessera’s CEO and the board.  This week, the board began a search for a new chief executive to replace Robert A. Young, who was ousted. And Hill is the new chairman.

The Saratoga County Industrial Development Agency has approved about $387 million in sales tax exemptions for GlobalFoundries, according to the Saratogian. The tax breaks are for an R&D center and a proposed fab in New York.

In a blog, an investment site discusses its price estimates for Applied Materials. It also gives a fair and balanced analysis of the company.

RF Micro Devices will phase out manufacturing in its Newton Aycliffe, U.K.-based GaAs pHEMT facility and transition most GaAs manufacturing to its GaAs HBT manufacturing facility in Greensboro, N.C. RFMD will also partner with leading GaAs foundries for additional capacity. The U.K.-based GaAs pHEMT facility had been RFMD’s primary source for cellular switches. However, RFMD has transitioned to higher-performance, lower-cost silicon-on-insulator (SOI) technology for the cellular switch.

North American-based manufacturers of semiconductor equipment posted a book-to-bill ratio of 1.10 in February, according to SEMI. This compares to a ratio of 1.11 in January.

SEMI has released the 4th edition of the International Technology Roadmap for PV (ITRPV), the global collaborative process that informs PV cell, module and system manufacturers, equipment and materials suppliers, and other industry stakeholders on key technology trends in the solar field.

Mentor Graphics and Mercedes-Benz Trucks announced the application of the Mentor Capital software suite to the development of Daimler’s flagship heavy truck, the new Actros.

TEL’s Q3 orders were up 27%, above the firm’s original guidance of “slightly up,” according to Chips and Dips, a blog site.

Golden Gate Capital, a venture capital firm, recently sold its e-beam company, Vistec, to two different companies. In one transaction, Raith recently acquired Vistec’s Gaussian e-beam unit, called Vistec Lithography. Vistec Lithography continues to specialize in conventional direct-write applications in the aerospace and military arena. In a separate move, the Heidenhain Group recently acquired Vistec’s variable shaped beam (VSB) e-beam unit. That operation, Vistec Electron Beam, sells a single-beam e-beam tool based on VSB technology.

Samsung’s new Galaxy S4 smartphone is causing a buzz. In a blog DisplaySearch answered a pressing question: How Did Samsung achieve full HD in the AMOLED display?

Spansion and XMC, a Chinese foundry, announced an expanded partnership to develop and manufacture Spansion’s 32nm NOR flash memory. The agreement expands XMC’s current 300mm manufacturing of Spansion’s 65nm and 45nm flash memory technology.

VLSI Research is raising its 2013 fab tool growth forecast to minus 4.6%. Previously, the 2013 forecast was minus 5.3%. “Memory suppliers are beginning to loosen their purse strings. The orders are technology buys. Capacity expansions are not in the radar. Foundry is cooling due to the pull back by Apple along with some inventory buildups,” according to the firm.

Global PC shipments were expected to decline by 7.7% in the first quarter, according to IDC. However, IDC’s February monthly data suggest that the market could see a drop touching double-digits in the first quarter, according to the firm.

A predicted surge of smaller, lower-priced devices in the tablet market has led IDC to increase its 2013 forecast for the worldwide tablet market to 190.9 million, up from its previous forecast of 172.4 million units.

Samsung catapulted to the top of the optoelectronics supplier ranking in 2012 from 12th place in 2011 after it gained full ownership of Samsung LED, a 50-50 joint venture in light-emitting diodes that was created in 2009 between Samsung Electronics and affiliate Samsung Electro-Mechanics, according to IC Insights.

By Mark LaPedus
The insatiable thirst for more bandwidth in smartphones, tablets and other devices has prompted an industry standards body to revamp its mobile memory interface roadmap.

As part of the changes, the Joint Electron Devices Engineering Council (JEDEC) has scaled back the initial version of Wide I/O technology and pushed out the introduction date of a true 3D stacked architecture until 2015.

In the previous roadmap, mobile DRAMs were supposed to follow a simple progression from the conventional LPDDR2 to the LPDDR3 interface standards. Then, in 2013, the mobile industry was originally supposed to make a giant leap to Wide I/O, a 3D technology using through-silicon vias (TSVs).

Now, in JEDEC’s new roadmap, the industry will extend LPDDR3 with a new DRAM interface standard called LPDDR3E. After LPDDR3E, the industry will follow two simultaneous paths with a pair of new standards: LPDDR4 and Wide I/O-2. Devices built around 2D-based LPDDR4 and 3D-enabled Wide I/O-2 are due out in 2015. The first Wide I/O standard is still on JEDEC’s roadmap, but the devices are expected to be limited and mere point products.

The changes in the roadmap reflect the need to address the current and future bandwidth bottleneck issues in mobile devices. It also confirms the industry is still struggling to develop stacked 3D chips due to cost and technical issues. “It will take more time to sort out (3D issues like Wide I/O) than what people originally thought,” said Pat Moran, memory program manager at Qualcomm, at a recent JEDEC event.

The resistivity problems in planar devices have fueled the development of stacked 3D chips, whether those TSVs run through a die or a separate interposer die in so-called 2.5D chips. In either case, stacking is a viable way to circumvent the resistance-capacitance (RC) problems. But advanced chip stacking has a multitude of challenges and is still a few years away from mass production.

The industry is making progress in terms of reducing the manufacturing costs, and the technical hurdles, for 3D chips, said Niranjan Kumar, product marketing manager for TSV programs at Applied Materials. But when the 3D chips actually hit the market, there is still a perception that the cost of devices will be prohibitively expensive, Kumar said.

A brief history of Wide I/O
Not long ago, the big memory houses mainly focused on selling commodity DRAMs for PCs and servers. But for some time, DRAM makers have been engulfed in a prolonged downturn amid a slump for PCs. And the rapid rise of smartphones and tablets has prompted memory makers to put more emphasis on mobile DRAMs, which are specialty DRAMs with low power features.

In a sign of the growing importance of these parts, mobile DRAM represented 26% of all DRAM sales in the second quarter of 2012, compared to 19% in the like period a year ago, and 11% two years ago, according to IHS iSuppli. Average DRAM content in smartphones will expand to 666 megabytes (MB) this year, up from 453MB in 2011 and 202MB in 2010, according to the firm.

“As smartphones become more sophisticated, memory usage in the devices continues to rise, not only to satisfy user wants and needs, but also to accommodate demands made by ever-more powerful processors and increasingly refined LCD screens,” said Clifford Leimbach, an analyst at IHS iSuppli.

To keep up with the bandwidth requirements in portable systems, OEMs have migrated from mobile DRAMs based on the LPDDR1 interface standard to LPDDR2 technology. LPDDR1 has a data rate of 1.6-GB/s, while LPDDR2 runs at 4.3-GB/s.

In 2008, there were fears that LPDDR2 would run out of steam. So, at the time, the industry pushed a 3D architecture called Wide I/O. Wide I/O was a 4-channel scheme with a data rate of 17.2 GB/s. In the original roadmap, the goal was to stack the devices using TSVs.

Then, in 2010, the mobile market turned upside down, when a new class of smartphones and tablets emerged. Suddenly, Wide I/O, which was originally targeted for high-end smartphones, could only address limited mobile applications. “Wide I/O wasn’t going to cover the entire mobile space,” Moran said.

What’s next?
As a result, the industry saw an urgent need to fill a gap between LPDDR2 and Wide I/O. Starting in 2010, JEDEC and its members began to work on 2D-based LPDDR3, an extension of LPDDR2 that operates at speeds up to 12.8-GB/s in a dual channel mode.

Today, Hynix, Micron and Samsung are sampling their respective LPDDR3 mobile DRAMs. Instead of LPDDR3, some OEMs are opting for a low-power version of a desktop DRAM, dubbed DDR3L. OEMs are expected to migrate towards both technologies in 2013.

Needless to say, the industry must go beyond LPDDR3. The explosion of video, games and other technology in the mobile environment is driving the need for 4G LTE networks. “The bandwidth requirements are steep,” said Jung-Yong Choi, senior product planning manager at Samsung. “We need to react quickly.”

In response, JEDEC has unveiled a new, three-step plan. In the first step, the industry has devised LPDDR3E, an extension to LPDDR3 that has a data rate of 17-GB/s in a dual-channel mode at 1.2 volts.

Following LPDDR3E, the industry will follow two simultaneous avenues. It will take another evolutionary and safe path with 2D-based LPDDR4. It also will pursue the more revolutionary path with 3D-based Wide I/O-2. “Both candidates will have their own positions in the mobile industry,” Choi said.

LPDDR4-based mobile DRAMs, which require more space, are aimed at tablets. LPDDR4 will have 25.6-GB/s data rates and operate at 1.1 Volts. LPDDR4 will have 2-channels per die and 8-banks per channel. The LPDDR4 specification is due out by December of 2013. LPDDR4-based mobile DRAMs are expected in the first half of 2015.

Wide I/O-2 has the same specification and product roll out target dates as LPDDR4. Aimed for smartphones, Wide I/O-2 will launch in two phases. The first devices will have a 25.6-GB/s data rate, followed by parts at 51.2-GB/s.

Wide I/O-2 resembles the same architecture as the original Wide I/O scheme. It will stack memory on a logic controller and will connect them using TSVs. Wide I/O-2 will consist of four channels per die, x64 I/Os per channel (25.6-GB/s) and x128 I/Os per channel (51.2-GB/s). However, the industry is still debating the other specifications, such as the number of banks, page sizes, AC/DC parameters, pad order, pin description, addressing and command protocols.

In theory, LPDDR4 will have a power efficiency of 1 Watt at 25.6-GB/s. In terms of power, Wide I/O-2 is expected to be 50% to 60% lower than LPDDR4, Choi said. “Efficiency of CPU frequency could be improved largely by active heat dissipation,” he said.

One question still lingers, though: What ever happened to the original Wide I/O technology? Surprisingly, memory vendors insist the original Wide I/O devices will soon hit the market. If or when Wide I/O appears, the niche-oriented parts will likely be single-die solutions using micro-bumps, and not TSVs.

In fact, when the industry originally pushed for Wide I/O in 2008, it underestimated the challenges in developing 3D technology. The industry still faces many of the same problems today. TSV technology remains immature. It’s unclear how to deal with the thermal issues, and 3D test and the overall supply chain are not yet ready for prime time.

Cost is still a problem, as well. An applications processor based on conventional package-on-package (PoP) technology may run $28 each. If the same device was configured with a Wide I/O scheme, it could cost about $50, according to some experts. The cost of the substrate, coupled with the TSV production process, “eliminates the product margins for consumer applications,” said Pol Marchal, director of R&D at IMEC’s India unit. In fact, the TSV creation process is 40% or more of the total cost for a 3D device, Marchal said.

Applied’s Kumar disagreed, saying that the industry has reduced the cost for the TSV creation process. Many blame high 3D chip costs on the temporary bonding/debonding, test and other process steps.

There are a number of process steps to make a 3D chip. In the via creation process alone, there are five main manufacturing steps: etch, chemical-vapor deposition (CVD), physical-vapor deposition (PVD), electroplating, and chemical mechanical polishing (CMP).

Two years ago, the overall manufacturing cost-of-ownership (COO) for making a 5μ x 50μ TSV was about $150, Kumar said. Today, the COO is about $50, he said. “I think it will continue to drop,” he added.

Sunil Patel, principal member of the technical staff for package technology at GlobalFoundries, recently summarized the situation. “There are many issues we need to work through, such as how do you handle thin wafers once they are shipped, how do you test them and ensure known good dies,” he said. “If those wafers are packaged, that’s not a problem. If they’re not, how do you ensure the known good die? Also, with memory, the key integration is logic plus memory. In that case, the co-design of different die comes into the picture.”

By Mark LaPedus

IC makers have been looking at the electric vehicle industry for growth. So whatever happened to the electric car? Toyota has scaled back the sales targets for its electric car. According to Lux Research, the head of Toyota’s vehicle development gave a vote of no confidence for the technology, by saying the “capabilities of electric vehicles do not meet society’s needs.” Meanwhile, Tesla Motors recently lowered its sales targets. Another car maker, Nissan, is offering big discounts on the Leaf because of slow sales. GM’s Chevy Volt has struggled to win customers, even though it’s not purely electric. And Fisker Automotive, which uses the same approach as Chevy, has experienced an assortment of problems.

At the 2012 IEEE International Electron Devices Meeting (IEDM), slated for Dec. 10-12 in San Francisco, Applied Materials and Synopsys are expected to submit a paper entitled, “Is strain engineering scalable in FinFET era? Teaching the old dog some new tricks.” “Strain technology has been a key enabler for improving transistor performance in the past decade. With the industry moving toward a 3-D FinFET structure from a planar MOSFET, the corresponding implications on stressor design needs to be analyzed afresh due to strong orientation dependence of stress enhancements,” according to the IEDM abstract from the companies. “In this work we have tried to address both issues; stressor design for FinFETs and scalability of corresponding stress enhancements. We found that the S/D epi remains an effective and scalable source of strain engineering for FinFETs. Contact and gate metals provide new knobs for engineering strain in FinFETs and remain effective with conservative scaling of contact/gate CD.”

Altatech, a subsidiary of Soitec, has introduced a multi-chamber chemical vapor deposition (CVD) system that enables photovoltaic (PV) cell manufacturers to develop and optimize their solar cell designs using advanced thin-film deposition of amorphous silicon and other materials. By performing all deposition processes within a single system, the new AltaCVD Solarlab tool reduces cycle times and materials consumption in fabricating advanced single-junction, tandem-junction and triple-junction PV cells.

GlobalFoundries is preparing to build a three-story, 565,000-square-foot manufacturing research center, according to a report.

While over-capacity continues to plague the global solar industry, the Taiwan PV industry is operating at high-capacity, according to SEMI.

SVTC Technologies is struggling and has apparently cut workers, according to reports, which added that the R&D foundry is mulling plans to close its sites in Austin, Texas and San Jose.  Multiple sources say SVTC may completely shut down. In an e-mail, SVTC declined to comment on the reports. A spokesman for Oak Hill Capital declined to comment. Oak Hill is an investor in SVTC. In 2007, Cypress sold its R&D fab unit to Oak Hill and Tallwood Venture for approximately $53 million. SVTC became a “lab-to-fab” facility aimed at third-party engineering groups.

As it turns out, Tezzaron Semiconductor has signed a contract to purchase the assets of a semiconductor technology development and wafer fabrication facility in Austin, Texas, previously run by SVTC. Tezzaron will continue the operations of this facility while adding capabilities to assemble its own 3D devices.

Struggling Renesas has obtained a $6 billion bailout from various banks. The chipmaker announced the execution of an agreement of a syndicate loan, with Mizuho, The Bank of Tokyo-Mitsubishi UFJ, Sumitomo Mitsui Trust Bank and Mitsubishi UFJ Trust and Banking Corporation.

Sharp has obtained a syndicated loan as it struggles to find investors.

For its 2012 fiscal year, Micron reported a net loss of $1.03 billion. C.J. Muse, an analyst with Barclays, said: “While Micron was hesitant to provide any speculative commentary around the potential Elpida acquisition, management did note that the deal is expected to close in [the first half of calendar year 2013].”

The JEDEC Solid State Technology Association has announced the initial publication of its Synchronous DDR4 standard.

Intel and its OEM partners unveiled the first wave of new tablets and tablet convertible designs based on Intel processors, including the new Atom Z2760, formerly codenamed “Clover Trail.”

Samsung’s foundry business has been selected by STMicroelectronics to provide it with products at the 32/28nm process node.

X-Fab plans to invest more than $50 million in its MEMS operations over the next three years.

Diodes plans to acquire Power Analog Microelectronics.

Gartner says Windows 8 is a big gamble Microsoft must make to stay relevant.

IC Insights believes that the more profitable foundries will be those that keep at the leading-edge of the process technology roadmap.

The average amount of DRAM in each smartphone shipped worldwide is expected to surge by nearly 50 percent this year, according to iSuppli.

By Mark LaPedus
Ten years ago, Intel Corp. declared that flash memory would stop scaling at 65nm, prompting the need for a new replacement technology.

Thinking the end was near for flash, a number of companies began to develop various next-generation memory types, such as 3D chips, FeRAM, MRAM, phase-change memory (PCM), and ReRAM. Many of these technologies were originally billed as “universal memories.” By definition, a “universal memory” is a single product that could replace all four conventional memory types: DRAM, NAND, NOR and SRAM.

As it turned out, conventional memory has scaled much further than previously thought, pushing out the need for the next-generation technologies. And, in fact, most next-generation memory types are still in R&D. They are expensive to make and difficult to scale.

While there is a frenzy of activity in next-generation memories, the rhetoric surrounding the “universal memory” is fading. Because of the complexity and soaring I/O requirements in today’s systems, there is no single next-generation memory type that has the cost benefits of DRAM, the speed of SRAM, and the non-volatility of flash.

“It is unlikely that we will see a universal memory,” said Gill Lee, a senior director and principal member of the technical staff at Applied Materials. “I do not see a new memory type can replace both NAND and DRAM.”

Clearly, after years of hype, the universal memories have come back down to earth. In possibly the best-case scenario, a next-generation technology could become a mere one-to-one replacement for today’s memory types, Lee said. “We might see them in certain applications and segments,” he said.

Universal niches
In the meantime, HP, Intel, IBM, Micron, SK Hynix, Toshiba, Samsung and others are developing various next-generation memory types. Because it remains unclear which technology will replace DRAM and flash, the larger players are developing most next-generation memory types.

There is a sense of urgency to develop these technologies. DRAM could stop scaling somewhere at the 1nm node. “There is not much room for the floating gate to scale in flash. Nobody really believes that planar NAND can go below 10nm,” Lee added.

In one possible scenario in the next five years (or longer), a next-generation MRAM called spin-torque MRAM (STT-RAM) is the candidate to replace DRAM and SRAM. Also in the distant future, 3D NAND and ReRAM may replace NAND flash and the disk drive.

And PCM could not only displace NOR, but it could also emerge as a new class of so-called storage-class memory. MRAM and ReRAM also are being positioned as storage-class memories, which supposedly fit between the main memory and the processor to alleviate the I/O bottleneck in a system.

Alan Niebel, chief executive of Web-Feet Research, has a different viewpoint. The next-generation memory types are classified as storage-class memories, which can be sub-divided into two groups: memory (DRAM-like) and storage (NAND-like), Niebel said. “Possibly by 2020, one technology may be able to bridge the cost, performance, persistence, and power parameters to satisfy both memory and storage needs,” he said. “In the meantime, the leading replacements for NAND in storage are phase-change and ReRAM. STT-RAM could be a DRAM replacement, but it is too costly for storage.”

NAND and DRAM replacements
If or when planar NAND runs out of gas, the prevailing school of thought is that 3D NAND will replace NAND, followed much later by ReRAM. ReRAM is non-volatile and based on the electronic switching of a resistor element material between two stable resistive states. Startup Adesto is sampling one form of ReRAM, dubbed conductive bridging RAM (CBRAM), which is an EEPROM replacement. HP, Micron, Samsung, SK Hynix and others are working on NAND-replacement ReRAMs.

The first ReRAMs are based on a 1T1R (1 transistor and 1 resistor) structure. Next-generation ReRAMs are based on a 1R structure and consist of various architectures, such as 3D and cross-point arrays. These ReRAMs present several challenges, prompting some to believe that these memories won’t appear until 2015 or so. “Each of the metal layers requires advanced lithography, which is very expensive,” said David Eggleston, senior vice president at Rambus. In 2012, Rambus acquired ReRAM developer Unity Semiconductor.

At a recent event, SK Hynix outlined its strategy, which typifies the roadmap of a NAND vendor. First, SK Hynix will continue to extend planar NAND. “I think scaling NAND to 12nm will be very challenging,” said Sung Wook Park, executive vice president and head of the R&D Center at SK Hynix.

SK Hynix is separately developing a 12nm planar NAND part and 3D NAND. 3D NAND is targeted as the successor to planar NAND, Park said. In addition, the company is also working on next-generation STT-RAM with Toshiba. SK Hynix is separately co-developing PCM with IBM.

The industry also is keeping a close eye on SK Hynix and Hewlett-Packard, which have been jointly working on commercializing HP’s memristor by 2015. A form of ReRAM, memristor is a passive two-terminal electronic device. In memristance, if the flow of a charge is stopped by turning off the applied voltage, this component will “remember” its last resistance.

Initially, devices based on the memristor are aimed for storage, said Janice Nickel, research manager at the Cognitive Research Laboratory at HP Labs. “Then, we will look to move up from there.”

SK Hynix has developed an 8-Mbit test chip based on the memristor. HP itself has demonstrated a 54nm cross-bar structure. “The challenge is the integration of new materials,” Nickel said.

Others hope to ship ReRAMs sooner than later. Micron and Sony, for example, have been co-developing so-called Adaptive ReRAM for possible introduction in 2014. Adaptive ReRAMs are expected to have up to 8-Gbit capacities. Initially, Adaptive ReRAM is geared for cache module applications, said Keiichi Tsutsui, senior manager of advanced memory systems at Sony.

Like NAND, the industry is searching for a DRAM successor. When the DRAM runs out of gas, 3D-based Wide I/0 technology is one possible successor. In addition, Micron and Samsung are developing a 3D DRAM technology called the Hybrid Memory Cube (HMC).

There are several challenges to develop 3D DRAM. Longer term, STT-RAM may replace DRAM. Everspin, IBM-TDK, Qualcomm-TSMC, Samsung, Toshiba and others are working on STT-RAM.

STT-RAM makes use of a spin-transfer torque technology. This is an effect in which the orientation of a magnetic layer in a magnetic tunnel junction (MTJ) can be modified using a spin-polarized current. STT-RAMs are fast and non-volatile, but the challenges include scalability and unstable switching currents in the MTJ memory cell.

“It’s really too early for MRAM to replace DRAM,” said Phillip LoPresti, president and chief executive of Everspin Technologies, an MRAM supplier. “MRAM is always going to be behind in cost and density.”

For now, MRAM is geared for the embedded market. Everspin, for example, is shipping first-generation MRAMs based on a toggle-write technology, mainly for the battery-backed SRAM replacement market. In addition, Everspin is also readying the world’s first STT-RAM. In a slide at a recent event, Everspin called it a ST-RAM or ”SpinRAM.”

Using an alternate method for programming an MTJ element, ST-RAM is mainly geared to replace “battery-backed DRAM” or persistent RAM in hard drives and related storage applications, said Steffen Hellmold, vice president of marketing at Everspin. In an invited paper at the upcoming IEDM, Everspin will describe how they built the largest functional ST-MRAM circuit ever built, a 64-Mbit device with good electrical characteristics.

For main-memory in PCs and other systems, DRAM will remain the dominant technology for some time. “MRAM will not replace DRAM for at least the five years,” Hellmold said. “I am willing to place a bet on it.”

New memory phase
Like MRAM and ReRAM, PCM is in its infancy. PCM is difficult to scale and limited by the power required to change from the crystalline to the amorphous state. Researchers are looking at germanium telluride (GeTe) materials to overcome these limitations, said Jean-Luc Delcarri, general manager of Altatech, a subsidiary of Soitec.

Gary Kotzur, a distinguished engineer at PC maker Dell, said PCM has a potential place in online transaction processing (OLTP) systems. For OLTP, PCM needs to have “faster writes,” he said. “The power must be lower.”

Another application is online analytical processing, but for this application, “we need much higher densities,” he added.

Semiconductor growth is due for a significant upturn over the next five years, with especially strong growth in NAND, microcontrollers and DRAM, according to research firm IC Insights.

DRAM is forecast to grow from a negative 2.2% in the period from 2006 to 2011 to a compound annual growth rate of 9.6% between 2011 and 2016. NAND flash will grow 16.6 percent during that period, but it has been growing at a rate of 16% between 2006 and 2011, so this is basically flat. Microcontrollers, meanwhile, will increase from 6.2% to 7.8%, and analog will grow from 3.1% to 3.3%.

What’s particularly interesting is the average selling price for ICs, which showed a decline of 2.9% between 2006 and 2011. The research house predicts ASPs will increase to an average of 1.7%.

By Mark LaPedus
Intel will invest several million dollars in Nikon for the development of 450mm lithography systems, according to Semiconductor Portal, citing Nikkei as its source. Intel also recently invested in ASML.

Soitec says it is well positioned in the selection process for solar projects in France. For some time, the company has been selling a concentrator photovoltaic (CPV) system. /

Mentor Graphics has added support for 42 embedded development boards for its RTOS.

Mobile DRAM is playing a more prominent role in the memory business, according to iSuppli. Mobile DRAM is set to hit a record $6.56 billion in revenue this year, up 10 percent from $5.98 billion in 2011, according to the firm.

But the overall DRAM industry is preparing for another round of capacity cuts, according to DRAMexchange.

The global smartphone applications processor market showed a solid 55% year-over-year growth in Q1 2012, reaching $2.47 billion, according to Strategy Analytics.

TVs based on active-matrix organic light-emitting diodes (AMOLEDs) cost 10 times more than LCD TVs, says DisplaySearch.

A range of applications is driving strong demand for wearable technology, according to IMS. Current wearable devices are concentrated around a few products, mainly in the healthcare and medical, and fitness and wellness application areas.

The Hybrid Memory Cube Consortium (HMCC) — the 3D DRAM effort led by Micron Technology Inc. and Samsung Electronics Co. Ltd. — said that software giant Microsoft Corp. has joined the group.

Last October, memory rivals Samsung and Micron announced the creation of a consortium to develop an open interface specification for a 3D memory technology called the Hybrid Memory Cube (HMC). The HMCC is developing 3D DRAM devices based on through-silicon-via (TSV) technology.

Members of the consortium include Micron, Samsung, Altera, Open-Silicon, Xilinx, IBM and now Microsoft. The technology will enable 3D memory solutions for applications ranging from industrial products to high-performance computing and large-scale networking.

“HMC technology represents a major step forward in the direction of increasing memory bandwidth and performance, while decreasing the energy and latency needed for moving data between the memory arrays and the processor cores,” said K.D. Hallman, general manager of Microsoft’s Strategic Software/Silicon Architectures group.

Last year, Micron disclosed the manufacturing flow for the HMC. Under the plan, IBM will manufacture the controller logic portions of the HMC within its own fab. Micron will make the memory portions – and will assemble and test – the HMC devices within its own operations. Micron has recently set up a 3D DRAM pilot and production line within its 300mm R&D fab in Boise, Ida.

Sandia National Laboratories is developing a supercomputer as part of a DARPA program. In the short term, the lab has found a memory solution for the system: Micron’s HMC.

By Mark LaPedus

The semiconductor equipment market continues to improve in 2012, prompting VLSI Research Inc. to raise its fab tool forecast for the second time in recent weeks.

Citing recent moves by Intel, Samsung and others to raise their respective capital spending this year, VLSI Research now predicts the semiconductor equipment market will reach $49.2 billion in 2012, down 7.1 percent over 2011. And in another positive move, VLSI Research also raised its overall IC forecast from 3.9 percent growth to 4.3 percent in 2012.

Not long ago, the research firm originally projected that the fab tool market would fall by a whopping 20.1 percent in 2012. Then, in February, VLSI Research raised its forecast and predicted the semiconductor equipment market would reach $45.6 billion in 2012, down 9.8 percent over 2011.

“Chip makers are generally optimistic and many of them are seeing positive trends in the market,” according to a new report from VLSI Research. “They expect a healthier business environment in the coming quarters. Foundries are at the forefront and investing aggressively as most of their leading-edge capacity is tapped out. The equipment industry is seeing a nice rebound following a weak Q4.”

There are some troubling signs as well. David Rubenstein, an analyst with Religare Capital Markets, an investment banking firm, sees an uphill battle for fab tool makers in 2012. “We project that capital spending will fall 12 percent year-over-year in 2012,” he said. “We forecast -19 percent FPD capex in 2012 and further declines in 2013.”

One of the problems is the ongoing memory downturn, which is hurting capital spending. “The memory sector remains a drag on the overall activity,” according to VLSI Research. “NAND orders are still soft as the industry burns some excess SDD inventory. DRAM activity remains pretty much frozen.”

Greg Wong, an analyst with Forward Insights, a research firm, sees a rebound in NAND flash. That market is “fairly weak right now due to seasonality. But it should starting improving in the second half with new smartphones, tablets and ultrabook launches,” Wong said.

Total inventories increased nearly 1 percent in February and are projected to jump by another 3 percent in March, according to VLSI Research. Total IC inventories in March will be 7 percent lower than from last year’s levels, according to the firm.

The fab tool vendors are also seeing a mixed picture. At the recent Applied Materials Inc. analyst event, Applied CEO Mike Splinter acknowledged that the company sees a challenging environment.

At the event, Applied guided fiscal 2012 revenues and EPS of $9.1-to-$9.5 billion and $0.85-to-$0.95, respectively, falling short of consensus of $9.6 billion and $0.96. This is “driven primarily by weakness in non-semi segments” like solar and displays, said C.J. Muse, an analyst with Barclays Capital.

“On the positive side, Applied is poised to benefit from several positive trends in semi,” including “increasing process steps in the move to 2Xnm/1Xnm, a move to 3D NAND, sustainability of wafer fab equipment spending, and growing capital intensity in display,” he said.