By David Lammers
Innovation and synchronization among multiple companies do not often go hand in hand. But for the 450mm wafer transition to provide its full benefits, chip makers and their suppliers will need to do more than a simple wafer size scale up.

That may lead the Global 450 Consortium (G450C) to serve as the proving ground for efforts to more closely match the electrical results of production tools.

Ron Rinfet, director of Intel’s 450 program, said it will take “a lot of work to align the technical roadmaps, which is one of the roles of the G450C. The suppliers will use this as an opportunity to introduce incredible changes.”

Die-to-die matching is one of the two technical challenges facing the consortium, the other being the scale-up of the wafer size and the expected cost savings. In a presentation during Semicon West, Rinfet showed a slide detailing the role film variability in die to die matching, which will require cooperation on die-level electrical test results, uniform plasma density, improved thermal and thickness control, optimized pumping, and improved film stress management.

The 450 transition program, started within Sematech but now under CNSE’s management, has included tool performance specifications for several years, with Sematech program managers conducting day-long seminars on the performance targets of a range of 450mm tools.

Earlier this year, Qualcomm’s senior vice president of engineering, Michael Campbell, spoke at the Advanced Semiconductor Manufacturing Conference in Saratoga Springs, N.Y. He emphasized Qualcomm’s desire to make electrically compatible versions of the same mobile phone processors at two or more fabs.

Today, Qualcomm must use four different libraries for its foundry partners, adding to design complexity. And Campbell said getting two fabs within the same foundry to produce electrically compatible chips is a struggle. He pointed to the synchronization efforts at G450C as a means of solving the tool and fab matching goals needed by high-volume fabless companies such as Qualcomm.

Early on, the consortium’s main job is to move tools into the new NFX (NanoFab Xtension) building, nearing completion at the College of Nanoscale Science and Engineering (CNSE) in Albany, N.Y. From 2013 onward, the pilot line will serve as a test bed for methods to more closely align tool outputs, among other goals.

The G450C members currently include Intel, IBM, GlobalFoundries, Samsung, and TSMC, along with CNSE. Kirk Hasserjian, a vice president at Applied Materials, said there may be only five or six companies processing 450mm wafers, reflecting a savagely Darwinian selection process. During the current 300mm generation, about 25 companies are processing 300mm wafers, down from about 75 at the peak of the 200mm diameter.

In a consolidating industry, companies may rely more heavily on common components in order not to waste R&D dollars, Hasserjian said, emphasizing the need for the chipmakers to move to 450mm at roughly the same time using similar design rules. The clout of such few equipment buyers puts the G450C members in a strong position to ask for coordinated technical targets as they innovate their patterning, deposition, and other processes. And the equipment companies must deliver a further three nodes on 300mm tools as well, requiring leading edge equipment at both the 300mm and 450mm wafers sizes—an expensive prospect.

Scaling itself will become increasingly thorny as 450mm production begins late in this decade. “DRAM, flash, and logic devices are all hitting fundamental barriers, requiring more atomic-scale deposition,” said Akihisa Sekiguchi, a corporate marketing director at Tokyo Electron Ltd. (TEL). Sekiguchi quoted dire forecasts from consultancy IBS predicting that the cost per function is now on an upward curve. “Concurrent development on 300 and 450 tools at the bleeding edge is not sustainable,” he argued.

With R&D funds already stretched thin by the demands from device scaling, equipment companies have a favorable view of Intel’s roughly $4 billion investment in ASML, which is aimed primarily at readying EUV scanners capable of processing 450mm wafers at high throughputs. (Dean Freeman, manufacturing analyst at Gartner, said he was told that Intel made a private investment in Nikon to prepare the 450mm-capable immersion ArF scanners).

While several executives at major equipment vendors said they would welcome similar investments from Intel to bolster their 450mm development programs, a senior IBM executive said the Intel-ASML relationship may prove to be unique. ASML holds a virtual monopoly in the EUV tool field, providing them with more leverage than any other vendor over when the complete 450mm toolset will become available. Without ASML getting fully on board, 450mm at 10nm and below design rules wouldn’t go forward. For all the other major tool types, more than one vendor exists, relieving Intel of the need to make direct investments, the IBM executive speculated.

The G450C leadership points to the consortium’s investment in a 450mm wafer bank as a means of supporting all the interested tool vendors, according to Michael Liehr, general manager of the G450C. “We are making a large investment in wafers,” said Liehr, who earlier worked at IBM before joining CNSE.

The consortium wants to have full process capability in place by 2014, ideally with two suppliers for each major tool type, said David Skilbred, director of program coordination at G450C. The consortium management is busy talking to interested suppliers now. By the second phase, G450C will be working with both on-site and off-site suppliers, he added.

Imec also is making plans for the 450mm transition, though its focus differs from that of the G450C group. “Our focus is on process development,” said Ludo Deferm, vice president of business development at Imec. The Flemish government is contributing about $125 million toward construction of a clean room, set to be finished by 2015, that will be used for 10nm and beyond process development on 450mm wafers.

The European equipment industry is a significant employer in Europe, and the companies look to Imec as a place where their 450mm tools can be used for leading-edge process development. But Imec is not directly involved in developing the 450mm toolset, and looks to cooperate with G450C in that effort. “All of our core programs will move to 450mm wafers in the next seven years,” he said, including lithography, transistor and interconnects, 3D, and the Insite program which includes the largest fabless IC vendors.

Source: G450C

By David Lammers
Two key areas of the semiconductor industry’s future—the 450mm wafer transition and EUV lithography—are the focus of the new NFX (NanoFab Xtension) building now under construction at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany.

Alain Kaloyeros

The cooperative research effort at CNSE and the Global 450 Consortium (G450C) could springboard New York into the 450mm fab era at some point, said Alain Kaloyeros, senior vice president and CEO of CNSE. The consortium, announced by New York Governor Andrew Cuomo in September 2011, includes IBM, Intel, GlobalFoundries, TSMC and Samsung, as well as CNSE.

Kaloyeros, in an interview at the NanoFab complex, said, “Now that there is a consensus that 450 is happening, our role is to create the environment, enable the resource innovation and the manufacturing innovation for the transition. The NFX facility is going to be heavily focused on tool development and demonstration, but at the end of the day, all this is going to be driven by innovation.”

With the 14nm node as the potential baseline at the NFX facility, half of the building is dedicated to the work of the G450C consortium, with the remainder for EUV-related programs which are part of an extension of the Center for Semiconductor Research (CSR), led by CNSE and IBM, with a focus on 14nm and beyond technologies.

The currently operating NanoFab North (NFN) building has an initial set of six 450mm tools within 4,000 to 5,000 square feet of cleanroom space. The early work has focused on automation development. To get ready for the tool and process development phases, the consortium is building a bank of 450 wafers to be shared by the members. The consortium has ordered 6,000 450mm wafers, at a per wafer price of $4,500, he said.

The new building will have 280,000 square feet of total space in a four-level building, with a total of 60,000 square feet of clean space, of which 45,000 square feet of cleanroom is on a waffle slab. The waffle slab in the NFX building is a reinforced 4-ft.-thick concrete structure capable of supporting 750 lbs. per square foot to obtain the load rating and vibration specification needed for the EUV NSE:3300 tool.

Interior view of the NFX clean room at CNSE. (Source: CNSE)

The 45,000 square foot cleanroom will have a single separation wall with the G450 space on one side and the CSR (Center for Semiconductor Research) EUV Center of Competency in the other. In addition, there is a quiet SEM/TEM room in the subfab on a 6-foot-thick slab, said Jonathan Holder, vice president for facilities and infrastructure at CNSE.

Construction of the building is expected to wrap up late this year; the schedule has been gated by delays to the EUV lithography source power modules. Tool hook-up work needed for the ASML NXE:3300 scanner will begin in October of this year with tool components arriving during the fourth quarter and into early next year. Installation of the dedicated gantry crane above the scanner is scheduled for July of this year.

The NFX building, at top center, is connected to CNSE Nanofab North.

EUV and 450

Kaloyeros said the G450C members are “working on a lithography solution, but we don’t know if it is going to be an early EUV tool or immersion 193 or imprint. We are in the process of having those discussions with the consortium members, and I can’t say now if they are contemplating one option or multiple options. But all of us understand that having a litho program is critical to the G450C.”

Despite the delays, Kaloyeros said the companies working at CNSE still see EUV as “very much a viable solution. They haven’t given up on it. A different question is: What litho technology is needed for a 450 fab? That could be EUV, or it could be by immersion litho being pushed. It could be immersion—who knows? The point is that by the time the 450 fabs are ready to be built if they don’t have EUV it is not going to kill construction of the 450mm fabs.”

A 450mm Fab in New York?

A decade ago Kaloyeros was critical of Intel for not doing much of its consortia R&D at CNSE. Now he is singing a different tune, happy that Intel is taking a leading role in the G450C effort based in Albany. “Intel was not a big player here. Now they are a big player. That is a big breakthrough for CNSE.”

Asked if Intel or other G450C member companies might build a fab in New York, Kaloyeros replied that “there is a very strong hope that when they are ready to build a 450 millimeter fab that they will consider New York. Governor Cuomo has said that New York really is open for business, and he personally has been leading this.”

President Barack Obama said the corporate tax code needs to be revised to reverse the tide of outsourcing to countries which have lower corporate tax rates.

President Barack Obama, during a visit to CNSE in Albany, N.Y. (Source: GlobalFoundries)

“After years of undercutting the competition, now it’s getting more expensive to do business in places like China.  Wages are going up.  Shipping costs are going up.  And meanwhile, American workers are getting more and more efficient.  Companies located here are becoming more and more competitive,” Obama said during a visit to the College of Nanoscale Engineering and Technology in Albany, N.Y. Tuesday (May 8).

Noting that GlobalFoundries and others are hiring in New York because of the quality of the workforce, Obama said more companies are insourcing, citing an unnamed study that found that half of America’s largest companies are thinking of moving their manufacturing operations from China back to the United States.

“Even when we can’t make things cheaper than other countries because of their wage rates, we can always make them better,” Obama said.

However, to keep up the momentum behind the resurgence in manufacturing, Washington needs to revise the corporate tax code, the president said, arguing that companies now get tax breaks for moving factories, jobs and profits overseas.  “They can actually end up saving on their tax bill when they make the move.  Meanwhile, companies that choose to stay here are getting hit with one of the highest tax rates in the world.  That doesn’t make sense,” Obama said.

Long term, Congress needs to implement a full-blown tax reform. But nearer term, the president said  “at the very least what we can do right away is stop rewarding companies who ship jobs overseas and use that money to cover moving expenses for companies that are moving jobs back here to America.”

GlobalFoundries CEO Ajit Manocha addressed the crowd of over 500 people at the CNSE complex and lauded the Obama administration’s Advanced Manufacturing Partnership and its support for the America Invents Act. “American manufacturing is climbing back, with almost half a million jobs added in the manufacturing sector since 2010,” Manocha said.

Public-private partnerships have created jobs in New York, he said, noting that the GlobalFoundries Fab 8, north of Albany, will create more than 1,600 new direct jobs and approximately 8,000 additional new indirect jobs, representing an annual payroll of over $300 million. Fab 8 consists of almost two million square feet of total space, built with an estimated capital budget of approximately $6.9 billion. The fab will ramp to volume production in late 2012, Manocha said. Upon full build out, it will have a production capacity of approximately 60,000 wafers per month.

President Barack Obama will visit the College of Nanoscale Science and Engineering in Albany, N.Y. next Tuesday, making a campaign speech on the economy there.

The President’s visit, originally planned to be held at GlobalFoundries Fab 8, was moved to the CNSE’s NanoTech Complex at the State University of New York in Albany “for logistical reasons.”

It will be the president’s third visit to the region, including a tour of a General Electric facility and a visit to the Hudson Valley Community College. Earlier, the White House had considered a plan to the fab’s construction site, but the lack of a finished building and security concerns over the single road into the plant caused the visit to be delayed.

By Mark Lapedus and David Lammers

The State of New York is hoping that the Global 450 Consortium (G450C) announced last week will result in 450mm fabs being built in New York and more equipment purchased from vendors operating in the Empire State.

A 2010 “450.doc” proposal that circulated among New York’s politicians was designed to gain their support for the G450C effort, including additional state funding for the SUNY University of Albany College of Nanoscale Science and Engineering (CNSE), where the G450 consortium will build a 450mm demonstration line expected to go into operation in early 2013.

The 2010 proposal outlines a second phase, to be negotiated in 2013, in which the five members of the consortium – IBM, Intel, GlobalFoundries, TSMC and Samsung – would be encouraged to build a 450mm fab in New York at some point in the future.

“The Phase II agreement will contain provisions that if any Consortium member determines, directly or indirectly, to build a 450 plant anywhere in the world that at least one such 450 facility would be built at an appropriate site in NYS (New York State) reasonably acceptable to NYS and such consortium partner,” according to the proposal.

“The commitment of the consortium partners in Phase II would be subject to NYS continued investment but the consortium agrees that in light of the cluster value provided by NYS that the amount of such support as a percentage of the total project cost would be lower than that provided by NYS in prior transactions,’’ according to the document.

It is not known how much of the language in the “450.doc” proposal ended up in the final agreement. CNSE, Sematech, and the five chip makers will form the board of directors for the G450C effort.

The proposed Phase II part of the plan also includes a “Made in New York” initiative, which would call for the procurement of fab tools exclusively from “manufacturers located’’ in New York and “existing New York State vendors,” according to the proposal. Phase II would result in additional funding for the 450mm consortium and “the creation of a significant number of additional jobs’’ in New York, according to the document, a copy of which was obtained by SemiMD.

Of the five members — Intel, IBM, GlobalFoundries, TSMC and Samsung – only Intel and TSMC have separately announced “450mm-ready” fabs in various other locations. Intel has announced two 450mm-ready plants, including D1X in Oregon and Fab 42 in Arizona. TSMC plans to build a 450mm pilot line in Fab 12 in Hsinchu, Taiwan by 2013 or 2014. By 2015 or 2016 TSMC hopes to ramp a 450-mm production plant: Fab 15 in Taichung, Taiwan. The foundry’s management has recently expressed doubts that it can stay on that schedule.

IBM, GlobalFoundries and Samsung have not disclosed any 450mm fab plans.

Bob Bruck, vice president of Intel’s technology and manufacturing group, said Intel is not under any obligation to build a 450mm fab in New York or anywhere else. He praised New York’s effort to develop a chip manufacturing infrastructure in the state, including the CNSE Albany Nanotech Center, mentioning the names of the governor and others as active supporters of New York’s technology infrastructure.

However, Bruck said that Intel would follow its normal site selection process for any decision on a new fab site, 450mm or otherwise. “Whenever we plan to build a new fab we look on a global basis, and have a well-defined site selection process. That process has not changed” following announcement of the 450mm consortium, he said.

The five chip makers are expected to contribute at least $75 million each in the project over the next five years, according to the Business Review news site based in New York. Bruck called that level of investment a “starting point.”

In addition, IBM plans to invest $3.6 billion in its ongoing transistor development alliance and related packaging R&D, which will be directed to Albany Nanotech and other state facilities, according to a report from Albany-based Times Tribune newspaper. Much of that investment is already committed by the companies to support the ongoing efforts by IBM, GlobalFoundries, and Samsung Electronics (not including Intel or TSMC) to develop 22nm and 14nm technology, independent of the work on the 450mm wafer transition.

CSNE in Albany, N.Y. will serve as the headquarters for the 450mm consortium, and a spokesman for CSNE said each consortium member will provide employees and assignees to the group.

Fab construction firm M+W has been building a $300 million research center at the CNSE at the University at Albany, which will be the centerpiece of the Global 450 Consortium, according to the CNSE spokesman. That center, called the NanoFab West or NanoFab X building, is designed to handle 450-mm equipment, including the heavy EUV lithography tools.

Some $250 million for the center will come from the Empire State Development Corp., $100 million from the New York Power Authority, and $50 million from capital projects fund, according to the Times Tribune, citing Josh Vlasto, a spokesman for Gov. Andrew Cuomo, as its source.

Alain Kaloyeros

According to the report, CNSE President Alain Kaloyeros said the center would install between $2 billion and $2.5 billion worth of fab tools. The first tools will be installed by September 2012. The facility will be completed by the first quarter of 2013, according to the report, citing  Kaloyeros as its source.

By David Lammers and Mark LaPedus

The Global 450 Consortium, or G450C, will provide equipment suppliers with access to a test wafer bank on a “first-come, first-served basis,” depending on their in-kind investments and other contributions to the consortium, said Bob Bruck, vice president of Intel’s technology and manufacturing group (TMG).

The G450C announced this week includes five IC manufacturers – with IBM and GlobalFoundries joining the original “IST” members, Intel, Samsung, and TSMC. Those companies, along with Sematech and the SUNY-Albany College of Nanoscale Science and Engineering (CNSE), will sit on a board of directors that will govern the consortium.

The G450C demonstration line in Albany is targeted for 14nm design rules early 2013 with imprint technology used for test wafer patterning of over the first year. The first 450mm 193i optical litho tool for Albany is expected to arrive in late 2013, an Intel spokesman said. After that, each of the consortium’s members can determine their own schedule for 450mm development fabs, with 2015 remaining as the group’s overall target. Intel has not decided which node capability it will want for its own development line, because that will depend upon manufacturability progress of the 450  tool set, the Intel spokesman added.

Bob Bruck

While Bruck said early analyst estimates of a $5B total cost of the 450mm test wafers needed for the transition were too high, he agreed that test wafer costs will be a “substantial portion” of the cost of the 450mm wafer development program. “That in itself is an attractive element to pull the collaborators (suppliers) in. To the degree that they participate in the consortium, they will have access to the output, to the test wafers themselves. It will be first come, first served, and the allocation schemes have to be tied to the funding of it.”

CNSE is building a new fab for the G450C effort, named Nanofab West or Nanofab X, which looms over the highway that cuts through the Albany Nanotech campus. Construction is expected to be completed next year.

Bruck said while $75 million is roughly accurate for the five IC companies contribution “as a starting point,” the overall budget will go up over time, bolstered by investments from the suppliers and a $200 million contribution over five years from the Empire State Development organization, among other sources.

Bruck said the supplier contributions “are really going to evolve and be substantial as people see the structure take place.” Suppliers will support G450C because they will be able to interface with five customers in the same place, all seeking to develop standards and product requirements. That will provide the entire industry – including the tool suppliers – with a “huge amount of cost savings.”

The 300mm wafer transition did not go well because there were 17 different semiconductor manufacturing companies interfacing with the suppliers. While common 450mm development work will be done in Albany, tool suppliers with their own development centers will continue to do their own work at home. Bruck said he envisions Intel, for example, running a “virtual fab” that would involve Albany. Intel could run test 450mm wafers through the line at Albany, then air freight those wafers to a supplier which would run them through its proprietary tool, and then back to Albany for completion and testing.

“Suppliers can say, ‘I can do this work on my own and have five customers asking for five different things. Or I can do some of this work in one location with five customers working with me on requirements, standards and product definitions. That is a big change from previous wafer transitions, and substantially increases the value of investment in this facility, in lieu of doing investments elsewhere,” he said.

The ISMI 450 program has refined a request for proposal (RFP) process that will transfer over to the G450C effort, which will take over the ISMI 450 program. Bruck lauded the assignees to the ISMI 450 program and said the five member companies will add more “high quality” people to G450C going forward.

The G450C partners have engaged in “pretty substantial dialogue” with equipment and wafer suppliers, and Bruck said he expects a “very high degree of participation in their own centers and in the development line in Albany. Some suppliers may want to do some things in front of five customers, while for other things they may prefer to do those in a more proprietary manner in their own facility.”

At a Semicon West panel discussion on the 450mm wafer transition, tool suppliers said they were vexed by the mixed messages coming from the IST companies, with different schedules and technology targets for the transition.

Bruck said the G450C is targeting 14nm capability for the Albany 2013 development line tools. Compared with the 300mm transition, he said the 450mm transition will be “much more tightly coordinated,” both because of the consortial approach to development and because of industry consolidation among the IC manufacturers.

“From a process technology node point of view, we think the suppliers will be capable of dealing with both the wafer size and the node progression in this time frame. As for when the individual companies build their own fabs, it is like the question of when EUV comes in. It depends on when it is manufacturable. We had a false start on 300mm partly because the 17 announced customers were not aligned,” he said.

Bruck added that “lithography is its own animal. We prefer to have EUV healthy before we go to 450. Either way, there will also be a need for 193i at 450, and we need EUV at 300. As we continue to gain efficiencies in our 300mm fabs, that lays the groundwork for 450. We will figure out how many layers use EUV and immersion (on 300mm wafers), and we have got to do a lot of this work in parallel” with the 450mm transition, he said.

Bruck said he will moderate a panel of suppliers that will discuss the supplier’s role in the 450mm wafer transition at the SEMI International Trade Partners Conference in Hawaii, scheduled for Nov. 3-5. While some have expected that the device makers would set up a common pool of money for equipment development, Bruck said, “It is not about who we are going to hand money out to. We can’t just throw money at the problem,” he said.

The 22^nd IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2011) will feature a panel discussion on “Models for Successful Partnerships in Semiconductor Manufacturing” April 17 in Saratoga Springs, N.Y.

The panel session will highlight the vital role of partnerships in furthering semiconductor manufacturing innovation and advancements.

Panelists will examine how to collaborate across the semiconductor development and manufacturing supply chain. The panel includes:

• Dr. Walid Ali, Advanced Technology Investment Company (ATIC)
• Olivier Demolliens, CEA-Leti
• Prof. Michael M. Fancher, College of Nanoscale Science and Engineering (CNSE)
• Ari Komeran, Intel Corporation