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Posts Tagged ‘ASML’

Solid State Watch: September 12-18, 2014

Monday, September 22nd, 2014
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ASML on EUV: Available at 10nm

Wednesday, September 17th, 2014

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By Jeff Dorsch, contributing editor

Extreme-ultraviolet lithography systems will be available to pattern critical layers of semiconductors at the 10-nanometer process node, and EUV will completely take over from 193nm immersion lithography equipment at 7nm, according to Martin van den Brink, president and chief technology officer of ASML Holding.

Giving the keynote presentation Tuesday at the SPIE Photomask Technology conference in Monterey, Calif., Martin offered a lengthy update on his company’s progress with EUV technology.

Sources for the next-generation lithography systems are now able to produce 77 watts of power, and ASML is shooting for 81W by the end of 2014, Martin said.

The power figure is significant since it indicates how many wafers the litho system can process, a key milestone in EUV’s progress toward becoming a volume manufacturing technology. With an 80W power source, ASML’s EUV systems could turn out 800 wafers a day, he noted.

The goal is to get to 1,000 wafers per day. ASML has lately taken to specifying throughput rates in daily production, not wafers per hour, since many wafer fabs are running nearly all the time at present.

ASML’s overarching goal is providing “affordable scaling,” Martin asserted, through what he called “holistic lithography.” This involves both immersion litho scanners and EUV machines, he said.

Martin offered a product roadmap over the next four years, concluding with manufacturing of semiconductors with 7nm features in 2018.

The ASML president acknowledged that the development of EUV has been halting over the years, while asserting that his company has made “major progress” with EUV. He said the EUV program represented “a grinding project, going on for 10 years.”

For all of EUV’s complications and travails, “nothing is impossible,” Martin told a packed auditorium at the Monterey Conference Center.

With many producers of photomasks in attendance at the conference, Martin promised, “We are not planning to make a significant change in mask infrastructure” for EUV. He added, “What you are investing today will be useful next year, and the year after that.”

Blog review August 18, 2014

Monday, August 18th, 2014

Vivek Bakshi provides a deeper look at the ASML/IBM announcement on EUV progress. ASML and IBM reconfirmed the benchmarking in press and via social media. In short, 637 wafers per day throughput stands, resulting from the successful upgrade of source power by 100%, to its targeted level of ~43 W.

Dick James of Chipworks finally has his hands on Samsung’s V-NAND vertical flash. The vertical flash was first released in an enterprise solid-state drive (SSD) last year, in 960 GB and 480 GB versions. Then in May this year they announced a second-generation V-NAND SSD, with a stack of 32 cell layers.

Phil Garrou provides an overview of controlling warpage in packaging as discussed at ECTC by Hitachi Chemical, Amkor, Qualcomm, and imec.

Anand Sundaram, Senior Associate for PwC’s PRTM Management Consulting writes that software that controls and powers embedded devices is playing a key role in making possible the highly integrated, multi-functional ‘smart’ devices we take for granted in our daily lives – from the ubiquitous smart phones/tablet to ‘smart’ home appliances and wearable electronics.

Pete Singer posted an IoT infographic, courtesy of Jabil. The global IoT market is poised for explosive growth. By 2020, the market is expected to soar to $7.1 trillion. This infographic, courtesy of Jabil, gives an good overview of what will be connected (even garbage bins!).

Bob Smith, Senior Vice President of Marketing and Business Development, Uniquify blogs that these days, chip design may seem like an intricately connected jigsaw puzzle, including small, oddly shaped interlocking pieces.

A New Era for Equipment Suppliers

Saturday, September 1st, 2012

By Pete Singer

The semiconductor equipment industry received quite a jolt recently. In July, lithography equipment supplier ASML announced a customer co-investment program that enabled minority equity investments in ASML (up to 25% total) by its largest customers. Customers could also make commitments to fund ASML’s research and development (R&D) spending for future programs.

Intel was the first investor, acquiring 15% equity ownership interest in ASML. R&D funding and equity investment agreements totaled approximately $4.1 billion. Part of the deal was a contractual commitment from Intel for advance purchase orders for 450 mm and EUV development and production tools from ASML. ASML has said the results of the technology investments will be available to every semiconductor manufacturer with no restrictions.

In August, TSMC joined in, taking a 5% stake in ASML, worth about $1.04 billion. TSMC also committed about $341 million, spread over 5 years, to ASML’s R&D programs.

The Intel announcement made instant believers out of many that both EUV and 450mm would actually happen. Both technologies have been significantly delayed beyond initial target dates, and the thinking was that some massive investment would be required to get them production-ready in a reasonable timeframe (i.e,. 2015-2020). $5+ billion is a pretty good start!

Not only does it seem to ensure that EUV will succeed, but it removed one of the most significant barriers to 450mm development. Even if 450mm solutions were developed for all the other types of process equipment — deposition, etch, ion implant, CMP, cleaning, etc. — it would be going nowhere without EUV. Now, seemingly overnight, 450mm seems inevitable.

It is a new era for semiconductor manufacturing equipment suppliers, for they must now seriously tackle the 450mm challenge, but don’t expect a blossoming new model based on customer co-investments anytime soon. There are at least two competitors in other markets, and developments will likely be funded the way they always have been — though good old-fashioned capitalism.