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Blog review February 24, 2014

Paul Farrar, general manager of the G450C consortium, said early work has demonstrated good results and that he sees no real barriers to implementing 450mm wafers from a technical standpoint. But as Pete Singer blogs, he also said: “In the end, if this isn’t cheaper, no one is going to do it,” he said.

Adele Hars of Advanced Substrate News reports that body-biasing design techniques, uniquely available in FD-SOI, have allowed STMicroelectronics and CEA-Leti to demonstrate a DSP that runs 10x faster than anything the industry’s seen before at ultra-low voltages.

Dr. Bruce McGaughy, Chief Technology Officer and Senior Vice President of Engineering, ProPlus Design Solutions, Inc., says the move to state-of-the-art 28nm/20nm planar CMOS and 16nm FinFET technologies present greater challenges to yield than any previous generation. This is putting more emphasis on high sigma yield.

Jamie Girard, senior director, North America Public Policy, SEMI President Obama touched on many different policy areas during his State of the Union talk, and specifically mentioned a number of issues that are of top concern in the industry and with SEMI member companies. Among these are funding for federal R&D, including public-private partnerships, trade, high-skilled immigration reform, and solar energy.

Phil Garrou finishes his look at the IEEE 3DIC meeting, with an analysis of presentations from Tohoku University, Fujitsu’s wafer-on-wafer (WOW), ASE/Chiao Tung University and RTI. In another blog, Phil continues his review of the Georgia Tech Interposer conference, highlighting presentations from Corning, Schott Glass, Asahi Glass, Shinko, Altera, Zeon and Ushio.

Pete Singer recommends taking the new survey by the National Center for Manufacturing Sciences (NCMS) but you may first want to give some thought as to what is and what isn’t “nanotechnology.”

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