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Blog review December 23, 2013

Zvi Or-Bach, President & CEO of MonolithIC 3D, blogs that the “one learning” we can take away from IEDM 2013 is that SOI is the future technology of semiconductors. Why? Because: A) SOI is cheaper to fabricate than FinFet with comparable performance, and it is easier and cheaper to build FinFET on SOI which then provides better performance; B) SOI is the natural technology for monolithic 3D IC for all overlaying transistor layers, and monolithic 3D is the most effective path to stay on Moore’s Law; and C) SOI, or better ‘XOI’, is the most efficient path for most of the new concepts such as alternate materials for transistor construction and other structures like nano-wires.

Phil Garrou reports from The IMAPS National Meeting that was recently held in Orlando, FL. He notes that Namics presented their latest data on available underfill solutions for 2.5/3DIC; Towa presented compression moldings for high end packaging solutions; and Dow Chemical described a new “toughened BCB” product. Phil also says to be on the lookout for Volume 3 of 3D Integration Handbook, due to be published in the first quarter of 2014.

Pete Singer is looking ahead to The ConFab 2014, to be held June 22-25 in Las Vegas. A likely candidate for discussion is the need for a roadmap for the equipment and supplier community. The International Technology Roadmap for Semiconductors (ITRS), scheduled to be updated early next year, is a wonderful guide, but intentionally stops short. The ITRS is “devised and intended for technology assessment only and is without regard to any commercial considerations pertaining to individual products or equipment.” Perhaps the time has come to shine a light on what chipmakers really want from their suppliers.

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