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Monte Carlo Analysis Has Become A Gamble

Dr. Bruce McGaughy, CTO and SVP of Engineering at ProPlus Design Solutions, Inc. blogs about the wisdom of Monte Carlo analysis when high sigma methods are perhaps better suited to today’s designs.

Years ago, someone overhead a group of us talking about Monte Carlo analysis and thought we were referring to the gambling center of Monaco and not computational algorithms that have become the gold standard for yield prediction. All of us standing by the company water cooler had a good laugh. That someone was forgiven because he was a recent college graduate with a degree in Finance and a new hire. As a fast learner, he quickly came to understand the benefits of Monte Carlo analysis.

I was recently reminded of this scene as the limitations of Monte Carlo analysis approaches are becoming more acute because of capacity. No circuit designer would mistake Monte Carlo analysis for a roulette wheel, though chip design may seem like a game of chance today. We continue to use the Monte Carlo approach for high-dimension integration and failure analysis even as new approaches emerge.

Emerging they are. For example, high sigma methods with proven techniques are becoming more prevalent for the design of airplanes, bridges, financial models, integrated circuits and more. Moreover, high sigma methods also are used for electronic design for various applications and are proving to be accurate by validation in hardware.

New technologies, such as16nm FinFET, add extra design challenges that require high sigma greater than six and closer to 7 sigma, making Monte Carlo simulation even less desirable.

Let’s explore a real-world scenario using a memory design as an example where process variations at advanced technologies become more severe, leading to a greater impact on SRAM yield.

The repetitive structure circuits of an SRAM design means extremely low cell failure rate is necessary to ensure high chip yield. Traditional Monte Carlo analysis is impractical in this application. In fact, it’s nearly impossible to finish the needed sampling because it typically requires millions or even billions of runs.

Conversely, a high sigma method can cut Monte Carlo analysis sampling by orders of magnitude. A one megabyte SRAM would require the yield of a bitline cell to reach as high as 99.999999% in order to achieve a chip yield of 99%. Monte Carlo analysis would need billions of samples. The high sigma method would need mere thousands of samples to achieve the same accuracy, shortening the statistical simulation time and making it possible for designers to do yield analysis for this kind of application.

High sigma methods are able to identify and filter sensitive parameters, and identify failure regions. Results are shared in various outputs and include sigma convergence data, failure rates, and yield data equivalent to Monte Carlo samples.

Monte Carlo analysis has had a good long run for yield prediction, but for many cases it’s become impractical. Emerging high sigma methods improve designer confidence for yield, power, performance and area, shorten the process development cycle and have the potential to save cost. The ultimate validation, of course, is in hardware and production usage. High sigma methods are gaining extensive silicon validation over volume production.

Let’s not gamble with yield prediction and take a more careful look at high sigma methods.

About Bruce McGaughy

Bruce McGaughy, CTO and Senior VP of Engineering at ProPlus Solutions in San Jose, CA.
Bruce McGaughy, CTO and Senior VP of Engineering at ProPlus Solutions in San Jose, CA.

Dr. Bruce McGaughy is chief technology officer and senior vice president of Engineering of ProPlus Design Solutions, Inc. He was most recently the Chief Architect of Simulation Division and Distinguished Engineer at Cadence Design Systems Inc. Dr. McGaughy previously also served as a R&D VP at BTA Technology Inc. and Celestry Design Technology Inc., and later an Engineering Group Director at Cadence Design Systems Inc. Dr. McGaughy holds a Ph.D. degree in EECS from the University of California at Berkeley.



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