More FinFETs Arrive
By Ed Sperling and Mark LaPedus
GlobalFoundries today took the covers off its new finFET architecture, which it will introduce for the 14nm node next year.
The technology, dubbed 14nm-XM, for extreme mobility, dramatically slashes leakage current in a mobile device where battery life is being severely challenged by a push for more features and better performance. Intel already announced its plans to add finFETs—or its terminology, TriGate technology—at the 22nm node for its Ivy Bridge processor, which will roll out next year. Both TSMC and GlobalFoundries said they would introduce it for 14nm, and UMC at last report was working on similar technology for 20nm.
FinFETs increase the surface area for electrons to travel—up to three times with three fins—allowing greater control over both the “on” and “off” states. This is particularly important in extremely dense SoCs, processors, and in stacked die, because leakage generates heat that can disrupt signal integrity, affect performance, or ultimately kill a chip. FinFETs significantly reduce that leakage, and they intrinsically run at a lower voltage, which translates into longer battery life.
The greater control of the on and off states also will be critical in near-threshold computing designs, where full power is not always necessary. That technique is still in the research phase, but it is expected to begin appearing over the next couple of years in an effort to further extend battery life.
The challenge for 3D transistors is on the manufacturing side, which is why it took Intel a full decade to roll out its first finFETs. At issue are lithography, which has fallen behind because of delays in EUV, and variability, which is particularly troublesome at advanced process nodes. FinFETs build on high-k/metal gate technology, which were a first step in reducing current leakage.
GlobalFoundries, for one, is taking a “modular fin” approach with its bulk finFET offering, dubbed 14nm-XM. The 14nm-XM combines a 14nm-class fin with its 20nm back-end-of-line (BEOL) interconnect flow.
By taking the modular approach, the company has accelerated its process roadmap by a year. Early process design kits (PDKs) are available, with customer product tape-outs expected in 2013. Production, which is slated for 2014, will take place within GlobalFoundries’ new 300mm fab in New York.
With its aggressive schedule, GlobalFoundries claims it has not only taken the finFET lead over its Taiwan foundry rivals, but it has also caught up with Intel Corp.’s projected process technology introduction at 14nm. “This is a finFET solution (that) intercepts Intel’s timeline and competitiveness,” added Subramani Kengeri, head of advanced technology architecture at GlobalFoundries.
This, of course, assumes that Intel will roll out and deliver its 14nm process in the same timeframe. But based on recent announcements, GlobalFoundries could be close or on par with Intel’s upcoming 14nm system-on-a-chip (SOC) process, said Nathan Brookwood, a research fellow at Insight 64, a semiconductor consulting firm.
“GlobalFoundries could be in the catbird seat,” Brookwood said. “If they can deliver, it will be impressive. They could put SOC customers on an equal footing with Intel.”
Seeking to play catch-up with Intel in the finFET arena, foundries are taking a “modular fin” strategy. Using this approach, a foundry would devise a fin structure at the front-end with 14nm design rules. The fin structure itself is modular, meaning it can be plugged into either a 14nm or 20nm BEOL flow.
One option is to devise a finFET with a 14nm BEOL flow. In this approach, a chipmaker must devise a new BEOL infrastructure at 14nm, which could be expensive.
Initially, GlobalFoundries opted for the second option. This marries a 14nm fin with a 20nm planar MEOL/BEOL flow. The idea behind this approach is that foundries can leverage and use their existing and mature 20nm tools. “It will minimize risk,” said Michael Noonen, executive vice president of global sales and marketing at GlobalFoundries. “It (gives us) a faster time to market.”
Its 14nm finFET process provides 20% to 55% higher performance than 20nm, depending on operating voltage. It also allows for Vdd reduction, while providing a 40% to 60% increase in battery life depending on the application.
It makes use of so-called “Fin-Friendly-Migration” (FFM) rules, enabling faster ports from planar to finFET designs. The company’s 14nm finFET is based on bulk and makes use of its high-k/metal-gate technology. The 14nm-class finFET has a 48nm fin pitch and 64nm backend design rules.
Technology development is underway, with test silicon running through its Fab 8 complex in Saratoga County, N.Y.
Tags: FinFETs, GlobalFoundries, high-k/metal gate, Intel, leakage current, near-threshold computing, TriGate, TSMC, UMC