TSMC Joins Mask Writer Group
IMS Nanofabrication (IMS) said that Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) has joined IMS’ multibeam mask writer development collaboration.
Earlier this year, IMS said Dai Nippon Printing Co. Ltd. (DNP) joined a collaborative effort, backed by Intel and Photronics, to advance IMS’s electron multibeam mask writer tool.
The purpose of the collaborative program is to develop an electron multibeam mask writer for use in advanced mask lithography applications with the goal of meeting lithography specifications below 10nm. The program is nearing the completion of a proof-of-concept phase.
Austria-based IMS has been developing a so-called electron multibeam Mask Exposure Tool (eMET) for the fabrication of leading-edge masks and templates. The company has completed a concept 50keV eMET. Through a programmable aperture plate, the eMET would provide 264,144 programmable beams with 20nm and 10nm beam sizes.
C.S. Yoo, head of e-beam operations at TSMC said: “We are very encouraged by this partnership’s goal of producing a mask writer with both accuracy and high productivity around 2015 for nodes beyond 10 nanometers. This project shows great potential for producing that breakthrough.”
TSMC has been pushing hard for maskless lithography. In 2010, TSMC installed Mapper Lithography’s “pre-alpha” maskless tool within its Fab 12 in Taiwan. In 2012, Mapper will complete its Matrix pre-production platform, which will initially have a throughput of 1 wafer per hour. For some time, Mapper has been developing a production tool with some 13,000 beams.
Tags: DNP, IMS, Intel, lithography, Mapper, maskless, Photronics, TSMC