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	<title>Comments on: Fabless-Foundry Model Under Stress</title>
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	<description>Deep Insights for Chip Builders</description>
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		<title>By: Diogenes Cicero</title>
		<link>http://semimd.com/blog/2012/06/26/fabless-foundry-model-under-stress/#comment-27404</link>
		<dc:creator>Diogenes Cicero</dc:creator>
		<pubDate>Wed, 04 Jul 2012 15:43:56 +0000</pubDate>
		<guid isPermaLink="false">http://semimd.com/?p=6342#comment-27404</guid>
		<description>The challenges to the fabless-foundry model emerged years ago when DFM was the shiny new penny, and DFM products and companies filled DAC.  Solutions emerged which were suitable band-aids at 65 and 45nm but obviously were problematic as we approached 20nm.  Many thought EUV would solve the DFM problems.  Those of us who did not believe in EUV (it remains X-ray, despite the name change), believed DFM would re-emerge and give IDMs a decided advantage.  As we go below 20nm, to quad patterning, etc. etc in logic, seamless integration between design and manufacturing will be essential to success (i.e. financially acceptable yields).  IDMs will rule.</description>
		<content:encoded><![CDATA[<p>The challenges to the fabless-foundry model emerged years ago when DFM was the shiny new penny, and DFM products and companies filled DAC.  Solutions emerged which were suitable band-aids at 65 and 45nm but obviously were problematic as we approached 20nm.  Many thought EUV would solve the DFM problems.  Those of us who did not believe in EUV (it remains X-ray, despite the name change), believed DFM would re-emerge and give IDMs a decided advantage.  As we go below 20nm, to quad patterning, etc. etc in logic, seamless integration between design and manufacturing will be essential to success (i.e. financially acceptable yields).  IDMs will rule.</p>
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