Panasonic and TSMC Tip Resistive RAMs at ISSCC
By Mark LaPedus, SemiMD senior editor
The emerging resistive RAM (ReRAM) market continues to heat up, as Panasonic and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) will describe new breakthroughs in the arena.
At the International Solid-State Circuits Conference (ISSCC) in San Francisco on Wednesday (Feb. 22), TSMC will describe a ReRAM as part of the silicon foundry’s push in the embedded memory space. TSMC, along with National Tsing Hua University in Hsinchu, Taiwan, will disclose the development of a 0.5-Volt, 4-Mbit embedded ReRAM macro, based on a 65nm logic process.
At ISSCC, Panasonic will describe an 8-Mbit multi-layered cross-point ReRAM macro. The device has a 443-MB/second write throughput at 8.2nm pulse widths, which is twice as fast as competing efforts, according to Panasonic. Read access time is said to be 25ns.
Last year, Panasonic claimed to be sampling a 2-Mbit ReRAM, based on a tantalum and oxygen (TaOx) process. The 8-Mbit ReRAM uses the same technology, reportedly based on a 0.18-micron process.
Panasonic's ReRAM structure (Source: Company)
The ISSCC announcements follow what could be the hottest technology within the next-generation memory space. Elpida, Hynix, IMEC, Micron, Samsung, Sharp, Sony, and others are working on ReRAM.ReRAM is “based on the electronic switching of a resistor element material between two stable (low/high) resistive states. The major strengths of ReRAM technology are its potential density and speed,” according to IMEC.
FRAM, MRAM, phase-change, ReRAM and others fall into the so-called universal memory category. Developers of these technologies claim their respective technologies can replace DRAM, NAND, NOR — or all three.
Most next-generation memory types have failed to live up to their promises. They are difficult to make and scale. But some claim the floating gate structure in flash is expected to hit the wall at 14nm, thereby fueling the need for a new memory type.
There are a range of emerging applications for next-generation memories. One of the possibilities is so-called storage-class memories. In this application, there is a need for a new and faster memory that sits between the processor and DRAM in a system to boost I/O performance. In theory, a storage-class memory would offload many of the functions in a power-hungry DRAM.
Block diagram of ReRAM from National Tsing Hua University and TSMC (Source: TSMC, National Tsing)
Embedded is another application. Many foundries offer embedded DRAM IP for system LSIs and other applications, but the technology could soon hit the scaling wall.
In embedded applications, “MRAM and ReRAM have the most promise,” said Fu-Lung Hsueh, a TSMC fellow and director of the Design Technology Division for the foundry giant, in a brief interview at ISSCC.
For some time, TSMC and Qualcomm Inc. have been developing an embedded memory based on MRAM technology. In the future, Qualcomm hopes to incorporate the MRAM IP within its cell-phone chip offerings.
ReRAM is another possibility for the embedded market. TSMC and National Tsing Hua University are developing a ReRAM solution. Hsueh said the device is still in the “prototyping” stage and the work is being conducted at the university level.
That device is said to enable short write times at low voltages. The 4-Mbit macro has four 1-Mbit sub-arrays, comprising of 2,048 columns and 512 rows, according to a paper from TSMC and National Tsing Hua. The entities developed a body-drain-driven current-mode sense amplifier (CSA) and small voltage headroom (VHR) for larger sensing margins. Using a new sensing scheme, the device is said to have a 45ns random read time, according to the paper.
Tags: Elpida, Hynix, Micron, Panasonic, Qualcomm, Samsung, TSMC