Foundry Rivals Say EUV Not Ready for Prime Time

By Mark LaPedus, SemiMD senior editor

Two foundry vendors — GlobalFoundries Inc. and Taiwan Semiconductor Manufacturing Co. Ltd. (TMSC) — are clearly rivals and have different strategies in the market.

But lithography experts from both foundry vendors agree on one thing: The progress for extreme ultraviolet (EUV) lithography is going slower than expected and the technology is not ready for prime time right now.

The question is when will EUV move into mass production? It’s unclear — at least based on the answers from GlobalFoundries and TSMC. As a result, GlobalFoundries may have to change its lithography strategy. And TSMC is proposing to use multi-beam e-beam to expose all layers when the foundry moves to 450mm fabs.

Because of the lack of adequate power sources, EUV throughputs are running about 4 wafers an hour right now, according to GlobalFoundries. The industry requires throughputs of around 100 wafers an hour to make EUV economical viable in production fabs.

EUV “is not ready yet,” said Obert Wood, principal member of the technical staff for strategic lithography technology at GlobalFoundries, during a presentation at the SPIE Advanced Lithography conference on Monday (Feb. 13).

“My company would use it if it was ready,” Wood said. “I can’t do processing at 4 wafers an hour. Gaps between device requirements and the current capabilities of EUV still persist.”

Commenting when EUV will be ready for production fabs, he said: “EUVL will be used when EUVL manufacturing costs are lower or equal to 193nm immersion. When is when it makes economic sense.”

There are several issues with EUV, namely the power source. Asked about the progress with the EUV power source, Burn Lin, vice president of the nano-patterning division at TSMC, said: “I am not happy about it.”

Two litho paths

GlobalFoundries and TSMC have different lithographic roadmaps. At present, GlobalFoundries — the foundry spinoff of Advanced Micro Devices Inc. (AMD) — uses 193nm immersion tools from both ASML Holding NV and Nikon Corp. for the critical layers in various devices.

In the first quarter of 2013, GlobalFoundries is expected to receive ASML’s NXE:3300B, a full-blown production EUV tool. The company took a different approach than other EUV customers. Initially, to get their feet wet for EUV, Intel, Samsung, TSMC and others procured ASML’s NXE:3100, a pre-production EUV tool. GlobalFoundries opted not to procure the NXE:3100, and, instead, decided to obtain the NXE:3300B.

At one time, GlobalFoundries hoped to offer both EUV and 193nm immersion pattering options for chip production at the 20nm node. GlobalFoundries hoped EUV would be ready at least by the tail end of 20nm. The company is expected to move into risk production for the 20nm node in the second half of 2012, followed by volume production in 2013.

Given that EUV is late to the party, GlobalFoundries will likely have to change part of its patterning strategy and extend 193nm immersion. Meanwhile, during the SPIE presentation, Wood said EUV is key to lower mask count and reduce overall chip-manufacturing costs. When EUV goes into production, the technology would initially be used for “contacts and vias,” he said.

The trouble is there are still gaps with the technology. EUV throughput is currently four wafers an hour, he said. The industry requires a 250 Watt power source, enabling 100 wafer an hour throughputs.

EUV overlay accuracy stands at <7nm today, but the industry requires 2.5nm to 5nm, he said. Because there is no pellicle for EUV, the defect handling levels are around 0.04 adder/cycle; the industry requires <0.01 adder/cycle.

TSMC like maskless

For some time, TSMC has not changed its lithography roadmap. The company plans to extend 193nm immersion down to 20nm. Lin said TSMC is still evaluating three lithography options for the critical layers at 14nm: EUV, multi-beam e-beam and 193nm immersion multi-patterning. TSMC has been one of the champions for multi-beam e-beam or maskless lithography, where the silicon foundry giant is evaluating three vendors in the arena: IMS, KLA-Tencor and Mapper.

In a major surprise, Lin said TSMC is even considering inserting multi-beam e-beam lithography exclusively when it moves to 450mm wafers. At 14nm, TSMC would like to put finFET transistors into production. It is also looking at a monumental shift to 450mm wafer fabs at the node.

Maskless would not only handle the critical layers but also the non-critical layers for chips in 450mm fabs, Lin said. This would save time and money, because chip makers would only have to develop “one system for all resolutions,” he said.

“We think e-beam will rule our world and would bury photons,” he said during the presentation. In an interview, Lin was quick to point out that the idea of inserting multi-beam e-beam for all layers within a 450mm fab is only a “proposal” and not a definite strategy within TSMC.

Still, in one scenario, Lin said KLA-Tencor Corp.’s multi-beam concept — dubbed Reflective Electron Beam Lithography (REBL) — could be configured to support 450mm production. KLA-Tencor’s 300mm REBL concept makes use of a rotary stage and 36 separate e-beam columns.

The 450mm concept could support 81 columns to reduce the cost for 450mm fabs. “The columns are small and cheap,” he said. A multi-beam e-beam from Mapper or IMS could also be configured for 450mm fabs, he added.

Still, multi-beam e-beam technology is unproven and suffers from throughput, shot noise and cost issues.

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Comments

One Response to “Foundry Rivals Say EUV Not Ready for Prime Time”

  1. Diogenes Cicero Says:

    Dr. Lin’s contributions to lithography, particularly immersion lithography, have been significant, and if the industry awarded Nobel prizes, he would surely win one. But, his adoption of e-beam direct write (a.k.a. maskless, renamed for the same reason soft x-ray projection lithography was renamed: to hide from its sordid past) reminds me of the aging pitcher, trying to reclaim just one more championship ring, but relegated to the bullpen. Its so much more dignified to leave while on top.

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