Novellus Brings Vector Strata to VIM Deposition

Novellus Systems said it has developed a dielectric deposition tool, the Vector Strata, optimized for vertically integrated memory (VIM) flash devices. The tool aims to deliver the smooth films required for the multiple layers of oxide and nitride materials, at the low defect densities and high throughputs required for volume memory production.

Novellus said Vector Strata employs the company’s multi-station sequential processing (MSSP) architecture, which controls temperature and gas flows separately in plasma enhanced CVD. The tool complements the Altus ExtremeFill tungsten CVD system, introduced in July 2011, also aimed at 3D NAND or VIM memories.

The major NAND vendors, including Micron, Samsung, and Toshiba, have different VIM flash designs using different materials, but all require smooth film deposition. The VIM memories use relaxed design rules compared with planar NAND devices, but stacking the memory cells vertically requires that each layer be extremely smooth, with few defects, so that each layer can be deposited on the underlying layer without bumps or distortions. The deposition tool must have “exceptional” defect control, the company said.

Novellus said the Vector Strata “employs innovative technology designed to deliver ultra-smooth films with exceptional defect performance,” enabling in-situ deposition of the alternating silicon-based layers used in the formation of the VIM structure. The tool “will allow acceleration of the technology into high-volume production.”

Novellus said as the industry moves towards sub-20nm technologies, traditional planar NAND flash devices are “approaching scaling limitations,” with  parasitic inter-wire capacitance leading to crosstalk and power consumption. Also, “the closer proximity of adjacent memory cells causes shifts in the threshold value of a memory cell” while an adjoining cell is being programmed, leading to memory disturbance, the company said. And the number of electrons in the floating gate of a traditional planar NAND flash device at sub-20nm dimensions “is significantly reduced, to the point where multiple bits per cell are no longer possible and thus the extendibility of the technology becomes limited,” Novellus said.

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