Leti Offers “Open3D” TSV Prototyping Program
CEA-Leti said it will provide partners with an ability to develop proof-of-concept and prototyping TSV 3D solutions. Called Open 3D, the program includes 3D design, layout, TSV interconnections, components assembly, reliability tests, and final packaging.
Open 3D is fully operational for 200mm wafers now on the Minatec Campus in Grenoble, France, and will be operational in 2012 for 300mm wafers. Modules offered in the platform’s technology catalogue include:
• Through silicon vias (TSV) with 1:3 aspect ratios
• Chip-to-wafer interconnects based on micro-bump technology
• Chip to substrate interconnects based on bump technology
• Redistribution layers (RDL)
• Under-bump metallurgy (UBM)
• Temporary bonding, thinning and debonding
The program is aimed at customers in a range of markets, including bio/medical, aeronautics and space, consumer applications, defense, and security, offering them enough wafers for proof of concept or prototyping. Leti said the offer is based on “limited mature technologies in order to ensure moderate costs, short cycle times and performances corresponding to the initial technical requirements of Leti customers.”
Open 3D operates directly on active wafers with embedded components or on passive wafers with interposer technologies.
Leti CEO Laurent Malier said, “Open 3D leverages Leti’s proven 3D expertise and infrastructure for collaborations that address new applications and markets. Our partners will include laboratories, universities and international research institutes as well as fabless chip companies and niche market manufacturers and integrators.”
