Firms Mull New Mobile DRAM Standard Amid 3D Concerns
By Mark LaPedus, SemiMD senior editor
Amid the cost and manufacturing uncertainties for 3D-based Wide I/O DRAMs, the memory community has intensified the discussions about the development of a new and stopgap mobile DRAM standard: LPDDR4, according to sources in the industry.
There are some fears that 3D technology based on stacked Wide I/O technology could be too expensive — or too costly to make — at least in the short term, prompting the need for the evolutionary LPDDR4 interface. And one major backer of Wide I/O — Nokia Inc. — has reportedly lost interest in the technology, sources said. Nokia officials did not respond to e-mails.
Mobile DRAMs are specialty DRAMs with low power features, which are used in today’s smartphones, tablets and related products. The industry was originally expected to move from mobile DRAMs based on the LPDDR1 interface technology to LPDDR2, and then, to LPDDR3.
Then, in 2013, the industry was immediately expected to make a jump to Wide I/O, a 3D-like DRAM technology, according to a roadmap from JEDEC, an industry standards body. Using stacking techniques and through-silicon-vias (TSVs), Wide I/O mobile DRAM is expected to improve the bandwidth, latency and power over today’s LPDDR technology.
But for some time, the industry has been mulling over the need for LPDDR4, reportedly in case Wide I/O is tardy or too expensive to make. The other question is whether or not the supply chain can be developed to support 3D chips in the first place.
Now, the industry is increasing the discussions about the need for LPDDR4, which could roll out about 2014, according to a new and proposed roadmap from JEDEC and Micron Technology Inc., which was obtained by SemiMD. That would be rolled out in conjunction by a new version of Wide I/O, dubbed Wide I/O2, according to the roadmap. There is still no formal LPDDR4 group within JEDEC — yet.
In a recent interview, Mueez Deen, director of mobile DRAM at Samsung Semiconductor Inc., said mobile DRAMs based on LPDDR3 interface technology are expected to ramp up in the second half of 2012. Then, Wide I/O DRAMs are expected to be “out in 2013,” Deen said.
The shift towards Wide I/O will not spell the end for LPDDR technology. Deen also believes LPDDR-based technology will continue to evolve and exist even after Wide I/O enters the picture. “I don’t see Wide I/O as a complete replacement for LPDDRx,” he said. “I see them as complementary.”
Deen also sees LPDDR extending beyond LPDDR4 technology, saying Wide I/O and LPDDRx will “co-exist” in the market to satisfy a growing number of new mobile applications in the arena.
Bob Merritt, an analyst with Convergent Semiconductors, a research firm, agreed: “As we continue to move toward a wider range of target applications for the development of next generation products, we begin to see the demand for a wider set of memory performance attributes.”
Still, there are questions about Wide I/O. Mike Howard, an analyst with IHS iSuppli, said the mass production of parts based on Wide I/O technology faces several challenges. “LPDDR3 is just getting finalized,” Howard said. “I think it’ll be awhile before LPDDR4 is ready. And Wide I/O is still facing a lot of cost and technical challenges.”
Micron issued the following statement: “It could be incorrect to regard that LPDDR3 to Wide IO is a progression. Wide I/O was developed before LPDDR3 as a high bandwidth memory for high-end applications. LPDDR3 was started after, as a bandwidth-equivalent alternative for the broader, more cost-sensitive market. Both standards will co-exist, but Micron believes the LPDDR3 market will see significantly more volume than Wide I/O.
“In the next generation of memory for mobile devices, there will again be two competing visions: WI/O-2 and LPDDR4, which will again have equivalent performance targets. JEDEC has begun work on WI/O-2, and will likely begin work on LPDDR4 within this calendar year. These standards will also co-exist, but the market winner will be the memory that can most efficiently address cost, power, thermal and packaging issues, with an acceptable business model.”
Mobile DRAM craze
Looking to keep up with today’s bandwidth requirements, OEMs have already moved from mobile DRAMs based on the LPDDR1 interface standard to the faster LPDDR2 technology. LPDDR1 operates at speeds up to 1.6-Gbytes/second, while LPDDR2 runs at 4.3-Gbytes/second.
Following LPDDR2, the industry is expected to migrate to the next standard, LPDDR3, which operates at speeds up to 6.4-Gbytes/second. Instead of LPDDR3, some OEMs are already opting for a low-power and a cheaper version of desktop DRAM SDRAM, dubbed DDR3L.
Mobile DRAMs based on LPDDR3 have begun sampling. Elpida, Hynix, Micron and Samsung have announced parts. “The development I’m paying a lot of attention to is what memory is going to be widely adopted for ultrabooks in 2013,” said iSuppli’s Howard. Pushed by Intel, ultrabooks are new and thin form-factor for notebook PCs.
“There is pressure for the DRAM guys to drop LPDDR3 prices so it can be adopted in compute platforms” like the ultrabook, he said. “I have a feeling it’s going to be some sort of mixed model, where high-end devices use LPDDRx, while less than $800 (systems) use DDR3L or some variant thereof.”
After LPDDR3, the industry was expected to move to the first version of Wide I/O, according to recent roadmaps from JEDEC. Configured in a 3D-like fashion using TSVs, Wide I/O is a four-channel, 128-lane technology, thereby providing up to 12.8-Gbytes/second of bandwidth.
DRAM makers have been developing 3D memory chips, but commercial products still are not due out for some time because of technical and cost issues. Realizing the challenges for 3D DRAMs, the industry has intensified talks about developing an evolutionary technology to LPDDR3.
That technology — dubbed LPDDR4 — operates at speeds up to 6.4-Gbytes/second, the same as LPDDR3. But LPDDR4 features densities up to 32-GB, as opposed to 16-GB for LPDDR3, according to JEDEC’s roadmap.
The industry is still pursuing Wide I/O DRAM. Earlier this month, JEDEC announced the availability of a new standard for Wide I/O mobile DRAM, dubbed JESD229 Wide I/O Single Data Rate (SDR). Wide I/O offers twice the bandwidth of the previous generation standard, LPDDR2, at the same rate of power consumption.
When the specification was announced, Sophie Dumas, chairman of the JC-42.6 Subcommittee for Low Power Memories, said, “High performance mobile devices such as smartphones and tablets require high bandwidth and density, driven by demands for improved performance. JEDEC’s JC-42.6 Subcommittee is pleased to provide a solution to this industry need with the publication of JESD229 for Wide I/O mobile DRAM, which will support the high resolution display, high quality graphics and multi-tasking capabilities required by device end users now and in the future.”
JEDEC is now working on a second-generation version of Wide I/O. The JEDEC Wide I/O presentation can be seen here.
