TSMC: 20nm Risk Production to Start 2H 2013

By David Lammers

TSMC chairman and CEO Morris Chang said 20nm risk production will begin in the second half of 2013.

During a conference call following release of the fourth quarter financial results, Chang said TSMC is preparing for the 20nm node by building fabs in Taichung and Hsinchu, and by ramping up its R&D effort.

“We aren’t spending very much on tools for 20nm – most of the money is going in to building the plants,” Chang said. Asked about the capital intensity, Chang said that to add 1,000 wafers per month of 20nm capacity will cost 1.45 times as much as required for the equivalent addition of 28nm capacity.

TSMC expects to spend about $6 billion on capital expenditures this year, down from 2011 spending of $7.3 billion. Chang added that capex spending often goes up or down depending on worldwide economic conditions, and this year may be no different. Capital spending will be evenly balanced between the first and second halves of this year.

Production revenue by technology generation in Q4 2011. (Source: TSMC)

Only about 2 percent of the foundry’s overall production was at 28nm during the fourth quarter, but Chang said he expects 28nm to come into its own this year. While margins on 28nm production are below the corporate average now, gross margins on 28nm wafers will equal or exceed the corporate average by the end of the year as volumes ramp and yields improve. The normal learning curve, in which a technology starts at high costs which decline as yields improve sharply, applies to 28nm as it does in every generation, he added.

Asked if mobile IC vendors have stayed away from high-k/metal gate technology at the 28nm generation, Chang said “frankly, I think adoption of 28nm has been limited by our capacity and our ability to ramp. That will accelerate in 2012 also.”

TSMC is adding to its 28nm capacity by shifting some 65nm capacity to 28nm. The workhorse 40nm production is increasing as well, a node where TSMC enjoys healthy profit margins. He declined to comment on 20nm pricing expectations, adding that TSMC and its customers work together in partnership to deliver value at each technology generation. “Our customers are our partners, and we are not going to do anything to change that,” he said.

Asked if Samsung’s accelerated spending on logic capacity, forecast at $7 billion this year, will present a competitive threat to TSMC, Chang differentiated between Samsung’s System LSI production and foundry. He said much of Samsung’s spending is to increase production of the SoCs used in Samsung’s own mobile systems and consumer products. He acknowledged that Samsung is “a formidable competitor, and I do expect they will certainly grow their System LSI business.”

Chang and senior vice president of business development C.C. Wei reiterated TSMC’s plans for interposer-based products. TSMC plans to always handle putting chips on the interposer, partly due to the mechanical and thermal stresses which lead to reliability concerns, Wei said.

“We will put the chips on the interposer outselves, always,” Wei said. “We will not use OSATs to put chips on the interposer. To put the interposer on the substrate, initially we plan to do ourselves also, but eventually we could hand that over to the OSATs.”

Wei said interposers provide the industry with a means of improving performance while staying on Moore’s Law.

Chang was asked about TSMC’s need to work with memory vendors, to provide the bare die placed on the interposer. Chang said memory vendors are eager to work with TSMC, partly as a means of maintaining a competitive position vis a vis Samsung. “We are their defense against this competitor too,” he said.

Communications sales gained in Q4, while revenues from computers dropped. (Source: TSMC)

Share and Enjoy:
  • Print
  • Digg
  • StumbleUpon
  • del.icio.us
  • Facebook
  • Yahoo! Buzz
  • Twitter
  • Google Bookmarks
  • LinkedIn


Tags: , , ,

Comments

Leave a Reply